[InstCombine] Signed saturation tests. NFC
[llvm-complete.git] / lib / Target / AArch64 / AArch64CallLowering.h
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1 //===- AArch64CallLowering.h - Call lowering --------------------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 ///
9 /// \file
10 /// This file describes how to lower LLVM calls to machine code calls.
11 ///
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_LIB_TARGET_AARCH64_AARCH64CALLLOWERING_H
15 #define LLVM_LIB_TARGET_AARCH64_AARCH64CALLLOWERING_H
17 #include "llvm/ADT/ArrayRef.h"
18 #include "llvm/CodeGen/GlobalISel/CallLowering.h"
19 #include "llvm/IR/CallingConv.h"
20 #include <cstdint>
21 #include <functional>
23 namespace llvm {
25 class AArch64TargetLowering;
26 class CCValAssign;
27 class DataLayout;
28 class MachineIRBuilder;
29 class MachineRegisterInfo;
30 class Type;
32 class AArch64CallLowering: public CallLowering {
33 public:
34 AArch64CallLowering(const AArch64TargetLowering &TLI);
36 bool lowerReturn(MachineIRBuilder &MIRBuilder, const Value *Val,
37 ArrayRef<Register> VRegs,
38 Register SwiftErrorVReg) const override;
40 bool lowerFormalArguments(MachineIRBuilder &MIRBuilder, const Function &F,
41 ArrayRef<ArrayRef<Register>> VRegs) const override;
43 bool lowerCall(MachineIRBuilder &MIRBuilder,
44 CallLoweringInfo &Info) const override;
46 /// Returns true if the call can be lowered as a tail call.
47 bool
48 isEligibleForTailCallOptimization(MachineIRBuilder &MIRBuilder,
49 CallLoweringInfo &Info,
50 SmallVectorImpl<ArgInfo> &InArgs,
51 SmallVectorImpl<ArgInfo> &OutArgs) const;
53 bool supportSwiftError() const override { return true; }
55 private:
56 using RegHandler = std::function<void(MachineIRBuilder &, Type *, unsigned,
57 CCValAssign &)>;
59 using MemHandler =
60 std::function<void(MachineIRBuilder &, int, CCValAssign &)>;
62 void splitToValueTypes(const ArgInfo &OrigArgInfo,
63 SmallVectorImpl<ArgInfo> &SplitArgs,
64 const DataLayout &DL, MachineRegisterInfo &MRI,
65 CallingConv::ID CallConv) const;
67 bool lowerTailCall(MachineIRBuilder &MIRBuilder, CallLoweringInfo &Info,
68 SmallVectorImpl<ArgInfo> &OutArgs) const;
70 bool
71 doCallerAndCalleePassArgsTheSameWay(CallLoweringInfo &Info,
72 MachineFunction &MF,
73 SmallVectorImpl<ArgInfo> &InArgs) const;
75 bool
76 areCalleeOutgoingArgsTailCallable(CallLoweringInfo &Info, MachineFunction &MF,
77 SmallVectorImpl<ArgInfo> &OutArgs) const;
80 } // end namespace llvm
82 #endif // LLVM_LIB_TARGET_AARCH64_AARCH64CALLLOWERING_H