lib/Target/ARM/Utils/ARMBaseInfo.cpp

   1 //===-- ARMBaseInfo.cpp - ARM Base encoding information------------===//
   2 //
   3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
   4 // See https://llvm.org/LICENSE.txt for license information.
   5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
   6 //
   7 //===----------------------------------------------------------------------===//
   8 //
   9 // This file provides basic encoding and assembly information for ARM.
  10 //
  11 //===----------------------------------------------------------------------===//
  12 #include "ARMBaseInfo.h"
  13 #include "llvm/ADT/ArrayRef.h"
  14 #include "llvm/ADT/SmallVector.h"
  15
  16 using namespace llvm;
  17 namespace llvm {
  18 namespace ARMSysReg {
  19
  20 // lookup system register using 12-bit SYSm value.
  21 // Note: the search is uniqued using M1 mask
  22 const MClassSysReg *lookupMClassSysRegBy12bitSYSmValue(unsigned SYSm) {
  23   return lookupMClassSysRegByM1Encoding12(SYSm);
  24 }
  25
  26 // returns APSR with _<bits> qualifier.
  27 // Note: ARMv7-M deprecates using MSR APSR without a _<bits> qualifier
  28 const MClassSysReg *lookupMClassSysRegAPSRNonDeprecated(unsigned SYSm) {
  29   return lookupMClassSysRegByM2M3Encoding8((1<<9)|(SYSm & 0xFF));
  30 }
  31
  32 // lookup system registers using 8-bit SYSm value
  33 const MClassSysReg *lookupMClassSysRegBy8bitSYSmValue(unsigned SYSm) {
  34   return ARMSysReg::lookupMClassSysRegByM2M3Encoding8((1<<8)|(SYSm & 0xFF));
  35 }
  36
  37 #define GET_MCLASSSYSREG_IMPL
  38 #include "ARMGenSystemRegister.inc"
  39
  40 } // end namespace ARMSysReg
  41
  42 namespace ARMBankedReg {
  43 #define GET_BANKEDREG_IMPL
  44 #include "ARMGenSystemRegister.inc"
  45 } // end namespce ARMSysReg
  46 } // end namespace llvm