lib/Target/RISCV/Utils/RISCVBaseInfo.cpp

   1 #include "RISCVBaseInfo.h"
   2 #include "llvm/ADT/ArrayRef.h"
   3 #include "llvm/ADT/Triple.h"
   4 #include "llvm/Support/raw_ostream.h"
   5
   6 namespace llvm {
   7 namespace RISCVSysReg {
   8 #define GET_SysRegsList_IMPL
   9 #include "RISCVGenSystemOperands.inc"
  10 } // namespace RISCVSysReg
  11
  12 namespace RISCVABI {
  13 ABI computeTargetABI(const Triple &TT, FeatureBitset FeatureBits,
  14                      StringRef ABIName) {
  15   auto TargetABI = StringSwitch<ABI>(ABIName)
  16                        .Case("ilp32", ABI_ILP32)
  17                        .Case("ilp32f", ABI_ILP32F)
  18                        .Case("ilp32d", ABI_ILP32D)
  19                        .Case("ilp32e", ABI_ILP32E)
  20                        .Case("lp64", ABI_LP64)
  21                        .Case("lp64f", ABI_LP64F)
  22                        .Case("lp64d", ABI_LP64D)
  23                        .Default(ABI_Unknown);
  24
  25   bool IsRV64 = TT.isArch64Bit();
  26   bool IsRV32E = FeatureBits[RISCV::FeatureRV32E];
  27
  28   if (!ABIName.empty() && TargetABI == ABI_Unknown) {
  29     errs()
  30         << "'" << ABIName
  31         << "' is not a recognized ABI for this target (ignoring target-abi)\n";
  32   } else if (ABIName.startswith("ilp32") && IsRV64) {
  33     errs() << "32-bit ABIs are not supported for 64-bit targets (ignoring "
  34               "target-abi)\n";
  35     TargetABI = ABI_Unknown;
  36   } else if (ABIName.startswith("lp64") && !IsRV64) {
  37     errs() << "64-bit ABIs are not supported for 32-bit targets (ignoring "
  38               "target-abi)\n";
  39     TargetABI = ABI_Unknown;
  40   } else if (ABIName.endswith("f") && !FeatureBits[RISCV::FeatureStdExtF]) {
  41     errs() << "Hard-float 'f' ABI can't be used for a target that "
  42               "doesn't support the F instruction set extension (ignoring "
  43               "target-abi)\n";
  44     TargetABI = ABI_Unknown;
  45   } else if (ABIName.endswith("d") && !FeatureBits[RISCV::FeatureStdExtD]) {
  46     errs() << "Hard-float 'd' ABI can't be used for a target that "
  47               "doesn't support the D instruction set extension (ignoring "
  48               "target-abi)\n";
  49     TargetABI = ABI_Unknown;
  50   } else if (IsRV32E && TargetABI != ABI_ILP32E && TargetABI != ABI_Unknown) {
  51     errs()
  52         << "Only the ilp32e ABI is supported for RV32E (ignoring target-abi)\n";
  53     TargetABI = ABI_Unknown;
  54   }
  55
  56   if (TargetABI != ABI_Unknown)
  57     return TargetABI;
  58
  59   // For now, default to the ilp32/ilp32e/lp64 ABI if no explicit ABI is given
  60   // or an invalid/unrecognised string is given. In the future, it might be
  61   // worth changing this to default to ilp32f/lp64f and ilp32d/lp64d when
  62   // hardware support for floating point is present.
  63   if (IsRV32E)
  64     return ABI_ILP32E;
  65   if (IsRV64)
  66     return ABI_LP64;
  67   return ABI_ILP32;
  68 }
  69 } // namespace RISCVABI
  70
  71 namespace RISCVFeatures {
  72
  73 void validate(const Triple &TT, const FeatureBitset &FeatureBits) {
  74   if (TT.isArch64Bit() && FeatureBits[RISCV::FeatureRV32E])
  75     report_fatal_error("RV32E can't be enabled for an RV64 target");
  76 }
  77
  78 } // namespace RISCVFeatures
  79
  80 } // namespace llvm