test/MC/AArch64/SVE/sqincp-diagnostics.s

   1 // RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve  2>&1 < %s| FileCheck %s
   2
   3 // ------------------------------------------------------------------------- //
   4 // Invalid result register
   5
   6 uqdecp sp, p0
   7 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
   8 // CHECK-NEXT: uqdecp sp, p0
   9 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  10
  11 uqdecp z0.b, p0
  12 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
  13 // CHECK-NEXT: uqdecp z0.b, p0
  14 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  15
  16 uqdecp x0, p0.b, w0
  17 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
  18 // CHECK-NEXT: uqdecp x0, p0.b, w0
  19 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  20
  21 uqdecp x0, p0.b, x1
  22 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
  23 // CHECK-NEXT: uqdecp x0, p0.b, x1
  24 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  25
  26
  27 // ------------------------------------------------------------------------- //
  28 // Invalid predicate operand
  29
  30 uqdecp x0, p0
  31 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate register
  32 // CHECK-NEXT: uqdecp x0, p0
  33 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  34
  35 uqdecp x0, p0/z
  36 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate register
  37 // CHECK-NEXT: uqdecp x0, p0/z
  38 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  39
  40 uqdecp x0, p0/m
  41 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate register
  42 // CHECK-NEXT: uqdecp x0, p0/m
  43 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  44
  45 uqdecp x0, p0.q
  46 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate register
  47 // CHECK-NEXT: uqdecp x0, p0.q
  48 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  49
  50 sqincp z0.d, p0.b
  51 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate register
  52 // CHECK-NEXT: sqincp z0.d, p0.b
  53 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  54
  55 sqincp z0.d, p0.q
  56 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate register
  57 // CHECK-NEXT: sqincp z0.d, p0.q
  58 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  59
  60
  61 // --------------------------------------------------------------------------//
  62 // Negative tests for instructions that are incompatible with movprfx
  63
  64 movprfx z0.d, p0/z, z7.d
  65 sqincp  z0.d, p0
  66 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
  67 // CHECK-NEXT: sqincp  z0.d, p0
  68 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: