test/MC/AArch64/SVE2/directive-cpu.s

   1 // RUN: llvm-mc -triple aarch64 -filetype asm -o - %s 2>&1 | FileCheck %s
   2
   3 .cpu generic+sve2
   4 tbx z0.b, z1.b, z2.b
   5 // CHECK: tbx z0.b, z1.b, z2.b
   6
   7 .cpu generic+sve2-aes
   8 aesd z23.b, z23.b, z13.b
   9 // CHECK: aesd z23.b, z23.b, z13.b
  10
  11 .cpu generic+sve2-sm4
  12 sm4e z0.s, z0.s, z0.s
  13 // CHECK: sm4e z0.s, z0.s, z0.s
  14
  15 .cpu generic+sve2-sha3
  16 rax1 z0.d, z0.d, z0.d
  17 // CHECK: rax1 z0.d, z0.d, z0.d
  18
  19 .cpu generic+sve2-bitperm
  20 bgrp z21.s, z10.s, z21.s
  21 // CHECK: bgrp z21.s, z10.s, z21.s