test/MC/Disassembler/AMDGPU/gfx10_dasm_dpp16.txt

   1 # RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=+WavefrontSize32,-WavefrontSize64 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX10,W32 %s
   2 # RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=-WavefrontSize32,+WavefrontSize64 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX10,W64 %s
   3
   4 # GFX10: v_mov_b32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x02,0x0a,0x7e,0x01,0x1b,0x00,0x00]
   5 0xfa,0x02,0x0a,0x7e,0x01,0x1b,0x00,0x00
   6
   7 # GFX10: v_mov_b32_dpp v255, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x02,0xfe,0x7f,0x01,0x1b,0x00,0x00]
   8 0xfa,0x02,0xfe,0x7f,0x01,0x1b,0x00,0x00
   9
  10 # GFX10: v_mov_b32_dpp v5, v255 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x02,0x0a,0x7e,0xff,0x1b,0x00,0x00]
  11 0xfa,0x02,0x0a,0x7e,0xff,0x1b,0x00,0x00
  12
  13 # GFX10: v_mov_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x02,0x0a,0x7e,0x01,0xe4,0x00,0x00]
  14 0xfa,0x02,0x0a,0x7e,0x01,0xe4,0x00,0x00
  15
  16 # GFX10: v_mov_b32_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x02,0x0a,0x7e,0x01,0x40,0x01,0x00]
  17 0xfa,0x02,0x0a,0x7e,0x01,0x40,0x01,0x00
  18
  19 # GFX10: v_mov_b32_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x02,0x0a,0x7e,0x01,0x41,0x01,0x00]
  20 0xfa,0x02,0x0a,0x7e,0x01,0x41,0x01,0x00
  21
  22 # GFX10: v_mov_b32_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x02,0x0a,0x7e,0x01,0x01,0x01,0x00]
  23 0xfa,0x02,0x0a,0x7e,0x01,0x01,0x01,0x00
  24
  25 # GFX10: v_mov_b32_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x02,0x0a,0x7e,0x01,0x0f,0x01,0x00]
  26 0xfa,0x02,0x0a,0x7e,0x01,0x0f,0x01,0x00
  27
  28 # GFX10: v_mov_b32_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x02,0x0a,0x7e,0x01,0x11,0x01,0x00]
  29 0xfa,0x02,0x0a,0x7e,0x01,0x11,0x01,0x00
  30
  31 # GFX10: v_mov_b32_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x02,0x0a,0x7e,0x01,0x1f,0x01,0x00]
  32 0xfa,0x02,0x0a,0x7e,0x01,0x1f,0x01,0x00
  33
  34 # GFX10: v_mov_b32_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x02,0x0a,0x7e,0x01,0x21,0x01,0x00]
  35 0xfa,0x02,0x0a,0x7e,0x01,0x21,0x01,0x00
  36
  37 # GFX10: v_mov_b32_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x02,0x0a,0x7e,0x01,0x2f,0x01,0x00]
  38 0xfa,0x02,0x0a,0x7e,0x01,0x2f,0x01,0x00
  39
  40 # GFX10: v_mov_b32_dpp v5, v1 row_share:0 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x02,0x0a,0x7e,0x01,0x50,0x01,0x00]
  41 0xfa,0x02,0x0a,0x7e,0x01,0x50,0x01,0x00
  42
  43 # GFX10: v_mov_b32_dpp v5, v1 row_share:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x02,0x0a,0x7e,0x01,0x5f,0x01,0x00]
  44 0xfa,0x02,0x0a,0x7e,0x01,0x5f,0x01,0x00
  45
  46 # GFX10: v_mov_b32_dpp v5, v1 row_xmask:0 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x02,0x0a,0x7e,0x01,0x60,0x01,0x00]
  47 0xfa,0x02,0x0a,0x7e,0x01,0x60,0x01,0x00
  48
  49 # GFX10: v_mov_b32_dpp v5, v1 row_xmask:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x02,0x0a,0x7e,0x01,0x6f,0x01,0x00]
  50 0xfa,0x02,0x0a,0x7e,0x01,0x6f,0x01,0x00
  51
  52 # GFX10: v_mov_b32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x1 bank_mask:0x0 ; encoding: [0xfa,0x02,0x0a,0x7e,0x01,0x1b,0x00,0x10]
  53 0xfa,0x02,0x0a,0x7e,0x01,0x1b,0x00,0x10
  54
  55 # GFX10: v_mov_b32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x3 bank_mask:0x0 ; encoding: [0xfa,0x02,0x0a,0x7e,0x01,0x1b,0x00,0x30]
  56 0xfa,0x02,0x0a,0x7e,0x01,0x1b,0x00,0x30
  57
  58 # GFX10: v_mov_b32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0x0 ; encoding: [0xfa,0x02,0x0a,0x7e,0x01,0x1b,0x00,0xf0]
  59 0xfa,0x02,0x0a,0x7e,0x01,0x1b,0x00,0xf0
  60
  61 # GFX10: v_mov_b32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x02,0x0a,0x7e,0x01,0x1b,0x00,0x01]
  62 0xfa,0x02,0x0a,0x7e,0x01,0x1b,0x00,0x01
  63
  64 # GFX10: v_mov_b32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x3 ; encoding: [0xfa,0x02,0x0a,0x7e,0x01,0x1b,0x00,0x03]
  65 0xfa,0x02,0x0a,0x7e,0x01,0x1b,0x00,0x03
  66
  67 # GFX10: v_mov_b32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0xf ; encoding: [0xfa,0x02,0x0a,0x7e,0x01,0x1b,0x00,0x0f]
  68 0xfa,0x02,0x0a,0x7e,0x01,0x1b,0x00,0x0f
  69
  70 # GFX10: v_mov_b32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 bound_ctrl:0 ; encoding: [0xfa,0x02,0x0a,0x7e,0x01,0x1b,0x08,0x00]
  71 0xfa,0x02,0x0a,0x7e,0x01,0x1b,0x08,0x00
  72
  73 # GFX10: v_mov_b32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x02,0x0a,0x7e,0x01,0x1b,0x04,0x00]
  74 0xfa,0x02,0x0a,0x7e,0x01,0x1b,0x04,0x00
  75
  76 # GFX10: v_cvt_f32_i32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x0a,0x0a,0x7e,0x01,0x1b,0x00,0x00]
  77 0xfa,0x0a,0x0a,0x7e,0x01,0x1b,0x00,0x00
  78
  79 # GFX10: v_cvt_f32_u32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x0c,0x0a,0x7e,0x01,0x1b,0x00,0x00]
  80 0xfa,0x0c,0x0a,0x7e,0x01,0x1b,0x00,0x00
  81
  82 # GFX10: v_cvt_u32_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x0e,0x0a,0x7e,0x01,0x1b,0x00,0x00]
  83 0xfa,0x0e,0x0a,0x7e,0x01,0x1b,0x00,0x00
  84
  85 # GFX10: v_cvt_i32_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x10,0x0a,0x7e,0x01,0x1b,0x00,0x00]
  86 0xfa,0x10,0x0a,0x7e,0x01,0x1b,0x00,0x00
  87
  88 # GFX10: v_cvt_f16_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x14,0x0a,0x7e,0x01,0x1b,0x00,0x00]
  89 0xfa,0x14,0x0a,0x7e,0x01,0x1b,0x00,0x00
  90
  91 # GFX10: v_cvt_f32_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x16,0x0a,0x7e,0x01,0x1b,0x00,0x00]
  92 0xfa,0x16,0x0a,0x7e,0x01,0x1b,0x00,0x00
  93
  94 # GFX10: v_cvt_rpi_i32_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x18,0x0a,0x7e,0x01,0x1b,0x00,0x00]
  95 0xfa,0x18,0x0a,0x7e,0x01,0x1b,0x00,0x00
  96
  97 # GFX10: v_cvt_flr_i32_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x1a,0x0a,0x7e,0x01,0x1b,0x00,0x00]
  98 0xfa,0x1a,0x0a,0x7e,0x01,0x1b,0x00,0x00
  99
 100 # GFX10: v_cvt_off_f32_i4_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x1c,0x0a,0x7e,0x01,0x1b,0x00,0x00]
 101 0xfa,0x1c,0x0a,0x7e,0x01,0x1b,0x00,0x00
 102
 103 # GFX10: v_cvt_f32_ubyte0_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x22,0x0a,0x7e,0x01,0x1b,0x00,0x00]
 104 0xfa,0x22,0x0a,0x7e,0x01,0x1b,0x00,0x00
 105
 106 # GFX10: v_cvt_f32_ubyte1_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x24,0x0a,0x7e,0x01,0x1b,0x00,0x00]
 107 0xfa,0x24,0x0a,0x7e,0x01,0x1b,0x00,0x00
 108
 109 # GFX10: v_cvt_f32_ubyte2_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x26,0x0a,0x7e,0x01,0x1b,0x00,0x00]
 110 0xfa,0x26,0x0a,0x7e,0x01,0x1b,0x00,0x00
 111
 112 # GFX10: v_cvt_f32_ubyte3_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x28,0x0a,0x7e,0x01,0x1b,0x00,0x00]
 113 0xfa,0x28,0x0a,0x7e,0x01,0x1b,0x00,0x00
 114
 115 # GFX10: v_fract_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x40,0x0a,0x7e,0x01,0x1b,0x00,0x00]
 116 0xfa,0x40,0x0a,0x7e,0x01,0x1b,0x00,0x00
 117
 118 # GFX10: v_trunc_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x42,0x0a,0x7e,0x01,0x1b,0x00,0x00]
 119 0xfa,0x42,0x0a,0x7e,0x01,0x1b,0x00,0x00
 120
 121 # GFX10: v_ceil_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x44,0x0a,0x7e,0x01,0x1b,0x00,0x00]
 122 0xfa,0x44,0x0a,0x7e,0x01,0x1b,0x00,0x00
 123
 124 # GFX10: v_rndne_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x46,0x0a,0x7e,0x01,0x1b,0x00,0x00]
 125 0xfa,0x46,0x0a,0x7e,0x01,0x1b,0x00,0x00
 126
 127 # GFX10: v_floor_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x48,0x0a,0x7e,0x01,0x1b,0x00,0x00]
 128 0xfa,0x48,0x0a,0x7e,0x01,0x1b,0x00,0x00
 129
 130 # GFX10: v_exp_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x4a,0x0a,0x7e,0x01,0x1b,0x00,0x00]
 131 0xfa,0x4a,0x0a,0x7e,0x01,0x1b,0x00,0x00
 132
 133 # GFX10: v_log_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x4e,0x0a,0x7e,0x01,0x1b,0x00,0x00]
 134 0xfa,0x4e,0x0a,0x7e,0x01,0x1b,0x00,0x00
 135
 136 # GFX10: v_rcp_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x54,0x0a,0x7e,0x01,0x1b,0x00,0x00]
 137 0xfa,0x54,0x0a,0x7e,0x01,0x1b,0x00,0x00
 138
 139 # GFX10: v_rcp_iflag_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x56,0x0a,0x7e,0x01,0x1b,0x00,0x00]
 140 0xfa,0x56,0x0a,0x7e,0x01,0x1b,0x00,0x00
 141
 142 # GFX10: v_rsq_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x5c,0x0a,0x7e,0x01,0x1b,0x00,0x00]
 143 0xfa,0x5c,0x0a,0x7e,0x01,0x1b,0x00,0x00
 144
 145 # GFX10: v_sqrt_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x66,0x0a,0x7e,0x01,0x1b,0x00,0x00]
 146 0xfa,0x66,0x0a,0x7e,0x01,0x1b,0x00,0x00
 147
 148 # GFX10: v_sin_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x6a,0x0a,0x7e,0x01,0x1b,0x00,0x00]
 149 0xfa,0x6a,0x0a,0x7e,0x01,0x1b,0x00,0x00
 150
 151 # GFX10: v_cos_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x6c,0x0a,0x7e,0x01,0x1b,0x00,0x00]
 152 0xfa,0x6c,0x0a,0x7e,0x01,0x1b,0x00,0x00
 153
 154 # GFX10: v_not_b32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x6e,0x0a,0x7e,0x01,0x1b,0x00,0x00]
 155 0xfa,0x6e,0x0a,0x7e,0x01,0x1b,0x00,0x00
 156
 157 # GFX10: v_bfrev_b32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x70,0x0a,0x7e,0x01,0x1b,0x00,0x00]
 158 0xfa,0x70,0x0a,0x7e,0x01,0x1b,0x00,0x00
 159
 160 # GFX10: v_ffbh_u32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x72,0x0a,0x7e,0x01,0x1b,0x00,0x00]
 161 0xfa,0x72,0x0a,0x7e,0x01,0x1b,0x00,0x00
 162
 163 # GFX10: v_ffbl_b32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x74,0x0a,0x7e,0x01,0x1b,0x00,0x00]
 164 0xfa,0x74,0x0a,0x7e,0x01,0x1b,0x00,0x00
 165
 166 # GFX10: v_ffbh_i32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x76,0x0a,0x7e,0x01,0x1b,0x00,0x00]
 167 0xfa,0x76,0x0a,0x7e,0x01,0x1b,0x00,0x00
 168
 169 # GFX10: v_frexp_exp_i32_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x7e,0x0a,0x7e,0x01,0x1b,0x00,0x00]
 170 0xfa,0x7e,0x0a,0x7e,0x01,0x1b,0x00,0x00
 171
 172 # GFX10: v_frexp_mant_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x80,0x0a,0x7e,0x01,0x1b,0x00,0x00]
 173 0xfa,0x80,0x0a,0x7e,0x01,0x1b,0x00,0x00
 174
 175 # GFX10: v_cvt_f16_u16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xa0,0x0a,0x7e,0x01,0x1b,0x00,0x00]
 176 0xfa,0xa0,0x0a,0x7e,0x01,0x1b,0x00,0x00
 177
 178 # GFX10: v_cvt_f16_i16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xa2,0x0a,0x7e,0x01,0x1b,0x00,0x00]
 179 0xfa,0xa2,0x0a,0x7e,0x01,0x1b,0x00,0x00
 180
 181 # GFX10: v_cvt_u16_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xa4,0x0a,0x7e,0x01,0x1b,0x00,0x00]
 182 0xfa,0xa4,0x0a,0x7e,0x01,0x1b,0x00,0x00
 183
 184 # GFX10: v_cvt_i16_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xa6,0x0a,0x7e,0x01,0x1b,0x00,0x00]
 185 0xfa,0xa6,0x0a,0x7e,0x01,0x1b,0x00,0x00
 186
 187 # GFX10: v_rcp_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xa8,0x0a,0x7e,0x01,0x1b,0x00,0x00]
 188 0xfa,0xa8,0x0a,0x7e,0x01,0x1b,0x00,0x00
 189
 190 # GFX10: v_sqrt_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xaa,0x0a,0x7e,0x01,0x1b,0x00,0x00]
 191 0xfa,0xaa,0x0a,0x7e,0x01,0x1b,0x00,0x00
 192
 193 # GFX10: v_rsq_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xac,0x0a,0x7e,0x01,0x1b,0x00,0x00]
 194 0xfa,0xac,0x0a,0x7e,0x01,0x1b,0x00,0x00
 195
 196 # GFX10: v_log_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xae,0x0a,0x7e,0x01,0x1b,0x00,0x00]
 197 0xfa,0xae,0x0a,0x7e,0x01,0x1b,0x00,0x00
 198
 199 # GFX10: v_exp_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xb0,0x0a,0x7e,0x01,0x1b,0x00,0x00]
 200 0xfa,0xb0,0x0a,0x7e,0x01,0x1b,0x00,0x00
 201
 202 # GFX10: v_frexp_mant_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xb2,0x0a,0x7e,0x01,0x1b,0x00,0x00]
 203 0xfa,0xb2,0x0a,0x7e,0x01,0x1b,0x00,0x00
 204
 205 # GFX10: v_frexp_exp_i16_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xb4,0x0a,0x7e,0x01,0x1b,0x00,0x00]
 206 0xfa,0xb4,0x0a,0x7e,0x01,0x1b,0x00,0x00
 207
 208 # GFX10: v_floor_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xb6,0x0a,0x7e,0x01,0x1b,0x00,0x00]
 209 0xfa,0xb6,0x0a,0x7e,0x01,0x1b,0x00,0x00
 210
 211 # GFX10: v_ceil_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xb8,0x0a,0x7e,0x01,0x1b,0x00,0x00]
 212 0xfa,0xb8,0x0a,0x7e,0x01,0x1b,0x00,0x00
 213
 214 # GFX10: v_trunc_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xba,0x0a,0x7e,0x01,0x1b,0x00,0x00]
 215 0xfa,0xba,0x0a,0x7e,0x01,0x1b,0x00,0x00
 216
 217 # GFX10: v_rndne_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xbc,0x0a,0x7e,0x01,0x1b,0x00,0x00]
 218 0xfa,0xbc,0x0a,0x7e,0x01,0x1b,0x00,0x00
 219
 220 # GFX10: v_fract_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xbe,0x0a,0x7e,0x01,0x1b,0x00,0x00]
 221 0xfa,0xbe,0x0a,0x7e,0x01,0x1b,0x00,0x00
 222
 223 # GFX10: v_sin_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xc0,0x0a,0x7e,0x01,0x1b,0x00,0x00]
 224 0xfa,0xc0,0x0a,0x7e,0x01,0x1b,0x00,0x00
 225
 226 # GFX10: v_cos_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xc2,0x0a,0x7e,0x01,0x1b,0x00,0x00]
 227 0xfa,0xc2,0x0a,0x7e,0x01,0x1b,0x00,0x00
 228
 229 # GFX10: v_sat_pk_u8_i16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xc4,0x0a,0x7e,0x01,0x1b,0x00,0x00]
 230 0xfa,0xc4,0x0a,0x7e,0x01,0x1b,0x00,0x00
 231
 232 # GFX10: v_cvt_norm_i16_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xc6,0x0a,0x7e,0x01,0x1b,0x00,0x00]
 233 0xfa,0xc6,0x0a,0x7e,0x01,0x1b,0x00,0x00
 234
 235 # GFX10: v_cvt_norm_u16_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xc8,0x0a,0x7e,0x01,0x1b,0x00,0x00]
 236 0xfa,0xc8,0x0a,0x7e,0x01,0x1b,0x00,0x00
 237
 238 # GFX10: v_add_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x06,0x01,0x1b,0x00,0x00]
 239 0xfa,0x04,0x0a,0x06,0x01,0x1b,0x00,0x00
 240
 241 # GFX10: v_add_f32_dpp v5, -v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x06,0x01,0x1b,0x10,0x00]
 242 0xfa,0x04,0x0a,0x06,0x01,0x1b,0x10,0x00
 243
 244 # GFX10: v_add_f32_dpp v5, |v1|, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x06,0x01,0x1b,0x20,0x00]
 245 0xfa,0x04,0x0a,0x06,0x01,0x1b,0x20,0x00
 246
 247 # GFX10: v_add_f32_dpp v5, v1, -v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x06,0x01,0x1b,0x40,0x00]
 248 0xfa,0x04,0x0a,0x06,0x01,0x1b,0x40,0x00
 249
 250 # GFX10: v_add_f32_dpp v5, v1, |v2| quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x06,0x01,0x1b,0x80,0x00]
 251 0xfa,0x04,0x0a,0x06,0x01,0x1b,0x80,0x00
 252
 253 # GFX10: v_sub_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x08,0x01,0x1b,0x00,0x00]
 254 0xfa,0x04,0x0a,0x08,0x01,0x1b,0x00,0x00
 255
 256 # GFX10: v_subrev_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x0a,0x01,0x1b,0x00,0x00]
 257 0xfa,0x04,0x0a,0x0a,0x01,0x1b,0x00,0x00
 258
 259 # GFX10: v_mul_legacy_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x0e,0x01,0x1b,0x00,0x00]
 260 0xfa,0x04,0x0a,0x0e,0x01,0x1b,0x00,0x00
 261
 262 # GFX10: v_mul_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x10,0x01,0x1b,0x00,0x00]
 263 0xfa,0x04,0x0a,0x10,0x01,0x1b,0x00,0x00
 264
 265 # GFX10: v_mul_i32_i24_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x12,0x01,0x1b,0x00,0x00]
 266 0xfa,0x04,0x0a,0x12,0x01,0x1b,0x00,0x00
 267
 268 # GFX10: v_mul_hi_i32_i24_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x14,0x01,0x1b,0x00,0x00]
 269 0xfa,0x04,0x0a,0x14,0x01,0x1b,0x00,0x00
 270
 271 # GFX10: v_mul_u32_u24_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x16,0x01,0x1b,0x00,0x00]
 272 0xfa,0x04,0x0a,0x16,0x01,0x1b,0x00,0x00
 273
 274 # GFX10: v_mul_hi_u32_u24_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x18,0x01,0x1b,0x00,0x00]
 275 0xfa,0x04,0x0a,0x18,0x01,0x1b,0x00,0x00
 276
 277 # GFX10: v_min_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x1e,0x01,0x1b,0x00,0x00]
 278 0xfa,0x04,0x0a,0x1e,0x01,0x1b,0x00,0x00
 279
 280 # GFX10: v_max_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x20,0x01,0x1b,0x00,0x00]
 281 0xfa,0x04,0x0a,0x20,0x01,0x1b,0x00,0x00
 282
 283 # GFX10: v_min_i32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x22,0x01,0x1b,0x00,0x00]
 284 0xfa,0x04,0x0a,0x22,0x01,0x1b,0x00,0x00
 285
 286 # GFX10: v_max_i32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x24,0x01,0x1b,0x00,0x00]
 287 0xfa,0x04,0x0a,0x24,0x01,0x1b,0x00,0x00
 288
 289 # GFX10: v_min_u32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x26,0x01,0x1b,0x00,0x00]
 290 0xfa,0x04,0x0a,0x26,0x01,0x1b,0x00,0x00
 291
 292 # GFX10: v_max_u32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x28,0x01,0x1b,0x00,0x00]
 293 0xfa,0x04,0x0a,0x28,0x01,0x1b,0x00,0x00
 294
 295 # GFX10: v_lshrrev_b32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x2c,0x01,0x1b,0x00,0x00]
 296 0xfa,0x04,0x0a,0x2c,0x01,0x1b,0x00,0x00
 297
 298 # GFX10: v_ashrrev_i32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x30,0x01,0x1b,0x00,0x00]
 299 0xfa,0x04,0x0a,0x30,0x01,0x1b,0x00,0x00
 300
 301 # GFX10: v_lshlrev_b32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0x1b,0x00,0x00]
 302 0xfa,0x04,0x0a,0x34,0x01,0x1b,0x00,0x00
 303
 304 # GFX10: v_and_b32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0x1b,0x00,0x00]
 305 0xfa,0x04,0x0a,0x36,0x01,0x1b,0x00,0x00
 306
 307 # GFX10: v_or_b32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0x1b,0x00,0x00]
 308 0xfa,0x04,0x0a,0x38,0x01,0x1b,0x00,0x00
 309
 310 # GFX10: v_xor_b32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0x1b,0x00,0x00]
 311 0xfa,0x04,0x0a,0x3a,0x01,0x1b,0x00,0x00
 312
 313 # GFX10: v_xnor_b32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0x1b,0x00,0x00]
 314 0xfa,0x04,0x0a,0x3c,0x01,0x1b,0x00,0x00
 315
 316 # GFX10: v_mac_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x3e,0x01,0x1b,0x00,0x00]
 317 0xfa,0x04,0x0a,0x3e,0x01,0x1b,0x00,0x00
 318
 319 # W32: v_cndmask_b32_dpp v0, v1, v2, vcc_lo  dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x00,0x02,0x01,0x77,0x39,0x05]
 320 # W64: v_cndmask_b32_dpp v0, v1, v2, vcc  dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x00,0x02,0x01,0x77,0x39,0x05]
 321 0xe9,0x04,0x00,0x02,0x01,0x77,0x39,0x05
 322
 323 # W32: v_cndmask_b32_dpp v0, v1, v2, vcc_lo  dpp8:[0,1,2,3,4,5,6,7] fi:1 ; encoding: [0xea,0x04,0x00,0x02,0x01,0x88,0xc6,0xfa]
 324 # W64: v_cndmask_b32_dpp v0, v1, v2, vcc  dpp8:[0,1,2,3,4,5,6,7] fi:1 ; encoding: [0xea,0x04,0x00,0x02,0x01,0x88,0xc6,0xfa]
 325 0xea,0x04,0x00,0x02,0x01,0x88,0xc6,0xfa
 326
 327 # W32: v_add_co_ci_u32_dpp v5, vcc_lo, v1, v2, vcc_lo quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x50,0x01,0x1b,0x00,0x00]
 328 # W64: v_add_co_ci_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x50,0x01,0x1b,0x00,0x00]
 329 0xfa,0x04,0x0a,0x50,0x01,0x1b,0x00,0x00
 330
 331 # W32: v_sub_co_ci_u32_dpp v5, vcc_lo, v1, v2, vcc_lo quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x52,0x01,0x1b,0x00,0x00]
 332 # W64: v_sub_co_ci_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x52,0x01,0x1b,0x00,0x00]
 333 0xfa,0x04,0x0a,0x52,0x01,0x1b,0x00,0x00
 334
 335 # W32: v_subrev_co_ci_u32_dpp v5, vcc_lo, v1, v2, vcc_lo quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x54,0x01,0x1b,0x00,0x00]
 336 # W64: v_subrev_co_ci_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x54,0x01,0x1b,0x00,0x00]
 337 0xfa,0x04,0x0a,0x54,0x01,0x1b,0x00,0x00
 338
 339 # GFX10: v_fmac_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x56,0x01,0x1b,0x00,0x00]
 340 0xfa,0x04,0x0a,0x56,0x01,0x1b,0x00,0x00
 341
 342 # GFX10: v_add_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x64,0x01,0x1b,0x00,0x00]
 343 0xfa,0x04,0x0a,0x64,0x01,0x1b,0x00,0x00
 344
 345 # GFX10: v_sub_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x66,0x01,0x1b,0x00,0x00]
 346 0xfa,0x04,0x0a,0x66,0x01,0x1b,0x00,0x00
 347
 348 # GFX10: v_subrev_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x68,0x01,0x1b,0x00,0x00]
 349 0xfa,0x04,0x0a,0x68,0x01,0x1b,0x00,0x00
 350
 351 # GFX10: v_mul_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6a,0x01,0x1b,0x00,0x00]
 352 0xfa,0x04,0x0a,0x6a,0x01,0x1b,0x00,0x00
 353
 354 # GFX10: v_fmac_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6c,0x01,0x1b,0x00,0x00]
 355 0xfa,0x04,0x0a,0x6c,0x01,0x1b,0x00,0x00
 356
 357 # GFX10: v_max_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0x1b,0x00,0x00]
 358 0xfa,0x04,0x0a,0x72,0x01,0x1b,0x00,0x00
 359
 360 # GFX10: v_min_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x74,0x01,0x1b,0x00,0x00]
 361 0xfa,0x04,0x0a,0x74,0x01,0x1b,0x00,0x00
 362
 363 # GFX10: v_ldexp_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x76,0x01,0x1b,0x00,0x00]
 364 0xfa,0x04,0x0a,0x76,0x01,0x1b,0x00,0x00
 365
 366 # GFX10: v_mov_b32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x02,0x0a,0x7e,0x01,0x1b,0x04,0x00]
 367 0xfa,0x02,0x0a,0x7e,0x01,0x1b,0x04,0x00
 368
 369 # GFX10: v_cvt_f32_i32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x0a,0x0a,0x7e,0x01,0x1b,0x04,0x00]
 370 0xfa,0x0a,0x0a,0x7e,0x01,0x1b,0x04,0x00
 371
 372 # GFX10: v_cvt_f32_u32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x0c,0x0a,0x7e,0x01,0x1b,0x04,0x00]
 373 0xfa,0x0c,0x0a,0x7e,0x01,0x1b,0x04,0x00
 374
 375 # GFX10: v_cvt_u32_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x0e,0x0a,0x7e,0x01,0x1b,0x04,0x00]
 376 0xfa,0x0e,0x0a,0x7e,0x01,0x1b,0x04,0x00
 377
 378 # GFX10: v_cvt_i32_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x10,0x0a,0x7e,0x01,0x1b,0x04,0x00]
 379 0xfa,0x10,0x0a,0x7e,0x01,0x1b,0x04,0x00
 380
 381 # GFX10: v_cvt_f16_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x14,0x0a,0x7e,0x01,0x1b,0x04,0x00]
 382 0xfa,0x14,0x0a,0x7e,0x01,0x1b,0x04,0x00
 383
 384 # GFX10: v_cvt_f32_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x16,0x0a,0x7e,0x01,0x1b,0x04,0x00]
 385 0xfa,0x16,0x0a,0x7e,0x01,0x1b,0x04,0x00
 386
 387 # GFX10: v_cvt_rpi_i32_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x18,0x0a,0x7e,0x01,0x1b,0x04,0x00]
 388 0xfa,0x18,0x0a,0x7e,0x01,0x1b,0x04,0x00
 389
 390 # GFX10: v_cvt_flr_i32_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x1a,0x0a,0x7e,0x01,0x1b,0x04,0x00]
 391 0xfa,0x1a,0x0a,0x7e,0x01,0x1b,0x04,0x00
 392
 393 # GFX10: v_cvt_off_f32_i4_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x1c,0x0a,0x7e,0x01,0x1b,0x04,0x00]
 394 0xfa,0x1c,0x0a,0x7e,0x01,0x1b,0x04,0x00
 395
 396 # GFX10: v_cvt_f32_ubyte0_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x22,0x0a,0x7e,0x01,0x1b,0x04,0x00]
 397 0xfa,0x22,0x0a,0x7e,0x01,0x1b,0x04,0x00
 398
 399 # GFX10: v_cvt_f32_ubyte1_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x24,0x0a,0x7e,0x01,0x1b,0x04,0x00]
 400 0xfa,0x24,0x0a,0x7e,0x01,0x1b,0x04,0x00
 401
 402 # GFX10: v_cvt_f32_ubyte2_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x26,0x0a,0x7e,0x01,0x1b,0x04,0x00]
 403 0xfa,0x26,0x0a,0x7e,0x01,0x1b,0x04,0x00
 404
 405 # GFX10: v_cvt_f32_ubyte3_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x28,0x0a,0x7e,0x01,0x1b,0x04,0x00]
 406 0xfa,0x28,0x0a,0x7e,0x01,0x1b,0x04,0x00
 407
 408 # GFX10: v_fract_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x40,0x0a,0x7e,0x01,0x1b,0x04,0x00]
 409 0xfa,0x40,0x0a,0x7e,0x01,0x1b,0x04,0x00
 410
 411 # GFX10: v_trunc_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x42,0x0a,0x7e,0x01,0x1b,0x04,0x00]
 412 0xfa,0x42,0x0a,0x7e,0x01,0x1b,0x04,0x00
 413
 414 # GFX10: v_ceil_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x44,0x0a,0x7e,0x01,0x1b,0x04,0x00]
 415 0xfa,0x44,0x0a,0x7e,0x01,0x1b,0x04,0x00
 416
 417 # GFX10: v_rndne_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x46,0x0a,0x7e,0x01,0x1b,0x04,0x00]
 418 0xfa,0x46,0x0a,0x7e,0x01,0x1b,0x04,0x00
 419
 420 # GFX10: v_floor_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x48,0x0a,0x7e,0x01,0x1b,0x04,0x00]
 421 0xfa,0x48,0x0a,0x7e,0x01,0x1b,0x04,0x00
 422
 423 # GFX10: v_exp_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x4a,0x0a,0x7e,0x01,0x1b,0x04,0x00]
 424 0xfa,0x4a,0x0a,0x7e,0x01,0x1b,0x04,0x00
 425
 426 # GFX10: v_log_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x4e,0x0a,0x7e,0x01,0x1b,0x04,0x00]
 427 0xfa,0x4e,0x0a,0x7e,0x01,0x1b,0x04,0x00
 428
 429 # GFX10: v_rcp_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x54,0x0a,0x7e,0x01,0x1b,0x04,0x00]
 430 0xfa,0x54,0x0a,0x7e,0x01,0x1b,0x04,0x00
 431
 432 # GFX10: v_rcp_iflag_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x56,0x0a,0x7e,0x01,0x1b,0x04,0x00]
 433 0xfa,0x56,0x0a,0x7e,0x01,0x1b,0x04,0x00
 434
 435 # GFX10: v_rsq_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x5c,0x0a,0x7e,0x01,0x1b,0x04,0x00]
 436 0xfa,0x5c,0x0a,0x7e,0x01,0x1b,0x04,0x00
 437
 438 # GFX10: v_sqrt_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x66,0x0a,0x7e,0x01,0x1b,0x04,0x00]
 439 0xfa,0x66,0x0a,0x7e,0x01,0x1b,0x04,0x00
 440
 441 # GFX10: v_sin_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x6a,0x0a,0x7e,0x01,0x1b,0x04,0x00]
 442 0xfa,0x6a,0x0a,0x7e,0x01,0x1b,0x04,0x00
 443
 444 # GFX10: v_cos_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x6c,0x0a,0x7e,0x01,0x1b,0x04,0x00]
 445 0xfa,0x6c,0x0a,0x7e,0x01,0x1b,0x04,0x00
 446
 447 # GFX10: v_not_b32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x6e,0x0a,0x7e,0x01,0x1b,0x04,0x00]
 448 0xfa,0x6e,0x0a,0x7e,0x01,0x1b,0x04,0x00
 449
 450 # GFX10: v_bfrev_b32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x70,0x0a,0x7e,0x01,0x1b,0x04,0x00]
 451 0xfa,0x70,0x0a,0x7e,0x01,0x1b,0x04,0x00
 452
 453 # GFX10: v_ffbh_u32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x72,0x0a,0x7e,0x01,0x1b,0x04,0x00]
 454 0xfa,0x72,0x0a,0x7e,0x01,0x1b,0x04,0x00
 455
 456 # GFX10: v_ffbl_b32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x74,0x0a,0x7e,0x01,0x1b,0x04,0x00]
 457 0xfa,0x74,0x0a,0x7e,0x01,0x1b,0x04,0x00
 458
 459 # GFX10: v_ffbh_i32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x76,0x0a,0x7e,0x01,0x1b,0x04,0x00]
 460 0xfa,0x76,0x0a,0x7e,0x01,0x1b,0x04,0x00
 461
 462 # GFX10: v_frexp_exp_i32_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x7e,0x0a,0x7e,0x01,0x1b,0x04,0x00]
 463 0xfa,0x7e,0x0a,0x7e,0x01,0x1b,0x04,0x00
 464
 465 # GFX10: v_frexp_mant_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x80,0x0a,0x7e,0x01,0x1b,0x04,0x00]
 466 0xfa,0x80,0x0a,0x7e,0x01,0x1b,0x04,0x00
 467
 468 # GFX10: v_cvt_f16_u16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xa0,0x0a,0x7e,0x01,0x1b,0x04,0x00]
 469 0xfa,0xa0,0x0a,0x7e,0x01,0x1b,0x04,0x00
 470
 471 # GFX10: v_cvt_f16_i16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xa2,0x0a,0x7e,0x01,0x1b,0x04,0x00]
 472 0xfa,0xa2,0x0a,0x7e,0x01,0x1b,0x04,0x00
 473
 474 # GFX10: v_cvt_u16_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xa4,0x0a,0x7e,0x01,0x1b,0x04,0x00]
 475 0xfa,0xa4,0x0a,0x7e,0x01,0x1b,0x04,0x00
 476
 477 # GFX10: v_cvt_i16_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xa6,0x0a,0x7e,0x01,0x1b,0x04,0x00]
 478 0xfa,0xa6,0x0a,0x7e,0x01,0x1b,0x04,0x00
 479
 480 # GFX10: v_rcp_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xa8,0x0a,0x7e,0x01,0x1b,0x04,0x00]
 481 0xfa,0xa8,0x0a,0x7e,0x01,0x1b,0x04,0x00
 482
 483 # GFX10: v_sqrt_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xaa,0x0a,0x7e,0x01,0x1b,0x04,0x00]
 484 0xfa,0xaa,0x0a,0x7e,0x01,0x1b,0x04,0x00
 485
 486 # GFX10: v_rsq_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xac,0x0a,0x7e,0x01,0x1b,0x04,0x00]
 487 0xfa,0xac,0x0a,0x7e,0x01,0x1b,0x04,0x00
 488
 489 # GFX10: v_log_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xae,0x0a,0x7e,0x01,0x1b,0x04,0x00]
 490 0xfa,0xae,0x0a,0x7e,0x01,0x1b,0x04,0x00
 491
 492 # GFX10: v_exp_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xb0,0x0a,0x7e,0x01,0x1b,0x04,0x00]
 493 0xfa,0xb0,0x0a,0x7e,0x01,0x1b,0x04,0x00
 494
 495 # GFX10: v_frexp_mant_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xb2,0x0a,0x7e,0x01,0x1b,0x04,0x00]
 496 0xfa,0xb2,0x0a,0x7e,0x01,0x1b,0x04,0x00
 497
 498 # GFX10: v_frexp_exp_i16_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xb4,0x0a,0x7e,0x01,0x1b,0x04,0x00]
 499 0xfa,0xb4,0x0a,0x7e,0x01,0x1b,0x04,0x00
 500
 501 # GFX10: v_floor_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xb6,0x0a,0x7e,0x01,0x1b,0x04,0x00]
 502 0xfa,0xb6,0x0a,0x7e,0x01,0x1b,0x04,0x00
 503
 504 # GFX10: v_ceil_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xb8,0x0a,0x7e,0x01,0x1b,0x04,0x00]
 505 0xfa,0xb8,0x0a,0x7e,0x01,0x1b,0x04,0x00
 506
 507 # GFX10: v_trunc_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xba,0x0a,0x7e,0x01,0x1b,0x04,0x00]
 508 0xfa,0xba,0x0a,0x7e,0x01,0x1b,0x04,0x00
 509
 510 # GFX10: v_rndne_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xbc,0x0a,0x7e,0x01,0x1b,0x04,0x00]
 511 0xfa,0xbc,0x0a,0x7e,0x01,0x1b,0x04,0x00
 512
 513 # GFX10: v_fract_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xbe,0x0a,0x7e,0x01,0x1b,0x04,0x00]
 514 0xfa,0xbe,0x0a,0x7e,0x01,0x1b,0x04,0x00
 515
 516 # GFX10: v_sin_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xc0,0x0a,0x7e,0x01,0x1b,0x04,0x00]
 517 0xfa,0xc0,0x0a,0x7e,0x01,0x1b,0x04,0x00
 518
 519 # GFX10: v_cos_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xc2,0x0a,0x7e,0x01,0x1b,0x04,0x00]
 520 0xfa,0xc2,0x0a,0x7e,0x01,0x1b,0x04,0x00
 521
 522 # GFX10: v_sat_pk_u8_i16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xc4,0x0a,0x7e,0x01,0x1b,0x04,0x00]
 523 0xfa,0xc4,0x0a,0x7e,0x01,0x1b,0x04,0x00
 524
 525 # GFX10: v_cvt_norm_i16_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xc6,0x0a,0x7e,0x01,0x1b,0x04,0x00]
 526 0xfa,0xc6,0x0a,0x7e,0x01,0x1b,0x04,0x00
 527
 528 # GFX10: v_cvt_norm_u16_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xc8,0x0a,0x7e,0x01,0x1b,0x04,0x00]
 529 0xfa,0xc8,0x0a,0x7e,0x01,0x1b,0x04,0x00
 530
 531 # GFX10: v_add_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x06,0x01,0x1b,0x04,0x00]
 532 0xfa,0x04,0x0a,0x06,0x01,0x1b,0x04,0x00
 533
 534 # GFX10: v_sub_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x08,0x01,0x1b,0x04,0x00]
 535 0xfa,0x04,0x0a,0x08,0x01,0x1b,0x04,0x00
 536
 537 # GFX10: v_subrev_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x0a,0x01,0x1b,0x04,0x00]
 538 0xfa,0x04,0x0a,0x0a,0x01,0x1b,0x04,0x00
 539
 540 # GFX10: v_mul_legacy_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x0e,0x01,0x1b,0x04,0x00]
 541 0xfa,0x04,0x0a,0x0e,0x01,0x1b,0x04,0x00
 542
 543 # GFX10: v_mul_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x10,0x01,0x1b,0x04,0x00]
 544 0xfa,0x04,0x0a,0x10,0x01,0x1b,0x04,0x00
 545
 546 # GFX10: v_mul_i32_i24_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x12,0x01,0x1b,0x04,0x00]
 547 0xfa,0x04,0x0a,0x12,0x01,0x1b,0x04,0x00
 548
 549 # GFX10: v_mul_hi_i32_i24_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x14,0x01,0x1b,0x04,0x00]
 550 0xfa,0x04,0x0a,0x14,0x01,0x1b,0x04,0x00
 551
 552 # GFX10: v_mul_u32_u24_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x16,0x01,0x1b,0x04,0x00]
 553 0xfa,0x04,0x0a,0x16,0x01,0x1b,0x04,0x00
 554
 555 # GFX10: v_mul_hi_u32_u24_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x18,0x01,0x1b,0x04,0x00]
 556 0xfa,0x04,0x0a,0x18,0x01,0x1b,0x04,0x00
 557
 558 # GFX10: v_min_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x1e,0x01,0x1b,0x04,0x00]
 559 0xfa,0x04,0x0a,0x1e,0x01,0x1b,0x04,0x00
 560
 561 # GFX10: v_max_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x20,0x01,0x1b,0x04,0x00]
 562 0xfa,0x04,0x0a,0x20,0x01,0x1b,0x04,0x00
 563
 564 # GFX10: v_min_i32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x22,0x01,0x1b,0x04,0x00]
 565 0xfa,0x04,0x0a,0x22,0x01,0x1b,0x04,0x00
 566
 567 # GFX10: v_max_i32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x24,0x01,0x1b,0x04,0x00]
 568 0xfa,0x04,0x0a,0x24,0x01,0x1b,0x04,0x00
 569
 570 # GFX10: v_min_u32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x26,0x01,0x1b,0x04,0x00]
 571 0xfa,0x04,0x0a,0x26,0x01,0x1b,0x04,0x00
 572
 573 # GFX10: v_max_u32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x28,0x01,0x1b,0x04,0x00]
 574 0xfa,0x04,0x0a,0x28,0x01,0x1b,0x04,0x00
 575
 576 # GFX10: v_lshrrev_b32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x2c,0x01,0x1b,0x04,0x00]
 577 0xfa,0x04,0x0a,0x2c,0x01,0x1b,0x04,0x00
 578
 579 # GFX10: v_ashrrev_i32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x30,0x01,0x1b,0x04,0x00]
 580 0xfa,0x04,0x0a,0x30,0x01,0x1b,0x04,0x00
 581
 582 # GFX10: v_lshlrev_b32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0x1b,0x04,0x00]
 583 0xfa,0x04,0x0a,0x34,0x01,0x1b,0x04,0x00
 584
 585 # GFX10: v_and_b32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0x1b,0x04,0x00]
 586 0xfa,0x04,0x0a,0x36,0x01,0x1b,0x04,0x00
 587
 588 # GFX10: v_or_b32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0x1b,0x04,0x00]
 589 0xfa,0x04,0x0a,0x38,0x01,0x1b,0x04,0x00
 590
 591 # GFX10: v_xor_b32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0x1b,0x04,0x00]
 592 0xfa,0x04,0x0a,0x3a,0x01,0x1b,0x04,0x00
 593
 594 # GFX10: v_xnor_b32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0x1b,0x04,0x00]
 595 0xfa,0x04,0x0a,0x3c,0x01,0x1b,0x04,0x00
 596
 597 # GFX10: v_mac_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x3e,0x01,0x1b,0x04,0x00]
 598 0xfa,0x04,0x0a,0x3e,0x01,0x1b,0x04,0x00
 599
 600 # W32: v_add_co_ci_u32_dpp v5, vcc_lo, v1, v2, vcc_lo quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x50,0x01,0x1b,0x04,0x00]
 601 # W64: v_add_co_ci_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x50,0x01,0x1b,0x04,0x00]
 602 0xfa,0x04,0x0a,0x50,0x01,0x1b,0x04,0x00
 603
 604 # W32: v_sub_co_ci_u32_dpp v5, vcc_lo, v1, v2, vcc_lo quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x52,0x01,0x1b,0x04,0x00]
 605 # W64: v_sub_co_ci_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x52,0x01,0x1b,0x04,0x00]
 606 0xfa,0x04,0x0a,0x52,0x01,0x1b,0x04,0x00
 607
 608 # W32: v_subrev_co_ci_u32_dpp v5, vcc_lo, v1, v2, vcc_lo quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x54,0x01,0x1b,0x04,0x00]
 609 # W64: v_subrev_co_ci_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x54,0x01,0x1b,0x04,0x00]
 610 0xfa,0x04,0x0a,0x54,0x01,0x1b,0x04,0x00
 611
 612 # GFX10: v_fmac_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x56,0x01,0x1b,0x04,0x00]
 613 0xfa,0x04,0x0a,0x56,0x01,0x1b,0x04,0x00
 614
 615 # GFX10: v_add_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x64,0x01,0x1b,0x04,0x00]
 616 0xfa,0x04,0x0a,0x64,0x01,0x1b,0x04,0x00
 617
 618 # GFX10: v_sub_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x66,0x01,0x1b,0x04,0x00]
 619 0xfa,0x04,0x0a,0x66,0x01,0x1b,0x04,0x00
 620
 621 # GFX10: v_subrev_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x68,0x01,0x1b,0x04,0x00]
 622 0xfa,0x04,0x0a,0x68,0x01,0x1b,0x04,0x00
 623
 624 # GFX10: v_mul_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x6a,0x01,0x1b,0x04,0x00]
 625 0xfa,0x04,0x0a,0x6a,0x01,0x1b,0x04,0x00
 626
 627 # GFX10: v_fmac_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x6c,0x01,0x1b,0x04,0x00]
 628 0xfa,0x04,0x0a,0x6c,0x01,0x1b,0x04,0x00
 629
 630 # GFX10: v_max_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0x1b,0x04,0x00]
 631 0xfa,0x04,0x0a,0x72,0x01,0x1b,0x04,0x00
 632
 633 # GFX10: v_min_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x74,0x01,0x1b,0x04,0x00]
 634 0xfa,0x04,0x0a,0x74,0x01,0x1b,0x04,0x00
 635
 636 # GFX10: v_ldexp_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x76,0x01,0x1b,0x04,0x00]
 637 0xfa,0x04,0x0a,0x76,0x01,0x1b,0x04,0x00
 638
 639 # GFX10: v_add_nc_u32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x4a,0x01,0x1b,0x00,0x00]
 640 0xfa,0x04,0x0a,0x4a,0x01,0x1b,0x00,0x00
 641
 642 # GFX10: v_add_nc_u32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 bound_ctrl:0 ; encoding: [0xfa,0x04,0x0a,0x4a,0x01,0x1b,0x08,0x00]
 643 0xfa,0x04,0x0a,0x4a,0x01,0x1b,0x08,0x00
 644
 645 # GFX10: v_add_nc_u32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x4a,0x01,0x1b,0x04,0x00]
 646 0xfa,0x04,0x0a,0x4a,0x01,0x1b,0x04,0x00
 647
 648 # GFX10: v_sub_nc_u32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x4c,0x01,0x40,0x01,0x00]
 649 0xfa,0x04,0x0a,0x4c,0x01,0x40,0x01,0x00
 650
 651 # GFX10: v_sub_nc_u32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x4c,0x01,0x1b,0x04,0x00]
 652 0xfa,0x04,0x0a,0x4c,0x01,0x1b,0x04,0x00
 653
 654 # GFX10: v_subrev_nc_u32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x4e,0x01,0x1f,0x01,0x00]
 655 0xfa,0x04,0x0a,0x4e,0x01,0x1f,0x01,0x00
 656
 657 # GFX10: v_subrev_nc_u32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x4e,0x01,0x1b,0x04,0x00]
 658 0xfa,0x04,0x0a,0x4e,0x01,0x1b,0x04,0x00