test/MC/Disassembler/AMDGPU/mimg_vi.txt

   1 # RUN: llvm-mc -arch=amdgcn -mcpu=tonga -disassemble -show-encoding < %s | FileCheck %s -check-prefix=VI -check-prefix=GFX80
   2 # RUN: llvm-mc -arch=amdgcn -mcpu=gfx810 -disassemble -show-encoding < %s | FileCheck %s -check-prefix=VI -check-prefix=GFX81
   3
   4 #===------------------------------------------------------------------------===#
   5 # Image load/store
   6 #===------------------------------------------------------------------------===#
   7
   8 # VI: image_load v[0:3], v4, s[8:15] dmask:0xf unorm ; encoding: [0x00,0x1f,0x00,0xf0,0x04,0x00,0x02,0x00]
   9 0x00 0x1f 0x00 0xf0 0x04 0x00 0x02 0x00
  10
  11 # VI: image_load v[0:2], v4, s[8:15] dmask:0xe unorm ; encoding: [0x00,0x1e,0x00,0xf0,0x04,0x00,0x02,0x00]
  12 0x00 0x1e 0x00 0xf0 0x04 0x00 0x02 0x00
  13
  14 # VI: image_load v[0:1], v0, s[0:7] dmask:0x3 unorm ; encoding: [0x00,0x13,0x00,0xf0,0x00,0x00,0x00,0x00]
  15 0x00 0x13 0x00 0xf0 0x00 0x00 0x00 0x00
  16
  17 # VI: image_load v0, v0, s[0:7] dmask:0x1 unorm ; encoding:   [0x00,0x11,0x00,0xf0,0x00,0x00,0x00,0x00]
  18 0x00 0x11 0x00 0xf0 0x00 0x00 0x00 0x00
  19
  20 # VI: image_store v[0:3], v4, s[0:7] dmask:0xf unorm ; encoding: [0x00,0x1f,0x20,0xf0,0x04,0x00,0x00,0x00]
  21 0x00 0x1f 0x20 0xf0 0x04 0x00 0x00 0x00
  22
  23 # VI: image_store v[0:2], v4, s[0:7] dmask:0xe unorm ; encoding: [0x00,0x1e,0x20,0xf0,0x04,0x00,0x00,0x00]
  24 0x00 0x1e 0x20 0xf0 0x04 0x00 0x00 0x00
  25
  26 # VI: image_store v[0:1], v2, s[0:7] dmask:0x3 unorm ; encoding: [0x00,0x13,0x20,0xf0,0x02,0x00,0x00,0x00]
  27 0x00 0x13 0x20 0xf0 0x02 0x00 0x00 0x00
  28
  29 # VI: image_store v0, v1, s[0:7] dmask:0x1 unorm ; encoding: [0x00,0x11,0x20,0xf0,0x01,0x00,0x00,0x00]
  30 0x00 0x11 0x20 0xf0 0x01 0x00 0x00 0x00
  31
  32 # Test all modifiers
  33 # FIXME: This test is incorrect because r128 assumes a 128-bit SRSRC.
  34 # FIXME: This test is incorrect because tfe shall increase data size by 1.
  35 # VI: image_load v5, v1, s[8:15] dmask:0x1 unorm glc slc r128 tfe lwe da d16 ; encoding: [0x00,0xf1,0x03,0xf2,0x01,0x05,0x02,0x80]
  36 0x00,0xf1,0x03,0xf2,0x01,0x05,0x02,0x80
  37
  38 # Test dmask == 0
  39 # VI: image_load v0, v4, s[8:15] unorm ; encoding: [0x00,0x10,0x00,0xf0,0x04,0x00,0x02,0x00]
  40 0x00 0x10 0x00 0xf0 0x04 0x00 0x02 0x00
  41
  42 # Test out of bounds register width
  43 # VI: image_load v254, v0, s[0:7] dmask:0x7 unorm ; encoding: [0x00,0x17,0x00,0xf0,0x00,0xfe,0x00,0x00]
  44 0x00 0x17 0x00 0xf0 0x00 0xfe 0x00 0x00
  45
  46 # VI: image_load v255, v0, s[0:7] dmask:0x1 unorm ; encoding: [0x00,0x11,0x00,0xf0,0x00,0xff,0x00,0x00]
  47 0x00 0x11 0x00 0xf0 0x00 0xff 0x00 0x00
  48
  49 # VI: image_load v255, v0, s[0:7] dmask:0x3 unorm ; encoding: [0x00,0x13,0x00,0xf0,0x00,0xff,0x00,0x00]
  50 0x00 0x13 0x00 0xf0 0x00 0xff 0x00 0x00
  51
  52 #===------------------------------------------------------------------------===#
  53 # Image load/store: packed/unpacked d16
  54 #===------------------------------------------------------------------------===#
  55
  56 # GFX80: image_load v[0:1], v4, s[8:15] dmask:0x3 d16 ; encoding: [0x00,0x03,0x00,0xf0,0x04,0x00,0x02,0x80]
  57 # GFX81: image_load v0, v4, s[8:15] dmask:0x3 d16 ; encoding: [0x00,0x03,0x00,0xf0,0x04,0x00,0x02,0x80]
  58 0x00,0x03,0x00,0xf0,0x04,0x00,0x02,0x80
  59
  60 # GFX80: image_load v[0:2], v4, s[8:15] dmask:0x7 d16 ; encoding: [0x00,0x07,0x00,0xf0,0x04,0x00,0x02,0x80]
  61 # GFX81: image_load v[0:1], v4, s[8:15] dmask:0x7 d16 ; encoding: [0x00,0x07,0x00,0xf0,0x04,0x00,0x02,0x80]
  62 0x00,0x07,0x00,0xf0,0x04,0x00,0x02,0x80
  63
  64 # GFX80: image_load v[0:3], v4, s[8:15] dmask:0xf d16 ; encoding: [0x00,0x0f,0x00,0xf0,0x04,0x00,0x02,0x80]
  65 # GFX81: image_load v[0:1], v4, s[8:15] dmask:0xf d16 ; encoding: [0x00,0x0f,0x00,0xf0,0x04,0x00,0x02,0x80]
  66 0x00,0x0f,0x00,0xf0,0x04,0x00,0x02,0x80
  67
  68 # GFX80: image_store v[0:1], v4, s[8:15] dmask:0x3 d16 ; encoding: [0x00,0x03,0x20,0xf0,0x04,0x00,0x02,0x80]
  69 # GFX81: image_store v0, v4, s[8:15] dmask:0x3 d16 ; encoding: [0x00,0x03,0x20,0xf0,0x04,0x00,0x02,0x80]
  70 0x00,0x03,0x20,0xf0,0x04,0x00,0x02,0x80
  71
  72 # GFX80: image_store v[0:2], v4, s[8:15] dmask:0x7 d16 ; encoding: [0x00,0x07,0x20,0xf0,0x04,0x00,0x02,0x80]
  73 # GFX81: image_store v[0:1], v4, s[8:15] dmask:0x7 d16 ; encoding: [0x00,0x07,0x20,0xf0,0x04,0x00,0x02,0x80]
  74 0x00,0x07,0x20,0xf0,0x04,0x00,0x02,0x80
  75
  76 # GFX80: image_store v[0:3], v4, s[8:15] dmask:0xf d16 ; encoding: [0x00,0x0f,0x20,0xf0,0x04,0x00,0x02,0x80]
  77 # GFX81: image_store v[0:1], v4, s[8:15] dmask:0xf d16 ; encoding: [0x00,0x0f,0x20,0xf0,0x04,0x00,0x02,0x80]
  78 0x00,0x0f,0x20,0xf0,0x04,0x00,0x02,0x80
  79
  80 #===------------------------------------------------------------------------===#
  81 # Image load/store: PCK variants
  82 #===------------------------------------------------------------------------===#
  83
  84 # VI: image_load_mip_pck v5, v1, s[8:15] dmask:0x1 ; encoding: [0x00,0x01,0x10,0xf0,0x01,0x05,0x02,0x00]
  85 0x00,0x01,0x10,0xf0,0x01,0x05,0x02,0x00
  86
  87 # VI: image_load_mip_pck v[5:6], v1, s[8:15] dmask:0x3 ; encoding: [0x00,0x03,0x10,0xf0,0x01,0x05,0x02,0x00]
  88 0x00,0x03,0x10,0xf0,0x01,0x05,0x02,0x00
  89
  90 # VI: image_load_mip_pck_sgn v[5:6], v1, s[8:15] dmask:0x5 ; encoding: [0x00,0x05,0x14,0xf0,0x01,0x05,0x02,0x00]
  91 0x00,0x05,0x14,0xf0,0x01,0x05,0x02,0x00
  92
  93 # VI: image_load_pck v5, v1, s[8:15] dmask:0x1 glc ; encoding: [0x00,0x21,0x08,0xf0,0x01,0x05,0x02,0x00]
  94 0x00,0x21,0x08,0xf0,0x01,0x05,0x02,0x00
  95
  96 # VI: image_load_pck_sgn v5, v1, s[8:15] dmask:0x1 lwe ; encoding: [0x00,0x01,0x0e,0xf0,0x01,0x05,0x02,0x00]
  97 0x00,0x01,0x0e,0xf0,0x01,0x05,0x02,0x00
  98
  99 # VI: image_store_mip_pck v252, v2, s[12:19] dmask:0x1 unorm ; encoding: [0x00,0x11,0x2c,0xf0,0x02,0xfc,0x03,0x00]
 100 0x00,0x11,0x2c,0xf0,0x02,0xfc,0x03,0x00
 101
 102 # VI: image_store_mip_pck v1, v2, s[12:19] dmask:0x1 unorm glc slc lwe da ; encoding: [0x00,0x71,0x2e,0xf2,0x02,0x01,0x03,0x00]
 103 0x00,0x71,0x2e,0xf2,0x02,0x01,0x03,0x00
 104
 105 # VI: image_store_pck v1, v2, s[12:19] dmask:0x1 unorm da ; encoding: [0x00,0x51,0x28,0xf0,0x02,0x01,0x03,0x00]
 106 0x00,0x51,0x28,0xf0,0x02,0x01,0x03,0x00
 107
 108 #===------------------------------------------------------------------------===#
 109 # Image sample
 110 #===------------------------------------------------------------------------===#
 111
 112 # VI: image_sample v[193:195], v237, s[28:35], s[4:7] dmask:0x7 unorm ; encoding: [0x00,0x17,0x80,0xf0,0xed,0xc1,0x27,0x00]
 113 0x00,0x17,0x80,0xf0,0xed,0xc1,0x27,0x00
 114
 115 # GFX80: image_sample v[193:194], v237, s[28:35], s[4:7] dmask:0x3 d16 ; encoding: [0x00,0x03,0x80,0xf0,0xed,0xc1,0x27,0x80]
 116 # GFX81: image_sample v193, v237, s[28:35], s[4:7] dmask:0x3 d16 ; encoding: [0x00,0x03,0x80,0xf0,0xed,0xc1,0x27,0x80]
 117 0x00,0x03,0x80,0xf0,0xed,0xc1,0x27,0x80
 118
 119 # GFX80: image_sample v[193:195], v237, s[28:35], s[4:7] dmask:0x7 d16 ; encoding: [0x00,0x07,0x80,0xf0,0xed,0xc1,0x27,0x80]
 120 # GFX81: image_sample v[193:194], v237, s[28:35], s[4:7] dmask:0x7 d16 ; encoding: [0x00,0x07,0x80,0xf0,0xed,0xc1,0x27,0x80]
 121 0x00,0x07,0x80,0xf0,0xed,0xc1,0x27,0x80
 122
 123 # GFX80: image_sample v[193:196], v237, s[28:35], s[4:7] dmask:0xf d16 ; encoding: [0x00,0x0f,0x80,0xf0,0xed,0xc1,0x27,0x80]
 124 # GFX81: image_sample v[193:194], v237, s[28:35], s[4:7] dmask:0xf d16 ; encoding: [0x00,0x0f,0x80,0xf0,0xed,0xc1,0x27,0x80]
 125 0x00,0x0f,0x80,0xf0,0xed,0xc1,0x27,0x80
 126
 127 #===------------------------------------------------------------------------===#
 128 # Image atomics
 129 #===------------------------------------------------------------------------===#
 130
 131 # VI: image_atomic_add v5, v1, s[8:15] dmask:0x1 unorm ; encoding: [0x00,0x11,0x48,0xf0,0x01,0x05,0x02,0x00]
 132 0x00,0x11,0x48,0xf0,0x01,0x05,0x02,0x00
 133
 134 # VI: image_atomic_add v252, v1, s[8:15] dmask:0x1 unorm ; encoding: [0x00,0x11,0x48,0xf0,0x01,0xfc,0x02,0x00]
 135 0x00,0x11,0x48,0xf0,0x01,0xfc,0x02,0x00
 136
 137 # VI: image_atomic_add v5, v255, s[8:15] dmask:0x1 unorm ; encoding: [0x00,0x11,0x48,0xf0,0xff,0x05,0x02,0x00]
 138 0x00,0x11,0x48,0xf0,0xff,0x05,0x02,0x00
 139
 140 # VI: image_atomic_add v5, v1, s[92:99] dmask:0x1 unorm ; encoding: [0x00,0x11,0x48,0xf0,0x01,0x05,0x17,0x00]
 141 0x00,0x11,0x48,0xf0,0x01,0x05,0x17,0x00
 142
 143 # VI: image_atomic_add v5, v1, s[8:15] dmask:0x1 unorm glc ; encoding: [0x00,0x31,0x48,0xf0,0x01,0x05,0x02,0x00]
 144 0x00,0x31,0x48,0xf0,0x01,0x05,0x02,0x00
 145
 146 # VI: image_atomic_add v5, v1, s[8:15] dmask:0x1 unorm slc ; encoding: [0x00,0x11,0x48,0xf2,0x01,0x05,0x02,0x00]
 147 0x00,0x11,0x48,0xf2,0x01,0x05,0x02,0x00
 148
 149 # VI: image_atomic_add v5, v1, s[8:15] dmask:0x1 unorm lwe ; encoding: [0x00,0x11,0x4a,0xf0,0x01,0x05,0x02,0x00]
 150 0x00,0x11,0x4a,0xf0,0x01,0x05,0x02,0x00
 151
 152 # VI: image_atomic_add v5, v1, s[8:15] dmask:0x1 unorm da ; encoding: [0x00,0x51,0x48,0xf0,0x01,0x05,0x02,0x00]
 153 0x00,0x51,0x48,0xf0,0x01,0x05,0x02,0x00
 154
 155 # VI: image_atomic_add v[5:6], v1, s[8:15] dmask:0x3 unorm ; encoding: [0x00,0x13,0x48,0xf0,0x01,0x05,0x02,0x00]
 156 0x00,0x13,0x48,0xf0,0x01,0x05,0x02,0x00
 157
 158 # VI: image_atomic_cmpswap v[5:6], v1, s[8:15] dmask:0x3 unorm ; encoding: [0x00,0x13,0x44,0xf0,0x01,0x05,0x02,0x00]
 159 0x00,0x13,0x44,0xf0,0x01,0x05,0x02,0x00
 160
 161 # VI: image_atomic_cmpswap v[5:8], v1, s[8:15] dmask:0xf unorm ; encoding: [0x00,0x1f,0x44,0xf0,0x01,0x05,0x02,0x00]
 162 0x00,0x1f,0x44,0xf0,0x01,0x05,0x02,0x00
 163
 164 #===------------------------------------------------------------------------===#
 165 # Invalid image atomics (incorrect dmask value).
 166 # Disassembler may produce a partially incorrect instruction but should not fail.
 167 #===------------------------------------------------------------------------===#
 168
 169 # VI: image_atomic_add v5, v1, s[8:15] dmask:0x2 unorm ; encoding: [0x00,0x12,0x48,0xf0,0x01,0x05,0x02,0x00]
 170 0x00,0x12,0x48,0xf0,0x01,0x05,0x02,0x00
 171
 172 # VI: image_atomic_add v5, v1, s[8:15] dmask:0x7 unorm ; encoding: [0x00,0x17,0x48,0xf0,0x01,0x05,0x02,0x00]
 173 0x00,0x17,0x48,0xf0,0x01,0x05,0x02,0x00
 174
 175 # VI: image_atomic_add v5, v1, s[8:15] dmask:0xf unorm ; encoding: [0x00,0x1f,0x48,0xf0,0x01,0x05,0x02,0x00]
 176 0x00,0x1f,0x48,0xf0,0x01,0x05,0x02,0x00
 177
 178 # VI: image_atomic_cmpswap v[5:6], v1, s[8:15] unorm ; encoding: [0x00,0x10,0x44,0xf0,0x01,0x05,0x02,0x00]
 179 0x00,0x10,0x44,0xf0,0x01,0x05,0x02,0x00
 180
 181 # VI: image_atomic_cmpswap v[5:6], v1, s[8:15] dmask:0x1 unorm ; encoding: [0x00,0x11,0x44,0xf0,0x01,0x05,0x02,0x00]
 182 0x00,0x11,0x44,0xf0,0x01,0x05,0x02,0x00
 183
 184 # VI: image_atomic_cmpswap v[5:6], v1, s[8:15] dmask:0xe unorm ; encoding: [0x00,0x1e,0x44,0xf0,0x01,0x05,0x02,0x00]
 185 0x00,0x1e,0x44,0xf0,0x01,0x05,0x02,0x00
 186
 187 #===------------------------------------------------------------------------===#
 188 # Image gather
 189 #===------------------------------------------------------------------------===#
 190
 191 # VI: image_gather4 v[252:255], v1, s[8:15], s[12:15] dmask:0x1 ; encoding: [0x00,0x01,0x00,0xf1,0x01,0xfc,0x62,0x00]
 192 0x00,0x01,0x00,0xf1,0x01,0xfc,0x62,0x00
 193
 194 # VI: image_gather4 v[5:8], v1, s[8:15], s[12:15] dmask:0x2 ; encoding: [0x00,0x02,0x00,0xf1,0x01,0x05,0x62,0x00]
 195 0x00,0x02,0x00,0xf1,0x01,0x05,0x62,0x00
 196
 197 # VI: image_gather4 v[5:8], v1, s[8:15], s[12:15] dmask:0x4 ; encoding: [0x00,0x04,0x00,0xf1,0x01,0x05,0x62,0x00]
 198 0x00,0x04,0x00,0xf1,0x01,0x05,0x62,0x00
 199
 200 # VI: image_gather4 v[5:8], v1, s[8:15], s[12:15] dmask:0x8 ; encoding: [0x00,0x08,0x00,0xf1,0x01,0x05,0x62,0x00]
 201 0x00,0x08,0x00,0xf1,0x01,0x05,0x62,0x00
 202
 203 # GFX80: image_gather4 v[252:255], v1, s[8:15], s[12:15] dmask:0x1 unorm glc slc lwe da d16 ; encoding: [0x00,0x71,0x02,0xf3,0x01,0xfc,0x62,0x80]
 204 # GFX81: image_gather4 v[252:253], v1, s[8:15], s[12:15] dmask:0x1 unorm glc slc lwe da d16 ; encoding: [0x00,0x71,0x02,0xf3,0x01,0xfc,0x62,0x80]
 205 0x00,0x71,0x02,0xf3,0x01,0xfc,0x62,0x80
 206
 207 #===------------------------------------------------------------------------===#
 208 # Invalid image gather (incorrect dmask value or tfe).
 209 # Disassembler may produce a partially incorrect instruction but should not fail.
 210 #===------------------------------------------------------------------------===#
 211
 212 # VI: image_gather4 v[252:255], v1, s[8:15], s[12:15] dmask:0x3 ; encoding: [0x00,0x03,0x00,0xf1,0x01,0xfc,0x62,0x00]
 213 0x00,0x03,0x00,0xf1,0x01,0xfc,0x62,0x00
 214
 215 # VI: image_gather4 v[252:255], v1, s[8:15], s[12:15] dmask:0x1 unorm glc slc tfe lwe da ; encoding: [0x00,0x71,0x03,0xf3,0x01,0xfc,0x62,0x00]
 216 0x00,0x71,0x03,0xf3,0x01,0xfc,0x62,0x00