test/MC/Disassembler/ARM/fullfp16-neon-thumb.txt

   1 # RUN: not llvm-mc -disassemble -triple thumbv8a-none-eabi -mattr=+fullfp16,+neon,+thumb-mode -show-encoding < %s 2>%t | FileCheck %s
   2 # RUN FileCheck %s < %t --check-prefix=STDERR
   3
   4 # CHECK: vadd.f16 d0, d1, d2
   5 # CHECK: vadd.f16 q0, q1, q2
   6 [0x11,0xef,0x02,0x0d]
   7 [0x12,0xef,0x44,0x0d]
   8
   9 # CHECK: vsub.f16 d0, d1, d2
  10 # CHECK: vsub.f16 q0, q1, q2
  11 [0x31,0xef,0x02,0x0d]
  12 [0x32,0xef,0x44,0x0d]
  13
  14 # CHECK: vmul.f16 d0, d1, d2
  15 # CHECK: vmul.f16 q0, q1, q2
  16 [0x11,0xff,0x12,0x0d]
  17 [0x12,0xff,0x54,0x0d]
  18
  19 # CHECK: vmul.f16 d1, d2, d3[2]
  20 # CHECK: vmul.f16 q4, q5, d6[3]
  21 [0x92,0xef,0x63,0x19]
  22 [0x9a,0xff,0x6e,0x89]
  23
  24 # CHECK: vmla.f16 d0, d1, d2
  25 # CHECK: vmla.f16 q0, q1, q2
  26 [0x11,0xef,0x12,0x0d]
  27 [0x12,0xef,0x54,0x0d]
  28
  29 # CHECK: vmla.f16 d5, d6, d7[2]
  30 # CHECK: vmla.f16 q5, q6, d7[3]
  31 [0x96,0xef,0x67,0x51]
  32 [0x9c,0xff,0x6f,0xa1]
  33
  34 # CHECK: vmls.f16 d0, d1, d2
  35 # CHECK: vmls.f16 q0, q1, q2
  36 [0x31,0xef,0x12,0x0d]
  37 [0x32,0xef,0x54,0x0d]
  38
  39 # CHECK: vmls.f16 d5, d6, d7[2]
  40 # CHECK: vmls.f16 q5, q6, d7[3]
  41 [0x96,0xef,0x67,0x55]
  42 [0x9c,0xff,0x6f,0xa5]
  43
  44 # CHECK: vfma.f16 d0, d1, d2
  45 # CHECK: vfma.f16 q0, q1, q2
  46 [0x11,0xef,0x12,0x0c]
  47 [0x12,0xef,0x54,0x0c]
  48
  49 # CHECK: vfms.f16 d0, d1, d2
  50 # CHECK: vfms.f16 q0, q1, q2
  51 [0x31,0xef,0x12,0x0c]
  52 [0x32,0xef,0x54,0x0c]
  53
  54 # CHECK: vceq.f16 d2, d3, d4
  55 # CHECK: vceq.f16 q2, q3, q4
  56 [0x13,0xef,0x04,0x2e]
  57 [0x16,0xef,0x48,0x4e]
  58
  59 # CHECK: vceq.f16 d2, d3, #0
  60 # CHECK: vceq.f16 q2, q3, #0
  61 [0xb5,0xff,0x03,0x25]
  62 [0xb5,0xff,0x46,0x45]
  63
  64 # CHECK: vcge.f16 d2, d3, d4
  65 # CHECK: vcge.f16 q2, q3, q4
  66 [0x13,0xff,0x04,0x2e]
  67 [0x16,0xff,0x48,0x4e]
  68
  69 # CHECK: vcge.f16 d2, d3, #0
  70 # CHECK: vcge.f16 q2, q3, #0
  71 [0xb5,0xff,0x83,0x24]
  72 [0xb5,0xff,0xc6,0x44]
  73
  74 # CHECK: vcgt.f16 d2, d3, d4
  75 # CHECK: vcgt.f16 q2, q3, q4
  76 [0x33,0xff,0x04,0x2e]
  77 [0x36,0xff,0x48,0x4e]
  78
  79 # CHECK: vcgt.f16 d2, d3, #0
  80 # CHECK: vcgt.f16 q2, q3, #0
  81 [0xb5,0xff,0x03,0x24]
  82 [0xb5,0xff,0x46,0x44]
  83
  84 # CHECK: vcle.f16 d2, d3, #0
  85 # CHECK: vcle.f16 q2, q3, #0
  86 [0xb5,0xff,0x83,0x25]
  87 [0xb5,0xff,0xc6,0x45]
  88
  89 # CHECK: vclt.f16 d2, d3, #0
  90 # CHECK: vclt.f16 q2, q3, #0
  91 [0xb5,0xff,0x03,0x26]
  92 [0xb5,0xff,0x46,0x46]
  93
  94 # CHECK: vacge.f16 d0, d1, d2
  95 # CHECK: vacge.f16 q0, q1, q2
  96 [0x11,0xff,0x12,0x0e]
  97 [0x12,0xff,0x54,0x0e]
  98
  99 # CHECK: vacgt.f16 d0, d1, d2
 100 # CHECK: vacgt.f16 q0, q1, q2
 101 [0x31,0xff,0x12,0x0e]
 102 [0x32,0xff,0x54,0x0e]
 103
 104 # CHECK: vabd.f16 d0, d1, d2
 105 # CHECK: vabd.f16 q0, q1, q2
 106 [0x31,0xff,0x02,0x0d]
 107 [0x32,0xff,0x44,0x0d]
 108
 109 # CHECK: vabs.f16 d0, d1
 110 # CHECK: vabs.f16 q0, q1
 111 [0xb5,0xff,0x01,0x07]
 112 [0xb5,0xff,0x42,0x07]
 113
 114 # CHECK: vmax.f16 d0, d1, d2
 115 # CHECK: vmax.f16 q0, q1, q2
 116 [0x11,0xef,0x02,0x0f]
 117 [0x12,0xef,0x44,0x0f]
 118
 119 # CHECK: vmin.f16 d0, d1, d2
 120 # CHECK: vmin.f16 q0, q1, q2
 121 [0x31,0xef,0x02,0x0f]
 122 [0x32,0xef,0x44,0x0f]
 123
 124 # CHECK: vmaxnm.f16 d0, d1, d2
 125 # CHECK: vmaxnm.f16 q0, q1, q2
 126 [0x11,0xff,0x12,0x0f]
 127 [0x12,0xff,0x54,0x0f]
 128
 129 # CHECK: vminnm.f16 d0, d1, d2
 130 # CHECK: vminnm.f16 q0, q1, q2
 131 [0x31,0xff,0x12,0x0f]
 132 [0x32,0xff,0x54,0x0f]
 133
 134 # CHECK: vpadd.f16 d0, d1, d2
 135 [0x11,0xff,0x02,0x0d]
 136
 137 # CHECK: vpmax.f16 d0, d1, d2
 138 [0x11,0xff,0x02,0x0f]
 139
 140 # CHECK: vpmin.f16 d0, d1, d2
 141 [0x31,0xff,0x02,0x0f]
 142
 143 # CHECK: vrecpe.f16 d0, d1
 144 # CHECK: vrecpe.f16 q0, q1
 145 [0xb7,0xff,0x01,0x05]
 146 [0xb7,0xff,0x42,0x05]
 147
 148 # CHECK: vrecps.f16 d0, d1, d2
 149 # CHECK: vrecps.f16 q0, q1, q2
 150 [0x11,0xef,0x12,0x0f]
 151 [0x12,0xef,0x54,0x0f]
 152
 153 # CHECK: vrsqrte.f16 d0, d1
 154 # CHECK: vrsqrte.f16 q0, q1
 155 [0xb7,0xff,0x81,0x05]
 156 [0xb7,0xff,0xc2,0x05]
 157
 158 # CHECK: vrsqrts.f16 d0, d1, d2
 159 # CHECK: vrsqrts.f16 q0, q1, q2
 160 [0x31,0xef,0x12,0x0f]
 161 [0x32,0xef,0x54,0x0f]
 162
 163 # CHECK: vneg.f16 d0, d1
 164 # CHECK: vneg.f16 q0, q1
 165 [0xb5,0xff,0x81,0x07]
 166 [0xb5,0xff,0xc2,0x07]
 167
 168 # CHECK: vcvt.s16.f16 d0, d1
 169 # CHECK: vcvt.u16.f16 d0, d1
 170 # CHECK: vcvt.f16.s16 d0, d1
 171 # CHECK: vcvt.f16.u16 d0, d1
 172 # CHECK: vcvt.s16.f16 q0, q1
 173 # CHECK: vcvt.u16.f16 q0, q1
 174 # CHECK: vcvt.f16.s16 q0, q1
 175 # CHECK: vcvt.f16.u16 q0, q1
 176 [0xb7,0xff,0x01,0x07]
 177 [0xb7,0xff,0x81,0x07]
 178 [0xb7,0xff,0x01,0x06]
 179 [0xb7,0xff,0x81,0x06]
 180 [0xb7,0xff,0x42,0x07]
 181 [0xb7,0xff,0xc2,0x07]
 182 [0xb7,0xff,0x42,0x06]
 183 [0xb7,0xff,0xc2,0x06]
 184
 185 # CHECK: vcvta.s16.f16 d0, d1
 186 # CHECK: vcvta.s16.f16 q0, q1
 187 # CHECK: vcvta.u16.f16 d0, d1
 188 # CHECK: vcvta.u16.f16 q0, q1
 189 [0xb7,0xff,0x01,0x00]
 190 [0xb7,0xff,0x42,0x00]
 191 [0xb7,0xff,0x81,0x00]
 192 [0xb7,0xff,0xc2,0x00]
 193
 194 # CHECK: vcvtm.s16.f16 d0, d1
 195 # CHECK: vcvtm.s16.f16 q0, q1
 196 # CHECK: vcvtm.u16.f16 d0, d1
 197 # CHECK: vcvtm.u16.f16 q0, q1
 198 [0xb7,0xff,0x01,0x03]
 199 [0xb7,0xff,0x42,0x03]
 200 [0xb7,0xff,0x81,0x03]
 201 [0xb7,0xff,0xc2,0x03]
 202
 203 # CHECK: vcvtn.s16.f16 d0, d1
 204 # CHECK: vcvtn.s16.f16 q0, q1
 205 # CHECK: vcvtn.u16.f16 d0, d1
 206 # CHECK: vcvtn.u16.f16 q0, q1
 207 [0xb7,0xff,0x01,0x01]
 208 [0xb7,0xff,0x42,0x01]
 209 [0xb7,0xff,0x81,0x01]
 210 [0xb7,0xff,0xc2,0x01]
 211
 212 # CHECK: vcvtp.s16.f16 d0, d1
 213 # CHECK: vcvtp.s16.f16 q0, q1
 214 # CHECK: vcvtp.u16.f16 d0, d1
 215 # CHECK: vcvtp.u16.f16 q0, q1
 216 [0xb7,0xff,0x01,0x02]
 217 [0xb7,0xff,0x42,0x02]
 218 [0xb7,0xff,0x81,0x02]
 219 [0xb7,0xff,0xc2,0x02]
 220
 221 # CHECK: vcvt.s16.f16 d0, d1, #1
 222 # CHECK: vcvt.u16.f16 d0, d1, #2
 223 # CHECK: vcvt.f16.s16 d0, d1, #3
 224 # CHECK: vcvt.f16.u16 d0, d1, #4
 225 # CHECK: vcvt.s16.f16 q0, q1, #5
 226 # CHECK: vcvt.u16.f16 q0, q1, #6
 227 # CHECK: vcvt.f16.s16 q0, q1, #7
 228 # CHECK: vcvt.f16.u16 q0, q1, #8
 229 [0xbf,0xef,0x11,0x0d]
 230 [0xbe,0xff,0x11,0x0d]
 231 [0xbd,0xef,0x11,0x0c]
 232 [0xbc,0xff,0x11,0x0c]
 233 [0xbb,0xef,0x52,0x0d]
 234 [0xba,0xff,0x52,0x0d]
 235 [0xb9,0xef,0x52,0x0c]
 236 [0xb8,0xff,0x52,0x0c]
 237
 238 # CHECK: vrinta.f16 d0, d1
 239 # CHECK: vrinta.f16 q0, q1
 240 [0xb6,0xff,0x01,0x05]
 241 [0xb6,0xff,0x42,0x05]
 242
 243 # CHECK: vrintm.f16 d0, d1
 244 # CHECK: vrintm.f16 q0, q1
 245 [0xb6,0xff,0x81,0x06]
 246 [0xb6,0xff,0xc2,0x06]
 247
 248 # CHECK: vrintn.f16 d0, d1
 249 # CHECK: vrintn.f16 q0, q1
 250 [0xb6,0xff,0x01,0x04]
 251 [0xb6,0xff,0x42,0x04]
 252
 253 # CHECK: vrintp.f16 d0, d1
 254 # CHECK: vrintp.f16 q0, q1
 255 [0xb6,0xff,0x81,0x07]
 256 [0xb6,0xff,0xc2,0x07]
 257
 258 # CHECK: vrintx.f16 d0, d1
 259 # CHECK: vrintx.f16 q0, q1
 260 [0xb6,0xff,0x81,0x04]
 261 [0xb6,0xff,0xc2,0x04]
 262
 263 # CHECK: vrintz.f16 d0, d1
 264 # CHECK: vrintz.f16 q0, q1
 265 [0xb6,0xff,0x81,0x05]
 266 [0xb6,0xff,0xc2,0x05]
 267
 268 # Existing VMOV(immediate, Advanced SIMD) instructions within the encoding
 269 # space of the new FP16 VCVT(between floating - point and fixed - point,
 270 # Advanced SIMD):
 271 #  1 -- VCVT op
 272 #  2 -- VCVT FP size
 273 #            4 -- Q
 274 #            2 -- VMOV op
 275 [0xc7,0xef,0x10,0x0c]
 276 [0xc7,0xef,0x10,0x0d]
 277 [0xc7,0xef,0x10,0x0e]
 278 [0xc7,0xef,0x10,0x0f]
 279 [0xc7,0xef,0x20,0x0c]
 280 [0xc7,0xef,0x20,0x0d]
 281 [0xc7,0xef,0x20,0x0e]
 282 [0xc7,0xef,0x20,0x0f]
 283 [0xc7,0xef,0x50,0x0c]
 284 [0xc7,0xef,0x50,0x0d]
 285 [0xc7,0xef,0x50,0x0e]
 286 [0xc7,0xef,0x50,0x0f]
 287 [0xc7,0xef,0x70,0x0c]
 288 [0xc7,0xef,0x70,0x0d]
 289 [0xc7,0xef,0x70,0x0e]
 290 [0xc7,0xef,0x70,0x0f]
 291 # CHECK: vmov.i32        d16, #0x70ff
 292 # CHECK: vmov.i32        d16, #0x70ffff
 293 # CHECK: vmov.i8 d16, #0x70
 294 # CHECK: vmov.f32        d16, #1.000000e+00
 295 # CHECK: vmull.s8        q8, d7, d16
 296 # STDERR: warning: invalid instruction encoding
 297 # STDERR-NEXT: [0x20,0x0d,0xc7,0xf2]
 298 # CHECK: vmull.p8        q8, d7, d16
 299 # STDERR: warning: invalid instruction encoding
 300 # STDERR-NEXT: [0x20,0x0f,0xc7,0xf2]
 301 # CHECK: vmov.i32        q8, #0x70ff
 302 # CHECK: vmov.i32        q8, #0x70ffff
 303 # CHECK: vmov.i8 q8, #0x70
 304 # CHECK: vmov.f32        q8, #1.000000e+00
 305 # CHECK: vmvn.i32        q8, #0x70ff
 306 # CHECK: vmvn.i32        q8, #0x70ffff
 307 # CHECK: vmov.i64        q8, #0xffffff0000000
 308 # STDERR: warning: invalid instruction encoding
 309 # STDERR-NEXT: [0x70,0x0f,0xc7,0xf2]