test/MC/Disassembler/ARM/move-banked-regs-arm.txt

   1 @ RUN: llvm-mc -disassemble -triple armv7 -mcpu=cyclone %s | FileCheck %s
   2
   3
   4 [0x00,0x22,0x00,0xe1]
   5 [0x00,0x32,0x01,0xe1]
   6 [0x00,0x52,0x02,0xe1]
   7 [0x00,0x72,0x03,0xe1]
   8 [0x00,0xb2,0x04,0xe1]
   9 [0x00,0x12,0x05,0xe1]
  10 [0x00,0x22,0x06,0xe1]
  11 @ CHECK:         mrs     r2, r8_usr
  12 @ CHECK:         mrs     r3, r9_usr
  13 @ CHECK:         mrs     r5, r10_usr
  14 @ CHECK:         mrs     r7, r11_usr
  15 @ CHECK:         mrs     r11, r12_usr
  16 @ CHECK:         mrs     r1, sp_usr
  17 @ CHECK:         mrs     r2, lr_usr
  18
  19 [0x00,0x22,0x08,0xe1]
  20 [0x00,0x32,0x09,0xe1]
  21 [0x00,0x52,0x0a,0xe1]
  22 [0x00,0x72,0x0b,0xe1]
  23 [0x00,0xb2,0x0c,0xe1]
  24 [0x00,0x12,0x0d,0xe1]
  25 [0x00,0x22,0x0e,0xe1]
  26 [0x00,0x32,0x4e,0xe1]
  27 @ CHECK:         mrs     r2, r8_fiq
  28 @ CHECK:         mrs     r3, r9_fiq
  29 @ CHECK:         mrs     r5, r10_fiq
  30 @ CHECK:         mrs     r7, r11_fiq
  31 @ CHECK:         mrs     r11, r12_fiq
  32 @ CHECK:         mrs     r1, sp_fiq
  33 @ CHECK:         mrs     r2, lr_fiq
  34 @ CHECK:         mrs     r3, SPSR_fiq
  35
  36 [0x00,0x43,0x00,0xe1]
  37 [0x00,0x93,0x01,0xe1]
  38 [0x00,0x13,0x40,0xe1]
  39 @ CHECK:         mrs     r4, lr_irq
  40 @ CHECK:         mrs     r9, sp_irq
  41 @ CHECK:         mrs     r1, SPSR_irq
  42
  43 [0x00,0x13,0x02,0xe1]
  44 [0x00,0x33,0x03,0xe1]
  45 [0x00,0x53,0x42,0xe1]
  46 @ CHECK:         mrs     r1, lr_svc
  47 @ CHECK:         mrs     r3, sp_svc
  48 @ CHECK:         mrs     r5, SPSR_svc
  49
  50 [0x00,0x53,0x04,0xe1]
  51 [0x00,0x73,0x05,0xe1]
  52 [0x00,0x93,0x44,0xe1]
  53 @ CHECK:         mrs     r5, lr_abt
  54 @ CHECK:         mrs     r7, sp_abt
  55 @ CHECK:         mrs     r9, SPSR_abt
  56
  57 [0x00,0x93,0x06,0xe1]
  58 [0x00,0xb3,0x07,0xe1]
  59 [0x00,0xc3,0x46,0xe1]
  60 @ CHECK:         mrs     r9, lr_und
  61 @ CHECK:         mrs     r11, sp_und
  62 @ CHECK:         mrs     r12, SPSR_und
  63
  64 [0x00,0x23,0x0c,0xe1]
  65 [0x00,0x43,0x0d,0xe1]
  66 [0x00,0x63,0x4c,0xe1]
  67 @ CHECK:         mrs     r2, lr_mon
  68 @ CHECK:         mrs     r4, sp_mon
  69 @ CHECK:         mrs     r6, SPSR_mon
  70
  71 [0x00,0x63,0x0e,0xe1]
  72 [0x00,0x83,0x0f,0xe1]
  73 [0x00,0xa3,0x4e,0xe1]
  74 @ CHECK:         mrs     r6, elr_hyp
  75 @ CHECK:         mrs     r8, sp_hyp
  76 @ CHECK:         mrs     r10, SPSR_hyp
  77
  78 [0x02,0xf2,0x20,0xe1]
  79 [0x03,0xf2,0x21,0xe1]
  80 [0x05,0xf2,0x22,0xe1]
  81 [0x07,0xf2,0x23,0xe1]
  82 [0x0b,0xf2,0x24,0xe1]
  83 [0x01,0xf2,0x25,0xe1]
  84 [0x02,0xf2,0x26,0xe1]
  85 @ CHECK:         msr     r8_usr, r2
  86 @ CHECK:         msr     r9_usr, r3
  87 @ CHECK:         msr     r10_usr, r5
  88 @ CHECK:         msr     r11_usr, r7
  89 @ CHECK:         msr     r12_usr, r11
  90 @ CHECK:         msr     sp_usr, r1
  91 @ CHECK:         msr     lr_usr, r2
  92
  93 [0x02,0xf2,0x28,0xe1]
  94 [0x03,0xf2,0x29,0xe1]
  95 [0x05,0xf2,0x2a,0xe1]
  96 [0x07,0xf2,0x2b,0xe1]
  97 [0x0b,0xf2,0x2c,0xe1]
  98 [0x01,0xf2,0x2d,0xe1]
  99 [0x02,0xf2,0x2e,0xe1]
 100 [0x03,0xf2,0x6e,0xe1]
 101 @ CHECK:         msr     r8_fiq, r2
 102 @ CHECK:         msr     r9_fiq, r3
 103 @ CHECK:         msr     r10_fiq, r5
 104 @ CHECK:         msr     r11_fiq, r7
 105 @ CHECK:         msr     r12_fiq, r11
 106 @ CHECK:         msr     sp_fiq, r1
 107 @ CHECK:         msr     lr_fiq, r2
 108 @ CHECK:         msr     SPSR_fiq, r3
 109
 110 [0x04,0xf3,0x20,0xe1]
 111 [0x09,0xf3,0x21,0xe1]
 112 [0x0b,0xf3,0x60,0xe1]
 113 @ CHECK:         msr     lr_irq, r4
 114 @ CHECK:         msr     sp_irq, r9
 115 @ CHECK:         msr     SPSR_irq, r11
 116
 117 [0x01,0xf3,0x22,0xe1]
 118 [0x03,0xf3,0x23,0xe1]
 119 [0x05,0xf3,0x62,0xe1]
 120 @ CHECK:         msr     lr_svc, r1
 121 @ CHECK:         msr     sp_svc, r3
 122 @ CHECK:         msr     SPSR_svc, r5
 123
 124 [0x05,0xf3,0x24,0xe1]
 125 [0x07,0xf3,0x25,0xe1]
 126 [0x09,0xf3,0x64,0xe1]
 127 @ CHECK:         msr     lr_abt, r5
 128 @ CHECK:         msr     sp_abt, r7
 129 @ CHECK:         msr     SPSR_abt, r9
 130
 131 [0x09,0xf3,0x26,0xe1]
 132 [0x0b,0xf3,0x27,0xe1]
 133 [0x0c,0xf3,0x66,0xe1]
 134 @ CHECK:         msr     lr_und, r9
 135 @ CHECK:         msr     sp_und, r11
 136 @ CHECK:         msr     SPSR_und, r12
 137
 138 [0x02,0xf3,0x2c,0xe1]
 139 [0x04,0xf3,0x2d,0xe1]
 140 [0x06,0xf3,0x6c,0xe1]
 141 @ CHECK:         msr     lr_mon, r2
 142 @ CHECK:         msr     sp_mon, r4
 143 @ CHECK:         msr     SPSR_mon, r6
 144
 145 [0x06,0xf3,0x2e,0xe1]
 146 [0x08,0xf3,0x2f,0xe1]
 147 [0x0a,0xf3,0x6e,0xe1]
 148 @ CHECK:         msr     elr_hyp, r6
 149 @ CHECK:         msr     sp_hyp, r8
 150 @ CHECK:         msr     SPSR_hyp, r10