1 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2 ; RUN: opt < %s -div-rem-pairs -S -mtriple=powerpc64-unknown-unknown | FileCheck %s
4 declare void @foo(i32, i32)
6 define void @decompose_illegal_srem_same_block(i32 %a, i32 %b) {
7 ; CHECK-LABEL: @decompose_illegal_srem_same_block(
8 ; CHECK-NEXT: [[DIV:%.*]] = sdiv i32 [[A:%.*]], [[B:%.*]]
9 ; CHECK-NEXT: [[TMP1:%.*]] = mul i32 [[DIV]], [[B]]
10 ; CHECK-NEXT: [[REM_DECOMPOSED:%.*]] = sub i32 [[A]], [[TMP1]]
11 ; CHECK-NEXT: call void @foo(i32 [[REM_DECOMPOSED]], i32 [[DIV]])
12 ; CHECK-NEXT: ret void
14 %rem = srem i32 %a, %b
15 %div = sdiv i32 %a, %b
16 call void @foo(i32 %rem, i32 %div)
20 define void @decompose_illegal_urem_same_block(i32 %a, i32 %b) {
21 ; CHECK-LABEL: @decompose_illegal_urem_same_block(
22 ; CHECK-NEXT: [[DIV:%.*]] = udiv i32 [[A:%.*]], [[B:%.*]]
23 ; CHECK-NEXT: [[TMP1:%.*]] = mul i32 [[DIV]], [[B]]
24 ; CHECK-NEXT: [[REM_DECOMPOSED:%.*]] = sub i32 [[A]], [[TMP1]]
25 ; CHECK-NEXT: call void @foo(i32 [[REM_DECOMPOSED]], i32 [[DIV]])
26 ; CHECK-NEXT: ret void
28 %div = udiv i32 %a, %b
29 %rem = urem i32 %a, %b
30 call void @foo(i32 %rem, i32 %div)
34 ; Hoist and optionally decompose the sdiv because it's safe and free.
35 ; PR31028 - https://bugs.llvm.org/show_bug.cgi?id=31028
37 define i32 @hoist_sdiv(i32 %a, i32 %b) {
38 ; CHECK-LABEL: @hoist_sdiv(
40 ; CHECK-NEXT: [[DIV:%.*]] = sdiv i32 [[A:%.*]], [[B:%.*]]
41 ; CHECK-NEXT: [[TMP0:%.*]] = mul i32 [[DIV]], [[B]]
42 ; CHECK-NEXT: [[REM_DECOMPOSED:%.*]] = sub i32 [[A]], [[TMP0]]
43 ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[REM_DECOMPOSED]], 42
44 ; CHECK-NEXT: br i1 [[CMP]], label [[IF:%.*]], label [[END:%.*]]
46 ; CHECK-NEXT: br label [[END]]
48 ; CHECK-NEXT: [[RET:%.*]] = phi i32 [ [[DIV]], [[IF]] ], [ 3, [[ENTRY:%.*]] ]
49 ; CHECK-NEXT: ret i32 [[RET]]
52 %rem = srem i32 %a, %b
53 %cmp = icmp eq i32 %rem, 42
54 br i1 %cmp, label %if, label %end
57 %div = sdiv i32 %a, %b
61 %ret = phi i32 [ %div, %if ], [ 3, %entry ]
65 ; Hoist and optionally decompose the udiv because it's safe and free.
67 define i64 @hoist_udiv(i64 %a, i64 %b) {
68 ; CHECK-LABEL: @hoist_udiv(
70 ; CHECK-NEXT: [[DIV:%.*]] = udiv i64 [[A:%.*]], [[B:%.*]]
71 ; CHECK-NEXT: [[TMP0:%.*]] = mul i64 [[DIV]], [[B]]
72 ; CHECK-NEXT: [[REM_DECOMPOSED:%.*]] = sub i64 [[A]], [[TMP0]]
73 ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i64 [[REM_DECOMPOSED]], 42
74 ; CHECK-NEXT: br i1 [[CMP]], label [[IF:%.*]], label [[END:%.*]]
76 ; CHECK-NEXT: br label [[END]]
78 ; CHECK-NEXT: [[RET:%.*]] = phi i64 [ [[DIV]], [[IF]] ], [ 3, [[ENTRY:%.*]] ]
79 ; CHECK-NEXT: ret i64 [[RET]]
82 %rem = urem i64 %a, %b
83 %cmp = icmp eq i64 %rem, 42
84 br i1 %cmp, label %if, label %end
87 %div = udiv i64 %a, %b
91 %ret = phi i64 [ %div, %if ], [ 3, %entry ]
95 ; Hoist the srem if it's safe and free, otherwise decompose it.
97 define i16 @hoist_srem(i16 %a, i16 %b) {
98 ; CHECK-LABEL: @hoist_srem(
100 ; CHECK-NEXT: [[DIV:%.*]] = sdiv i16 [[A:%.*]], [[B:%.*]]
101 ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i16 [[DIV]], 42
102 ; CHECK-NEXT: br i1 [[CMP]], label [[IF:%.*]], label [[END:%.*]]
104 ; CHECK-NEXT: [[TMP0:%.*]] = mul i16 [[DIV]], [[B]]
105 ; CHECK-NEXT: [[REM_DECOMPOSED:%.*]] = sub i16 [[A]], [[TMP0]]
106 ; CHECK-NEXT: br label [[END]]
108 ; CHECK-NEXT: [[RET:%.*]] = phi i16 [ [[REM_DECOMPOSED]], [[IF]] ], [ 3, [[ENTRY:%.*]] ]
109 ; CHECK-NEXT: ret i16 [[RET]]
112 %div = sdiv i16 %a, %b
113 %cmp = icmp eq i16 %div, 42
114 br i1 %cmp, label %if, label %end
117 %rem = srem i16 %a, %b
121 %ret = phi i16 [ %rem, %if ], [ 3, %entry ]
125 ; Hoist the urem if it's safe and free, otherwise decompose it.
127 define i8 @hoist_urem(i8 %a, i8 %b) {
128 ; CHECK-LABEL: @hoist_urem(
130 ; CHECK-NEXT: [[DIV:%.*]] = udiv i8 [[A:%.*]], [[B:%.*]]
131 ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[DIV]], 42
132 ; CHECK-NEXT: br i1 [[CMP]], label [[IF:%.*]], label [[END:%.*]]
134 ; CHECK-NEXT: [[TMP0:%.*]] = mul i8 [[DIV]], [[B]]
135 ; CHECK-NEXT: [[REM_DECOMPOSED:%.*]] = sub i8 [[A]], [[TMP0]]
136 ; CHECK-NEXT: br label [[END]]
138 ; CHECK-NEXT: [[RET:%.*]] = phi i8 [ [[REM_DECOMPOSED]], [[IF]] ], [ 3, [[ENTRY:%.*]] ]
139 ; CHECK-NEXT: ret i8 [[RET]]
142 %div = udiv i8 %a, %b
143 %cmp = icmp eq i8 %div, 42
144 br i1 %cmp, label %if, label %end
147 %rem = urem i8 %a, %b
151 %ret = phi i8 [ %rem, %if ], [ 3, %entry ]
155 ; Be careful with RAUW/invalidation if this is a srem-of-srem.
157 define i32 @srem_of_srem_unexpanded(i32 %X, i32 %Y, i32 %Z) {
158 ; CHECK-LABEL: @srem_of_srem_unexpanded(
159 ; CHECK-NEXT: [[T0:%.*]] = mul nsw i32 [[Z:%.*]], [[Y:%.*]]
160 ; CHECK-NEXT: [[T1:%.*]] = sdiv i32 [[X:%.*]], [[T0]]
161 ; CHECK-NEXT: [[T2:%.*]] = mul nsw i32 [[T0]], [[T1]]
162 ; CHECK-NEXT: [[TMP1:%.*]] = mul i32 [[T1]], [[T0]]
163 ; CHECK-NEXT: [[T3_DECOMPOSED:%.*]] = sub i32 [[X]], [[TMP1]]
164 ; CHECK-NEXT: [[T4:%.*]] = sdiv i32 [[T3_DECOMPOSED]], [[Y]]
165 ; CHECK-NEXT: [[T5:%.*]] = mul nsw i32 [[T4]], [[Y]]
166 ; CHECK-NEXT: [[TMP2:%.*]] = mul i32 [[T4]], [[Y]]
167 ; CHECK-NEXT: [[T6_DECOMPOSED:%.*]] = sub i32 [[T3_DECOMPOSED]], [[TMP2]]
168 ; CHECK-NEXT: ret i32 [[T6_DECOMPOSED]]
170 %t0 = mul nsw i32 %Z, %Y
171 %t1 = sdiv i32 %X, %t0
172 %t2 = mul nsw i32 %t0, %t1
173 %t3 = srem i32 %X, %t0
174 %t4 = sdiv i32 %t3, %Y
175 %t5 = mul nsw i32 %t4, %Y
176 %t6 = srem i32 %t3, %Y
179 define i32 @srem_of_srem_expanded(i32 %X, i32 %Y, i32 %Z) {
180 ; CHECK-LABEL: @srem_of_srem_expanded(
181 ; CHECK-NEXT: [[T0:%.*]] = mul nsw i32 [[Z:%.*]], [[Y:%.*]]
182 ; CHECK-NEXT: [[T1:%.*]] = sdiv i32 [[X:%.*]], [[T0]]
183 ; CHECK-NEXT: [[T2:%.*]] = mul nsw i32 [[T0]], [[T1]]
184 ; CHECK-NEXT: [[T3:%.*]] = sub nsw i32 [[X]], [[T2]]
185 ; CHECK-NEXT: [[T4:%.*]] = sdiv i32 [[T3]], [[Y]]
186 ; CHECK-NEXT: [[T5:%.*]] = mul nsw i32 [[T4]], [[Y]]
187 ; CHECK-NEXT: [[T6:%.*]] = sub nsw i32 [[T3]], [[T5]]
188 ; CHECK-NEXT: ret i32 [[T6]]
190 %t0 = mul nsw i32 %Z, %Y
191 %t1 = sdiv i32 %X, %t0
192 %t2 = mul nsw i32 %t0, %t1
193 %t3 = sub nsw i32 %X, %t2
194 %t4 = sdiv i32 %t3, %Y
195 %t5 = mul nsw i32 %t4, %Y
196 %t6 = sub nsw i32 %t3, %t5
200 ; If the ops don't match, don't do anything: signedness.
202 define i32 @dont_hoist_udiv(i32 %a, i32 %b) {
203 ; CHECK-LABEL: @dont_hoist_udiv(
205 ; CHECK-NEXT: [[REM:%.*]] = srem i32 [[A:%.*]], [[B:%.*]]
206 ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[REM]], 42
207 ; CHECK-NEXT: br i1 [[CMP]], label [[IF:%.*]], label [[END:%.*]]
209 ; CHECK-NEXT: [[DIV:%.*]] = udiv i32 [[A]], [[B]]
210 ; CHECK-NEXT: br label [[END]]
212 ; CHECK-NEXT: [[RET:%.*]] = phi i32 [ [[DIV]], [[IF]] ], [ 3, [[ENTRY:%.*]] ]
213 ; CHECK-NEXT: ret i32 [[RET]]
216 %rem = srem i32 %a, %b
217 %cmp = icmp eq i32 %rem, 42
218 br i1 %cmp, label %if, label %end
221 %div = udiv i32 %a, %b
225 %ret = phi i32 [ %div, %if ], [ 3, %entry ]
229 ; If the ops don't match, don't do anything: operation.
231 define i32 @dont_hoist_srem(i32 %a, i32 %b) {
232 ; CHECK-LABEL: @dont_hoist_srem(
234 ; CHECK-NEXT: [[REM:%.*]] = urem i32 [[A:%.*]], [[B:%.*]]
235 ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[REM]], 42
236 ; CHECK-NEXT: br i1 [[CMP]], label [[IF:%.*]], label [[END:%.*]]
238 ; CHECK-NEXT: [[REM2:%.*]] = srem i32 [[A]], [[B]]
239 ; CHECK-NEXT: br label [[END]]
241 ; CHECK-NEXT: [[RET:%.*]] = phi i32 [ [[REM2]], [[IF]] ], [ 3, [[ENTRY:%.*]] ]
242 ; CHECK-NEXT: ret i32 [[RET]]
245 %rem = urem i32 %a, %b
246 %cmp = icmp eq i32 %rem, 42
247 br i1 %cmp, label %if, label %end
250 %rem2 = srem i32 %a, %b
254 %ret = phi i32 [ %rem2, %if ], [ 3, %entry ]
258 ; If the ops don't match, don't do anything: operands.
260 define i32 @dont_hoist_sdiv(i32 %a, i32 %b, i32 %c) {
261 ; CHECK-LABEL: @dont_hoist_sdiv(
263 ; CHECK-NEXT: [[REM:%.*]] = srem i32 [[A:%.*]], [[B:%.*]]
264 ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[REM]], 42
265 ; CHECK-NEXT: br i1 [[CMP]], label [[IF:%.*]], label [[END:%.*]]
267 ; CHECK-NEXT: [[DIV:%.*]] = sdiv i32 [[A]], [[C:%.*]]
268 ; CHECK-NEXT: br label [[END]]
270 ; CHECK-NEXT: [[RET:%.*]] = phi i32 [ [[DIV]], [[IF]] ], [ 3, [[ENTRY:%.*]] ]
271 ; CHECK-NEXT: ret i32 [[RET]]
274 %rem = srem i32 %a, %b
275 %cmp = icmp eq i32 %rem, 42
276 br i1 %cmp, label %if, label %end
279 %div = sdiv i32 %a, %c
283 %ret = phi i32 [ %div, %if ], [ 3, %entry ]
287 ; If the target doesn't have a unified div/rem op for the type, decompose rem in-place to mul+sub.
289 define i128 @dont_hoist_urem(i128 %a, i128 %b) {
290 ; CHECK-LABEL: @dont_hoist_urem(
292 ; CHECK-NEXT: [[DIV:%.*]] = udiv i128 [[A:%.*]], [[B:%.*]]
293 ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i128 [[DIV]], 42
294 ; CHECK-NEXT: br i1 [[CMP]], label [[IF:%.*]], label [[END:%.*]]
296 ; CHECK-NEXT: [[TMP0:%.*]] = mul i128 [[DIV]], [[B]]
297 ; CHECK-NEXT: [[REM_DECOMPOSED:%.*]] = sub i128 [[A]], [[TMP0]]
298 ; CHECK-NEXT: br label [[END]]
300 ; CHECK-NEXT: [[RET:%.*]] = phi i128 [ [[REM_DECOMPOSED]], [[IF]] ], [ 3, [[ENTRY:%.*]] ]
301 ; CHECK-NEXT: ret i128 [[RET]]
304 %div = udiv i128 %a, %b
305 %cmp = icmp eq i128 %div, 42
306 br i1 %cmp, label %if, label %end
309 %rem = urem i128 %a, %b
313 %ret = phi i128 [ %rem, %if ], [ 3, %entry ]
317 ; We don't hoist if one op does not dominate the other,
318 ; but we could hoist both ops to the common predecessor block?
320 define i32 @no_domination(i1 %cmp, i32 %a, i32 %b) {
321 ; CHECK-LABEL: @no_domination(
323 ; CHECK-NEXT: br i1 [[CMP:%.*]], label [[IF:%.*]], label [[ELSE:%.*]]
325 ; CHECK-NEXT: [[DIV:%.*]] = sdiv i32 [[A:%.*]], [[B:%.*]]
326 ; CHECK-NEXT: br label [[END:%.*]]
328 ; CHECK-NEXT: [[REM:%.*]] = srem i32 [[A]], [[B]]
329 ; CHECK-NEXT: br label [[END]]
331 ; CHECK-NEXT: [[RET:%.*]] = phi i32 [ [[DIV]], [[IF]] ], [ [[REM]], [[ELSE]] ]
332 ; CHECK-NEXT: ret i32 [[RET]]
335 br i1 %cmp, label %if, label %else
338 %div = sdiv i32 %a, %b
342 %rem = srem i32 %a, %b
346 %ret = phi i32 [ %div, %if ], [ %rem, %else ]