1 ; RUN: opt -S -load-store-vectorizer -mattr=-unaligned-buffer-access,+max-private-element-size-16 < %s | FileCheck -check-prefix=ALIGNED -check-prefix=ALL %s
2 ; RUN: opt -S -load-store-vectorizer -mattr=+unaligned-buffer-access,+unaligned-scratch-access,+max-private-element-size-16 < %s | FileCheck -check-prefix=UNALIGNED -check-prefix=ALL %s
3 ; RUN: opt -S -passes='function(load-store-vectorizer)' -mattr=-unaligned-buffer-access,+max-private-element-size-16 < %s | FileCheck -check-prefix=ALIGNED -check-prefix=ALL %s
4 ; RUN: opt -S -passes='function(load-store-vectorizer)' -mattr=+unaligned-buffer-access,+unaligned-scratch-access,+max-private-element-size-16 < %s | FileCheck -check-prefix=UNALIGNED -check-prefix=ALL %s
6 target triple = "amdgcn--"
7 target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5"
9 ; ALL-LABEL: @load_unknown_offset_align1_i8(
10 ; ALL: alloca [128 x i8], align 1
11 ; UNALIGNED: load <2 x i8>, <2 x i8> addrspace(5)* %{{[0-9]+}}, align 1{{$}}
13 ; ALIGNED: load i8, i8 addrspace(5)* %ptr0, align 1{{$}}
14 ; ALIGNED: load i8, i8 addrspace(5)* %ptr1, align 1{{$}}
15 define amdgpu_kernel void @load_unknown_offset_align1_i8(i8 addrspace(1)* noalias %out, i32 %offset) #0 {
16 %alloca = alloca [128 x i8], align 1, addrspace(5)
17 %ptr0 = getelementptr inbounds [128 x i8], [128 x i8] addrspace(5)* %alloca, i32 0, i32 %offset
18 %val0 = load i8, i8 addrspace(5)* %ptr0, align 1
19 %ptr1 = getelementptr inbounds i8, i8 addrspace(5)* %ptr0, i32 1
20 %val1 = load i8, i8 addrspace(5)* %ptr1, align 1
21 %add = add i8 %val0, %val1
22 store i8 %add, i8 addrspace(1)* %out
26 ; ALL-LABEL: @load_unknown_offset_align1_i16(
27 ; ALL: alloca [128 x i16], align 1, addrspace(5){{$}}
28 ; UNALIGNED: load <2 x i16>, <2 x i16> addrspace(5)* %{{[0-9]+}}, align 1{{$}}
30 ; ALIGNED: load i16, i16 addrspace(5)* %ptr0, align 1{{$}}
31 ; ALIGNED: load i16, i16 addrspace(5)* %ptr1, align 1{{$}}
32 define amdgpu_kernel void @load_unknown_offset_align1_i16(i16 addrspace(1)* noalias %out, i32 %offset) #0 {
33 %alloca = alloca [128 x i16], align 1, addrspace(5)
34 %ptr0 = getelementptr inbounds [128 x i16], [128 x i16] addrspace(5)* %alloca, i32 0, i32 %offset
35 %val0 = load i16, i16 addrspace(5)* %ptr0, align 1
36 %ptr1 = getelementptr inbounds i16, i16 addrspace(5)* %ptr0, i32 1
37 %val1 = load i16, i16 addrspace(5)* %ptr1, align 1
38 %add = add i16 %val0, %val1
39 store i16 %add, i16 addrspace(1)* %out
43 ; FIXME: Although the offset is unknown here, we know it is a multiple
44 ; of the element size, so should still be align 4
46 ; ALL-LABEL: @load_unknown_offset_align1_i32(
47 ; ALL: alloca [128 x i32], align 1
48 ; UNALIGNED: load <2 x i32>, <2 x i32> addrspace(5)* %{{[0-9]+}}, align 1{{$}}
50 ; ALIGNED: load i32, i32 addrspace(5)* %ptr0, align 1
51 ; ALIGNED: load i32, i32 addrspace(5)* %ptr1, align 1
52 define amdgpu_kernel void @load_unknown_offset_align1_i32(i32 addrspace(1)* noalias %out, i32 %offset) #0 {
53 %alloca = alloca [128 x i32], align 1, addrspace(5)
54 %ptr0 = getelementptr inbounds [128 x i32], [128 x i32] addrspace(5)* %alloca, i32 0, i32 %offset
55 %val0 = load i32, i32 addrspace(5)* %ptr0, align 1
56 %ptr1 = getelementptr inbounds i32, i32 addrspace(5)* %ptr0, i32 1
57 %val1 = load i32, i32 addrspace(5)* %ptr1, align 1
58 %add = add i32 %val0, %val1
59 store i32 %add, i32 addrspace(1)* %out
63 ; FIXME: Should always increase alignment of the load
64 ; Make sure alloca alignment isn't decreased
65 ; ALL-LABEL: @load_alloca16_unknown_offset_align1_i32(
66 ; ALL: alloca [128 x i32], align 16
68 ; UNALIGNED: load <2 x i32>, <2 x i32> addrspace(5)* %{{[0-9]+}}, align 1{{$}}
69 ; ALIGNED: load <2 x i32>, <2 x i32> addrspace(5)* %{{[0-9]+}}, align 4{{$}}
70 define amdgpu_kernel void @load_alloca16_unknown_offset_align1_i32(i32 addrspace(1)* noalias %out, i32 %offset) #0 {
71 %alloca = alloca [128 x i32], align 16, addrspace(5)
72 %ptr0 = getelementptr inbounds [128 x i32], [128 x i32] addrspace(5)* %alloca, i32 0, i32 %offset
73 %val0 = load i32, i32 addrspace(5)* %ptr0, align 1
74 %ptr1 = getelementptr inbounds i32, i32 addrspace(5)* %ptr0, i32 1
75 %val1 = load i32, i32 addrspace(5)* %ptr1, align 1
76 %add = add i32 %val0, %val1
77 store i32 %add, i32 addrspace(1)* %out
81 ; ALL-LABEL: @store_unknown_offset_align1_i8(
82 ; ALL: alloca [128 x i8], align 1
83 ; UNALIGNED: store <2 x i8> <i8 9, i8 10>, <2 x i8> addrspace(5)* %{{[0-9]+}}, align 1{{$}}
85 ; ALIGNED: store i8 9, i8 addrspace(5)* %ptr0, align 1{{$}}
86 ; ALIGNED: store i8 10, i8 addrspace(5)* %ptr1, align 1{{$}}
87 define amdgpu_kernel void @store_unknown_offset_align1_i8(i8 addrspace(1)* noalias %out, i32 %offset) #0 {
88 %alloca = alloca [128 x i8], align 1, addrspace(5)
89 %ptr0 = getelementptr inbounds [128 x i8], [128 x i8] addrspace(5)* %alloca, i32 0, i32 %offset
90 store i8 9, i8 addrspace(5)* %ptr0, align 1
91 %ptr1 = getelementptr inbounds i8, i8 addrspace(5)* %ptr0, i32 1
92 store i8 10, i8 addrspace(5)* %ptr1, align 1
96 ; ALL-LABEL: @store_unknown_offset_align1_i16(
97 ; ALL: alloca [128 x i16], align 1
98 ; UNALIGNED: store <2 x i16> <i16 9, i16 10>, <2 x i16> addrspace(5)* %{{[0-9]+}}, align 1{{$}}
100 ; ALIGNED: store i16 9, i16 addrspace(5)* %ptr0, align 1{{$}}
101 ; ALIGNED: store i16 10, i16 addrspace(5)* %ptr1, align 1{{$}}
102 define amdgpu_kernel void @store_unknown_offset_align1_i16(i16 addrspace(1)* noalias %out, i32 %offset) #0 {
103 %alloca = alloca [128 x i16], align 1, addrspace(5)
104 %ptr0 = getelementptr inbounds [128 x i16], [128 x i16] addrspace(5)* %alloca, i32 0, i32 %offset
105 store i16 9, i16 addrspace(5)* %ptr0, align 1
106 %ptr1 = getelementptr inbounds i16, i16 addrspace(5)* %ptr0, i32 1
107 store i16 10, i16 addrspace(5)* %ptr1, align 1
111 ; FIXME: Although the offset is unknown here, we know it is a multiple
112 ; of the element size, so it still should be align 4.
114 ; ALL-LABEL: @store_unknown_offset_align1_i32(
115 ; ALL: alloca [128 x i32], align 1
117 ; UNALIGNED: store <2 x i32> <i32 9, i32 10>, <2 x i32> addrspace(5)* %{{[0-9]+}}, align 1{{$}}
119 ; ALIGNED: store i32 9, i32 addrspace(5)* %ptr0, align 1
120 ; ALIGNED: store i32 10, i32 addrspace(5)* %ptr1, align 1
121 define amdgpu_kernel void @store_unknown_offset_align1_i32(i32 addrspace(1)* noalias %out, i32 %offset) #0 {
122 %alloca = alloca [128 x i32], align 1, addrspace(5)
123 %ptr0 = getelementptr inbounds [128 x i32], [128 x i32] addrspace(5)* %alloca, i32 0, i32 %offset
124 store i32 9, i32 addrspace(5)* %ptr0, align 1
125 %ptr1 = getelementptr inbounds i32, i32 addrspace(5)* %ptr0, i32 1
126 store i32 10, i32 addrspace(5)* %ptr1, align 1
130 ; ALL-LABEL: @merge_private_store_4_vector_elts_loads_v4i32(
131 ; ALIGNED: %alloca = alloca [8 x i32], align 4, addrspace(5)
132 ; ALIGNED: store <4 x i32> <i32 9, i32 1, i32 23, i32 19>, <4 x i32> addrspace(5)* %1, align 4
134 ; UNALIGNED: %alloca = alloca [8 x i32], align 1, addrspace(5)
135 ; UNALIGNED: store <4 x i32> <i32 9, i32 1, i32 23, i32 19>, <4 x i32> addrspace(5)* %1, align 1
136 define amdgpu_kernel void @merge_private_store_4_vector_elts_loads_v4i32() {
137 %alloca = alloca [8 x i32], align 1, addrspace(5)
138 %out = bitcast [8 x i32] addrspace(5)* %alloca to i32 addrspace(5)*
139 %out.gep.1 = getelementptr i32, i32 addrspace(5)* %out, i32 1
140 %out.gep.2 = getelementptr i32, i32 addrspace(5)* %out, i32 2
141 %out.gep.3 = getelementptr i32, i32 addrspace(5)* %out, i32 3
143 store i32 9, i32 addrspace(5)* %out, align 1
144 store i32 1, i32 addrspace(5)* %out.gep.1, align 1
145 store i32 23, i32 addrspace(5)* %out.gep.2, align 1
146 store i32 19, i32 addrspace(5)* %out.gep.3, align 1
150 ; ALL-LABEL: @merge_private_store_4_vector_elts_loads_v4i8(
151 ; ALIGNED: %alloca = alloca [8 x i8], align 4, addrspace(5)
152 ; ALIGNED: store <4 x i8> <i8 9, i8 1, i8 23, i8 19>, <4 x i8> addrspace(5)* %1, align 4
154 ; UNALIGNED: %alloca = alloca [8 x i8], align 1, addrspace(5)
155 ; UNALIGNED: store <4 x i8> <i8 9, i8 1, i8 23, i8 19>, <4 x i8> addrspace(5)* %1, align 1
156 define amdgpu_kernel void @merge_private_store_4_vector_elts_loads_v4i8() {
157 %alloca = alloca [8 x i8], align 1, addrspace(5)
158 %out = bitcast [8 x i8] addrspace(5)* %alloca to i8 addrspace(5)*
159 %out.gep.1 = getelementptr i8, i8 addrspace(5)* %out, i8 1
160 %out.gep.2 = getelementptr i8, i8 addrspace(5)* %out, i8 2
161 %out.gep.3 = getelementptr i8, i8 addrspace(5)* %out, i8 3
163 store i8 9, i8 addrspace(5)* %out, align 1
164 store i8 1, i8 addrspace(5)* %out.gep.1, align 1
165 store i8 23, i8 addrspace(5)* %out.gep.2, align 1
166 store i8 19, i8 addrspace(5)* %out.gep.3, align 1
170 ; ALL-LABEL: @merge_private_load_4_vector_elts_loads_v4i32(
171 ; ALIGNED: %alloca = alloca [8 x i32], align 4, addrspace(5)
172 ; ALIGNED: load <4 x i32>, <4 x i32> addrspace(5)* %1, align 4
174 ; UNALIGNED: %alloca = alloca [8 x i32], align 1, addrspace(5)
175 ; UNALIGNED: load <4 x i32>, <4 x i32> addrspace(5)* %1, align 1
176 define amdgpu_kernel void @merge_private_load_4_vector_elts_loads_v4i32() {
177 %alloca = alloca [8 x i32], align 1, addrspace(5)
178 %out = bitcast [8 x i32] addrspace(5)* %alloca to i32 addrspace(5)*
179 %out.gep.1 = getelementptr i32, i32 addrspace(5)* %out, i32 1
180 %out.gep.2 = getelementptr i32, i32 addrspace(5)* %out, i32 2
181 %out.gep.3 = getelementptr i32, i32 addrspace(5)* %out, i32 3
183 %load0 = load i32, i32 addrspace(5)* %out, align 1
184 %load1 = load i32, i32 addrspace(5)* %out.gep.1, align 1
185 %load2 = load i32, i32 addrspace(5)* %out.gep.2, align 1
186 %load3 = load i32, i32 addrspace(5)* %out.gep.3, align 1
190 ; ALL-LABEL: @merge_private_load_4_vector_elts_loads_v4i8(
191 ; ALIGNED: %alloca = alloca [8 x i8], align 4, addrspace(5)
192 ; ALIGNED: load <4 x i8>, <4 x i8> addrspace(5)* %1, align 4
194 ; UNALIGNED: %alloca = alloca [8 x i8], align 1, addrspace(5)
195 ; UNALIGNED: load <4 x i8>, <4 x i8> addrspace(5)* %1, align 1
196 define amdgpu_kernel void @merge_private_load_4_vector_elts_loads_v4i8() {
197 %alloca = alloca [8 x i8], align 1, addrspace(5)
198 %out = bitcast [8 x i8] addrspace(5)* %alloca to i8 addrspace(5)*
199 %out.gep.1 = getelementptr i8, i8 addrspace(5)* %out, i8 1
200 %out.gep.2 = getelementptr i8, i8 addrspace(5)* %out, i8 2
201 %out.gep.3 = getelementptr i8, i8 addrspace(5)* %out, i8 3
203 %load0 = load i8, i8 addrspace(5)* %out, align 1
204 %load1 = load i8, i8 addrspace(5)* %out.gep.1, align 1
205 %load2 = load i8, i8 addrspace(5)* %out.gep.2, align 1
206 %load3 = load i8, i8 addrspace(5)* %out.gep.3, align 1
210 attributes #0 = { nounwind }