tools/llvm-exegesis/lib/Mips/Target.cpp

   1 //===-- Target.cpp ----------------------------------------------*- C++ -*-===//
   2 //
   3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
   4 // See https://llvm.org/LICENSE.txt for license information.
   5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
   6 //
   7 //===----------------------------------------------------------------------===//
   8 #include "../Target.h"
   9 #include "../Latency.h"
  10 #include "Mips.h"
  11 #include "MipsRegisterInfo.h"
  12
  13 namespace llvm {
  14 namespace exegesis {
  15
  16 #include "MipsGenExegesis.inc"
  17
  18 namespace {
  19 class ExegesisMipsTarget : public ExegesisTarget {
  20 public:
  21   ExegesisMipsTarget() : ExegesisTarget(MipsCpuPfmCounters) {}
  22
  23 private:
  24   std::vector<MCInst> setRegTo(const MCSubtargetInfo &STI, unsigned Reg,
  25                                const APInt &Value) const override;
  26   bool matchesArch(Triple::ArchType Arch) const override {
  27     return Arch == Triple::mips || Arch == Triple::mipsel ||
  28            Arch == Triple::mips64 || Arch == Triple::mips64el;
  29   }
  30 };
  31 } // end anonymous namespace
  32
  33 // Generates instruction to load an immediate value into a register.
  34 static MCInst loadImmediate(unsigned Reg, unsigned RegBitWidth,
  35                             const APInt &Value) {
  36   if (Value.getActiveBits() > 16)
  37     llvm_unreachable("Not implemented for Values wider than 16 bits");
  38   if (Value.getBitWidth() > RegBitWidth)
  39     llvm_unreachable("Value must fit in the Register");
  40   return MCInstBuilder(Mips::ORi)
  41       .addReg(Reg)
  42       .addReg(Mips::ZERO)
  43       .addImm(Value.getZExtValue());
  44 }
  45
  46 std::vector<MCInst> ExegesisMipsTarget::setRegTo(const MCSubtargetInfo &STI,
  47                                                  unsigned Reg,
  48                                                  const APInt &Value) const {
  49   if (Mips::GPR32RegClass.contains(Reg))
  50     return {loadImmediate(Reg, 32, Value)};
  51   if (Mips::GPR64RegClass.contains(Reg))
  52     return {loadImmediate(Reg, 64, Value)};
  53   errs() << "setRegTo is not implemented, results will be unreliable\n";
  54   return {};
  55 }
  56
  57 static ExegesisTarget *getTheExegesisMipsTarget() {
  58   static ExegesisMipsTarget Target;
  59   return &Target;
  60 }
  61
  62 void InitializeMipsExegesisTarget() {
  63   ExegesisTarget::registerTarget(getTheExegesisMipsTarget());
  64 }
  65
  66 } // namespace exegesis
  67 } // namespace llvm