lib/Target/BPF/BPFISelLowering.h

   1 //===-- BPFISelLowering.h - BPF DAG Lowering Interface ----------*- C++ -*-===//
   2 //
   3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
   4 // See https://llvm.org/LICENSE.txt for license information.
   5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
   6 //
   7 //===----------------------------------------------------------------------===//
   8 //
   9 // This file defines the interfaces that BPF uses to lower LLVM code into a
  10 // selection DAG.
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14 #ifndef LLVM_LIB_TARGET_BPF_BPFISELLOWERING_H
  15 #define LLVM_LIB_TARGET_BPF_BPFISELLOWERING_H
  16
  17 #include "BPF.h"
  18 #include "llvm/CodeGen/SelectionDAG.h"
  19 #include "llvm/CodeGen/TargetLowering.h"
  20
  21 namespace llvm {
  22 class BPFSubtarget;
  23 namespace BPFISD {
  24 enum NodeType : unsigned {
  25   FIRST_NUMBER = ISD::BUILTIN_OP_END,
  26   RET_FLAG,
  27   CALL,
  28   SELECT_CC,
  29   BR_CC,
  30   Wrapper,
  31   MEMCPY
  32 };
  33 }
  34
  35 class BPFTargetLowering : public TargetLowering {
  36 public:
  37   explicit BPFTargetLowering(const TargetMachine &TM, const BPFSubtarget &STI);
  38
  39   // Provide custom lowering hooks for some operations.
  40   SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
  41
  42   // This method returns the name of a target specific DAG node.
  43   const char *getTargetNodeName(unsigned Opcode) const override;
  44
  45   // This method decides whether folding a constant offset
  46   // with the given GlobalAddress is legal.
  47   bool isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const override;
  48
  49   std::pair<unsigned, const TargetRegisterClass *>
  50   getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
  51                                StringRef Constraint, MVT VT) const override;
  52
  53   MachineBasicBlock *
  54   EmitInstrWithCustomInserter(MachineInstr &MI,
  55                               MachineBasicBlock *BB) const override;
  56
  57   bool getHasAlu32() const { return HasAlu32; }
  58   bool getHasJmp32() const { return HasJmp32; }
  59   bool getHasJmpExt() const { return HasJmpExt; }
  60
  61   EVT getSetCCResultType(const DataLayout &DL, LLVMContext &Context,
  62                          EVT VT) const override;
  63
  64   MVT getScalarShiftAmountTy(const DataLayout &, EVT) const override;
  65
  66 private:
  67   // Control Instruction Selection Features
  68   bool HasAlu32;
  69   bool HasJmp32;
  70   bool HasJmpExt;
  71
  72   SDValue LowerBR_CC(SDValue Op, SelectionDAG &DAG) const;
  73   SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const;
  74   SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;
  75
  76   // Lower the result values of a call, copying them out of physregs into vregs
  77   SDValue LowerCallResult(SDValue Chain, SDValue InFlag,
  78                           CallingConv::ID CallConv, bool IsVarArg,
  79                           const SmallVectorImpl<ISD::InputArg> &Ins,
  80                           const SDLoc &DL, SelectionDAG &DAG,
  81                           SmallVectorImpl<SDValue> &InVals) const;
  82
  83   // Maximum number of arguments to a call
  84   static const unsigned MaxArgs;
  85
  86   // Lower a call into CALLSEQ_START - BPFISD:CALL - CALLSEQ_END chain
  87   SDValue LowerCall(TargetLowering::CallLoweringInfo &CLI,
  88                     SmallVectorImpl<SDValue> &InVals) const override;
  89
  90   // Lower incoming arguments, copy physregs into vregs
  91   SDValue LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv,
  92                                bool IsVarArg,
  93                                const SmallVectorImpl<ISD::InputArg> &Ins,
  94                                const SDLoc &DL, SelectionDAG &DAG,
  95                                SmallVectorImpl<SDValue> &InVals) const override;
  96
  97   SDValue LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool IsVarArg,
  98                       const SmallVectorImpl<ISD::OutputArg> &Outs,
  99                       const SmallVectorImpl<SDValue> &OutVals, const SDLoc &DL,
 100                       SelectionDAG &DAG) const override;
 101
 102   EVT getOptimalMemOpType(uint64_t Size, unsigned DstAlign, unsigned SrcAlign,
 103                           bool IsMemset, bool ZeroMemset, bool MemcpyStrSrc,
 104                           const AttributeList &FuncAttributes) const override {
 105     return Size >= 8 ? MVT::i64 : MVT::i32;
 106   }
 107
 108   bool shouldConvertConstantLoadToIntImm(const APInt &Imm,
 109                                          Type *Ty) const override {
 110     return true;
 111   }
 112
 113   unsigned EmitSubregExt(MachineInstr &MI, MachineBasicBlock *BB, unsigned Reg,
 114                          bool isSigned) const;
 115
 116   MachineBasicBlock * EmitInstrWithCustomInserterMemcpy(MachineInstr &MI,
 117                                                         MachineBasicBlock *BB)
 118                                                         const;
 119
 120 };
 121 }
 122
 123 #endif