lib/Analysis/TargetTransformInfo.cpp

   1 //===- llvm/Analysis/TargetTransformInfo.cpp ------------------------------===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9
  10 #include "llvm/Analysis/TargetTransformInfo.h"
  11 #include "llvm/Analysis/TargetTransformInfoImpl.h"
  12 #include "llvm/IR/CallSite.h"
  13 #include "llvm/IR/DataLayout.h"
  14 #include "llvm/IR/Instruction.h"
  15 #include "llvm/IR/Instructions.h"
  16 #include "llvm/IR/IntrinsicInst.h"
  17 #include "llvm/IR/Module.h"
  18 #include "llvm/IR/Operator.h"
  19 #include "llvm/IR/PatternMatch.h"
  20 #include "llvm/Support/CommandLine.h"
  21 #include "llvm/Support/ErrorHandling.h"
  22 #include <utility>
  23
  24 using namespace llvm;
  25 using namespace PatternMatch;
  26
  27 #define DEBUG_TYPE "tti"
  28
  29 static cl::opt<bool> EnableReduxCost("costmodel-reduxcost", cl::init(false),
  30                                      cl::Hidden,
  31                                      cl::desc("Recognize reduction patterns."));
  32
  33 namespace {
  34 /// No-op implementation of the TTI interface using the utility base
  35 /// classes.
  36 ///
  37 /// This is used when no target specific information is available.
  38 struct NoTTIImpl : TargetTransformInfoImplCRTPBase<NoTTIImpl> {
  39   explicit NoTTIImpl(const DataLayout &DL)
  40       : TargetTransformInfoImplCRTPBase<NoTTIImpl>(DL) {}
  41 };
  42 }
  43
  44 TargetTransformInfo::TargetTransformInfo(const DataLayout &DL)
  45     : TTIImpl(new Model<NoTTIImpl>(NoTTIImpl(DL))) {}
  46
  47 TargetTransformInfo::~TargetTransformInfo() {}
  48
  49 TargetTransformInfo::TargetTransformInfo(TargetTransformInfo &&Arg)
  50     : TTIImpl(std::move(Arg.TTIImpl)) {}
  51
  52 TargetTransformInfo &TargetTransformInfo::operator=(TargetTransformInfo &&RHS) {
  53   TTIImpl = std::move(RHS.TTIImpl);
  54   return *this;
  55 }
  56
  57 int TargetTransformInfo::getOperationCost(unsigned Opcode, Type *Ty,
  58                                           Type *OpTy) const {
  59   int Cost = TTIImpl->getOperationCost(Opcode, Ty, OpTy);
  60   assert(Cost >= 0 && "TTI should not produce negative costs!");
  61   return Cost;
  62 }
  63
  64 int TargetTransformInfo::getCallCost(FunctionType *FTy, int NumArgs) const {
  65   int Cost = TTIImpl->getCallCost(FTy, NumArgs);
  66   assert(Cost >= 0 && "TTI should not produce negative costs!");
  67   return Cost;
  68 }
  69
  70 int TargetTransformInfo::getCallCost(const Function *F,
  71                                      ArrayRef<const Value *> Arguments) const {
  72   int Cost = TTIImpl->getCallCost(F, Arguments);
  73   assert(Cost >= 0 && "TTI should not produce negative costs!");
  74   return Cost;
  75 }
  76
  77 unsigned TargetTransformInfo::getInliningThresholdMultiplier() const {
  78   return TTIImpl->getInliningThresholdMultiplier();
  79 }
  80
  81 int TargetTransformInfo::getGEPCost(Type *PointeeType, const Value *Ptr,
  82                                     ArrayRef<const Value *> Operands) const {
  83   return TTIImpl->getGEPCost(PointeeType, Ptr, Operands);
  84 }
  85
  86 int TargetTransformInfo::getExtCost(const Instruction *I,
  87                                     const Value *Src) const {
  88   return TTIImpl->getExtCost(I, Src);
  89 }
  90
  91 int TargetTransformInfo::getIntrinsicCost(
  92     Intrinsic::ID IID, Type *RetTy, ArrayRef<const Value *> Arguments) const {
  93   int Cost = TTIImpl->getIntrinsicCost(IID, RetTy, Arguments);
  94   assert(Cost >= 0 && "TTI should not produce negative costs!");
  95   return Cost;
  96 }
  97
  98 unsigned
  99 TargetTransformInfo::getEstimatedNumberOfCaseClusters(const SwitchInst &SI,
 100                                                       unsigned &JTSize) const {
 101   return TTIImpl->getEstimatedNumberOfCaseClusters(SI, JTSize);
 102 }
 103
 104 int TargetTransformInfo::getUserCost(const User *U,
 105     ArrayRef<const Value *> Operands) const {
 106   int Cost = TTIImpl->getUserCost(U, Operands);
 107   assert(Cost >= 0 && "TTI should not produce negative costs!");
 108   return Cost;
 109 }
 110
 111 bool TargetTransformInfo::hasBranchDivergence() const {
 112   return TTIImpl->hasBranchDivergence();
 113 }
 114
 115 bool TargetTransformInfo::isSourceOfDivergence(const Value *V) const {
 116   return TTIImpl->isSourceOfDivergence(V);
 117 }
 118
 119 bool llvm::TargetTransformInfo::isAlwaysUniform(const Value *V) const {
 120   return TTIImpl->isAlwaysUniform(V);
 121 }
 122
 123 unsigned TargetTransformInfo::getFlatAddressSpace() const {
 124   return TTIImpl->getFlatAddressSpace();
 125 }
 126
 127 bool TargetTransformInfo::isLoweredToCall(const Function *F) const {
 128   return TTIImpl->isLoweredToCall(F);
 129 }
 130
 131 void TargetTransformInfo::getUnrollingPreferences(
 132     Loop *L, ScalarEvolution &SE, UnrollingPreferences &UP) const {
 133   return TTIImpl->getUnrollingPreferences(L, SE, UP);
 134 }
 135
 136 bool TargetTransformInfo::isLegalAddImmediate(int64_t Imm) const {
 137   return TTIImpl->isLegalAddImmediate(Imm);
 138 }
 139
 140 bool TargetTransformInfo::isLegalICmpImmediate(int64_t Imm) const {
 141   return TTIImpl->isLegalICmpImmediate(Imm);
 142 }
 143
 144 bool TargetTransformInfo::isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV,
 145                                                 int64_t BaseOffset,
 146                                                 bool HasBaseReg,
 147                                                 int64_t Scale,
 148                                                 unsigned AddrSpace,
 149                                                 Instruction *I) const {
 150   return TTIImpl->isLegalAddressingMode(Ty, BaseGV, BaseOffset, HasBaseReg,
 151                                         Scale, AddrSpace, I);
 152 }
 153
 154 bool TargetTransformInfo::isLSRCostLess(LSRCost &C1, LSRCost &C2) const {
 155   return TTIImpl->isLSRCostLess(C1, C2);
 156 }
 157
 158 bool TargetTransformInfo::canMacroFuseCmp() const {
 159   return TTIImpl->canMacroFuseCmp();
 160 }
 161
 162 bool TargetTransformInfo::shouldFavorPostInc() const {
 163   return TTIImpl->shouldFavorPostInc();
 164 }
 165
 166 bool TargetTransformInfo::isLegalMaskedStore(Type *DataType) const {
 167   return TTIImpl->isLegalMaskedStore(DataType);
 168 }
 169
 170 bool TargetTransformInfo::isLegalMaskedLoad(Type *DataType) const {
 171   return TTIImpl->isLegalMaskedLoad(DataType);
 172 }
 173
 174 bool TargetTransformInfo::isLegalMaskedGather(Type *DataType) const {
 175   return TTIImpl->isLegalMaskedGather(DataType);
 176 }
 177
 178 bool TargetTransformInfo::isLegalMaskedScatter(Type *DataType) const {
 179   return TTIImpl->isLegalMaskedScatter(DataType);
 180 }
 181
 182 bool TargetTransformInfo::hasDivRemOp(Type *DataType, bool IsSigned) const {
 183   return TTIImpl->hasDivRemOp(DataType, IsSigned);
 184 }
 185
 186 bool TargetTransformInfo::hasVolatileVariant(Instruction *I,
 187                                              unsigned AddrSpace) const {
 188   return TTIImpl->hasVolatileVariant(I, AddrSpace);
 189 }
 190
 191 bool TargetTransformInfo::prefersVectorizedAddressing() const {
 192   return TTIImpl->prefersVectorizedAddressing();
 193 }
 194
 195 int TargetTransformInfo::getScalingFactorCost(Type *Ty, GlobalValue *BaseGV,
 196                                               int64_t BaseOffset,
 197                                               bool HasBaseReg,
 198                                               int64_t Scale,
 199                                               unsigned AddrSpace) const {
 200   int Cost = TTIImpl->getScalingFactorCost(Ty, BaseGV, BaseOffset, HasBaseReg,
 201                                            Scale, AddrSpace);
 202   assert(Cost >= 0 && "TTI should not produce negative costs!");
 203   return Cost;
 204 }
 205
 206 bool TargetTransformInfo::LSRWithInstrQueries() const {
 207   return TTIImpl->LSRWithInstrQueries();
 208 }
 209
 210 bool TargetTransformInfo::isTruncateFree(Type *Ty1, Type *Ty2) const {
 211   return TTIImpl->isTruncateFree(Ty1, Ty2);
 212 }
 213
 214 bool TargetTransformInfo::isProfitableToHoist(Instruction *I) const {
 215   return TTIImpl->isProfitableToHoist(I);
 216 }
 217
 218 bool TargetTransformInfo::useAA() const { return TTIImpl->useAA(); }
 219
 220 bool TargetTransformInfo::isTypeLegal(Type *Ty) const {
 221   return TTIImpl->isTypeLegal(Ty);
 222 }
 223
 224 unsigned TargetTransformInfo::getJumpBufAlignment() const {
 225   return TTIImpl->getJumpBufAlignment();
 226 }
 227
 228 unsigned TargetTransformInfo::getJumpBufSize() const {
 229   return TTIImpl->getJumpBufSize();
 230 }
 231
 232 bool TargetTransformInfo::shouldBuildLookupTables() const {
 233   return TTIImpl->shouldBuildLookupTables();
 234 }
 235 bool TargetTransformInfo::shouldBuildLookupTablesForConstant(Constant *C) const {
 236   return TTIImpl->shouldBuildLookupTablesForConstant(C);
 237 }
 238
 239 bool TargetTransformInfo::useColdCCForColdCall(Function &F) const {
 240   return TTIImpl->useColdCCForColdCall(F);
 241 }
 242
 243 unsigned TargetTransformInfo::
 244 getScalarizationOverhead(Type *Ty, bool Insert, bool Extract) const {
 245   return TTIImpl->getScalarizationOverhead(Ty, Insert, Extract);
 246 }
 247
 248 unsigned TargetTransformInfo::
 249 getOperandsScalarizationOverhead(ArrayRef<const Value *> Args,
 250                                  unsigned VF) const {
 251   return TTIImpl->getOperandsScalarizationOverhead(Args, VF);
 252 }
 253
 254 bool TargetTransformInfo::supportsEfficientVectorElementLoadStore() const {
 255   return TTIImpl->supportsEfficientVectorElementLoadStore();
 256 }
 257
 258 bool TargetTransformInfo::enableAggressiveInterleaving(bool LoopHasReductions) const {
 259   return TTIImpl->enableAggressiveInterleaving(LoopHasReductions);
 260 }
 261
 262 const TargetTransformInfo::MemCmpExpansionOptions *
 263 TargetTransformInfo::enableMemCmpExpansion(bool IsZeroCmp) const {
 264   return TTIImpl->enableMemCmpExpansion(IsZeroCmp);
 265 }
 266
 267 bool TargetTransformInfo::enableInterleavedAccessVectorization() const {
 268   return TTIImpl->enableInterleavedAccessVectorization();
 269 }
 270
 271 bool TargetTransformInfo::enableMaskedInterleavedAccessVectorization() const {
 272   return TTIImpl->enableMaskedInterleavedAccessVectorization();
 273 }
 274
 275 bool TargetTransformInfo::isFPVectorizationPotentiallyUnsafe() const {
 276   return TTIImpl->isFPVectorizationPotentiallyUnsafe();
 277 }
 278
 279 bool TargetTransformInfo::allowsMisalignedMemoryAccesses(LLVMContext &Context,
 280                                                          unsigned BitWidth,
 281                                                          unsigned AddressSpace,
 282                                                          unsigned Alignment,
 283                                                          bool *Fast) const {
 284   return TTIImpl->allowsMisalignedMemoryAccesses(Context, BitWidth, AddressSpace,
 285                                                  Alignment, Fast);
 286 }
 287
 288 TargetTransformInfo::PopcntSupportKind
 289 TargetTransformInfo::getPopcntSupport(unsigned IntTyWidthInBit) const {
 290   return TTIImpl->getPopcntSupport(IntTyWidthInBit);
 291 }
 292
 293 bool TargetTransformInfo::haveFastSqrt(Type *Ty) const {
 294   return TTIImpl->haveFastSqrt(Ty);
 295 }
 296
 297 bool TargetTransformInfo::isFCmpOrdCheaperThanFCmpZero(Type *Ty) const {
 298   return TTIImpl->isFCmpOrdCheaperThanFCmpZero(Ty);
 299 }
 300
 301 int TargetTransformInfo::getFPOpCost(Type *Ty) const {
 302   int Cost = TTIImpl->getFPOpCost(Ty);
 303   assert(Cost >= 0 && "TTI should not produce negative costs!");
 304   return Cost;
 305 }
 306
 307 int TargetTransformInfo::getIntImmCodeSizeCost(unsigned Opcode, unsigned Idx,
 308                                                const APInt &Imm,
 309                                                Type *Ty) const {
 310   int Cost = TTIImpl->getIntImmCodeSizeCost(Opcode, Idx, Imm, Ty);
 311   assert(Cost >= 0 && "TTI should not produce negative costs!");
 312   return Cost;
 313 }
 314
 315 int TargetTransformInfo::getIntImmCost(const APInt &Imm, Type *Ty) const {
 316   int Cost = TTIImpl->getIntImmCost(Imm, Ty);
 317   assert(Cost >= 0 && "TTI should not produce negative costs!");
 318   return Cost;
 319 }
 320
 321 int TargetTransformInfo::getIntImmCost(unsigned Opcode, unsigned Idx,
 322                                        const APInt &Imm, Type *Ty) const {
 323   int Cost = TTIImpl->getIntImmCost(Opcode, Idx, Imm, Ty);
 324   assert(Cost >= 0 && "TTI should not produce negative costs!");
 325   return Cost;
 326 }
 327
 328 int TargetTransformInfo::getIntImmCost(Intrinsic::ID IID, unsigned Idx,
 329                                        const APInt &Imm, Type *Ty) const {
 330   int Cost = TTIImpl->getIntImmCost(IID, Idx, Imm, Ty);
 331   assert(Cost >= 0 && "TTI should not produce negative costs!");
 332   return Cost;
 333 }
 334
 335 unsigned TargetTransformInfo::getNumberOfRegisters(bool Vector) const {
 336   return TTIImpl->getNumberOfRegisters(Vector);
 337 }
 338
 339 unsigned TargetTransformInfo::getRegisterBitWidth(bool Vector) const {
 340   return TTIImpl->getRegisterBitWidth(Vector);
 341 }
 342
 343 unsigned TargetTransformInfo::getMinVectorRegisterBitWidth() const {
 344   return TTIImpl->getMinVectorRegisterBitWidth();
 345 }
 346
 347 bool TargetTransformInfo::shouldMaximizeVectorBandwidth(bool OptSize) const {
 348   return TTIImpl->shouldMaximizeVectorBandwidth(OptSize);
 349 }
 350
 351 unsigned TargetTransformInfo::getMinimumVF(unsigned ElemWidth) const {
 352   return TTIImpl->getMinimumVF(ElemWidth);
 353 }
 354
 355 bool TargetTransformInfo::shouldConsiderAddressTypePromotion(
 356     const Instruction &I, bool &AllowPromotionWithoutCommonHeader) const {
 357   return TTIImpl->shouldConsiderAddressTypePromotion(
 358       I, AllowPromotionWithoutCommonHeader);
 359 }
 360
 361 unsigned TargetTransformInfo::getCacheLineSize() const {
 362   return TTIImpl->getCacheLineSize();
 363 }
 364
 365 llvm::Optional<unsigned> TargetTransformInfo::getCacheSize(CacheLevel Level)
 366   const {
 367   return TTIImpl->getCacheSize(Level);
 368 }
 369
 370 llvm::Optional<unsigned> TargetTransformInfo::getCacheAssociativity(
 371   CacheLevel Level) const {
 372   return TTIImpl->getCacheAssociativity(Level);
 373 }
 374
 375 unsigned TargetTransformInfo::getPrefetchDistance() const {
 376   return TTIImpl->getPrefetchDistance();
 377 }
 378
 379 unsigned TargetTransformInfo::getMinPrefetchStride() const {
 380   return TTIImpl->getMinPrefetchStride();
 381 }
 382
 383 unsigned TargetTransformInfo::getMaxPrefetchIterationsAhead() const {
 384   return TTIImpl->getMaxPrefetchIterationsAhead();
 385 }
 386
 387 unsigned TargetTransformInfo::getMaxInterleaveFactor(unsigned VF) const {
 388   return TTIImpl->getMaxInterleaveFactor(VF);
 389 }
 390
 391 TargetTransformInfo::OperandValueKind
 392 TargetTransformInfo::getOperandInfo(Value *V, OperandValueProperties &OpProps) {
 393   OperandValueKind OpInfo = OK_AnyValue;
 394   OpProps = OP_None;
 395
 396   if (auto *CI = dyn_cast<ConstantInt>(V)) {
 397     if (CI->getValue().isPowerOf2())
 398       OpProps = OP_PowerOf2;
 399     return OK_UniformConstantValue;
 400   }
 401
 402   // A broadcast shuffle creates a uniform value.
 403   // TODO: Add support for non-zero index broadcasts.
 404   // TODO: Add support for different source vector width.
 405   if (auto *ShuffleInst = dyn_cast<ShuffleVectorInst>(V))
 406     if (ShuffleInst->isZeroEltSplat())
 407       OpInfo = OK_UniformValue;
 408
 409   const Value *Splat = getSplatValue(V);
 410
 411   // Check for a splat of a constant or for a non uniform vector of constants
 412   // and check if the constant(s) are all powers of two.
 413   if (isa<ConstantVector>(V) || isa<ConstantDataVector>(V)) {
 414     OpInfo = OK_NonUniformConstantValue;
 415     if (Splat) {
 416       OpInfo = OK_UniformConstantValue;
 417       if (auto *CI = dyn_cast<ConstantInt>(Splat))
 418         if (CI->getValue().isPowerOf2())
 419           OpProps = OP_PowerOf2;
 420     } else if (auto *CDS = dyn_cast<ConstantDataSequential>(V)) {
 421       OpProps = OP_PowerOf2;
 422       for (unsigned I = 0, E = CDS->getNumElements(); I != E; ++I) {
 423         if (auto *CI = dyn_cast<ConstantInt>(CDS->getElementAsConstant(I)))
 424           if (CI->getValue().isPowerOf2())
 425             continue;
 426         OpProps = OP_None;
 427         break;
 428       }
 429     }
 430   }
 431
 432   // Check for a splat of a uniform value. This is not loop aware, so return
 433   // true only for the obviously uniform cases (argument, globalvalue)
 434   if (Splat && (isa<Argument>(Splat) || isa<GlobalValue>(Splat)))
 435     OpInfo = OK_UniformValue;
 436
 437   return OpInfo;
 438 }
 439
 440 int TargetTransformInfo::getArithmeticInstrCost(
 441     unsigned Opcode, Type *Ty, OperandValueKind Opd1Info,
 442     OperandValueKind Opd2Info, OperandValueProperties Opd1PropInfo,
 443     OperandValueProperties Opd2PropInfo,
 444     ArrayRef<const Value *> Args) const {
 445   int Cost = TTIImpl->getArithmeticInstrCost(Opcode, Ty, Opd1Info, Opd2Info,
 446                                              Opd1PropInfo, Opd2PropInfo, Args);
 447   assert(Cost >= 0 && "TTI should not produce negative costs!");
 448   return Cost;
 449 }
 450
 451 int TargetTransformInfo::getShuffleCost(ShuffleKind Kind, Type *Ty, int Index,
 452                                         Type *SubTp) const {
 453   int Cost = TTIImpl->getShuffleCost(Kind, Ty, Index, SubTp);
 454   assert(Cost >= 0 && "TTI should not produce negative costs!");
 455   return Cost;
 456 }
 457
 458 int TargetTransformInfo::getCastInstrCost(unsigned Opcode, Type *Dst,
 459                                  Type *Src, const Instruction *I) const {
 460   assert ((I == nullptr || I->getOpcode() == Opcode) &&
 461           "Opcode should reflect passed instruction.");
 462   int Cost = TTIImpl->getCastInstrCost(Opcode, Dst, Src, I);
 463   assert(Cost >= 0 && "TTI should not produce negative costs!");
 464   return Cost;
 465 }
 466
 467 int TargetTransformInfo::getExtractWithExtendCost(unsigned Opcode, Type *Dst,
 468                                                   VectorType *VecTy,
 469                                                   unsigned Index) const {
 470   int Cost = TTIImpl->getExtractWithExtendCost(Opcode, Dst, VecTy, Index);
 471   assert(Cost >= 0 && "TTI should not produce negative costs!");
 472   return Cost;
 473 }
 474
 475 int TargetTransformInfo::getCFInstrCost(unsigned Opcode) const {
 476   int Cost = TTIImpl->getCFInstrCost(Opcode);
 477   assert(Cost >= 0 && "TTI should not produce negative costs!");
 478   return Cost;
 479 }
 480
 481 int TargetTransformInfo::getCmpSelInstrCost(unsigned Opcode, Type *ValTy,
 482                                  Type *CondTy, const Instruction *I) const {
 483   assert ((I == nullptr || I->getOpcode() == Opcode) &&
 484           "Opcode should reflect passed instruction.");
 485   int Cost = TTIImpl->getCmpSelInstrCost(Opcode, ValTy, CondTy, I);
 486   assert(Cost >= 0 && "TTI should not produce negative costs!");
 487   return Cost;
 488 }
 489
 490 int TargetTransformInfo::getVectorInstrCost(unsigned Opcode, Type *Val,
 491                                             unsigned Index) const {
 492   int Cost = TTIImpl->getVectorInstrCost(Opcode, Val, Index);
 493   assert(Cost >= 0 && "TTI should not produce negative costs!");
 494   return Cost;
 495 }
 496
 497 int TargetTransformInfo::getMemoryOpCost(unsigned Opcode, Type *Src,
 498                                          unsigned Alignment,
 499                                          unsigned AddressSpace,
 500                                          const Instruction *I) const {
 501   assert ((I == nullptr || I->getOpcode() == Opcode) &&
 502           "Opcode should reflect passed instruction.");
 503   int Cost = TTIImpl->getMemoryOpCost(Opcode, Src, Alignment, AddressSpace, I);
 504   assert(Cost >= 0 && "TTI should not produce negative costs!");
 505   return Cost;
 506 }
 507
 508 int TargetTransformInfo::getMaskedMemoryOpCost(unsigned Opcode, Type *Src,
 509                                                unsigned Alignment,
 510                                                unsigned AddressSpace) const {
 511   int Cost =
 512       TTIImpl->getMaskedMemoryOpCost(Opcode, Src, Alignment, AddressSpace);
 513   assert(Cost >= 0 && "TTI should not produce negative costs!");
 514   return Cost;
 515 }
 516
 517 int TargetTransformInfo::getGatherScatterOpCost(unsigned Opcode, Type *DataTy,
 518                                                 Value *Ptr, bool VariableMask,
 519                                                 unsigned Alignment) const {
 520   int Cost = TTIImpl->getGatherScatterOpCost(Opcode, DataTy, Ptr, VariableMask,
 521                                              Alignment);
 522   assert(Cost >= 0 && "TTI should not produce negative costs!");
 523   return Cost;
 524 }
 525
 526 int TargetTransformInfo::getInterleavedMemoryOpCost(
 527     unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef<unsigned> Indices,
 528     unsigned Alignment, unsigned AddressSpace, bool UseMaskForCond,
 529     bool UseMaskForGaps) const {
 530   int Cost = TTIImpl->getInterleavedMemoryOpCost(Opcode, VecTy, Factor, Indices,
 531                                                  Alignment, AddressSpace,
 532                                                  UseMaskForCond,
 533                                                  UseMaskForGaps);
 534   assert(Cost >= 0 && "TTI should not produce negative costs!");
 535   return Cost;
 536 }
 537
 538 int TargetTransformInfo::getIntrinsicInstrCost(Intrinsic::ID ID, Type *RetTy,
 539                                     ArrayRef<Type *> Tys, FastMathFlags FMF,
 540                                     unsigned ScalarizationCostPassed) const {
 541   int Cost = TTIImpl->getIntrinsicInstrCost(ID, RetTy, Tys, FMF,
 542                                             ScalarizationCostPassed);
 543   assert(Cost >= 0 && "TTI should not produce negative costs!");
 544   return Cost;
 545 }
 546
 547 int TargetTransformInfo::getIntrinsicInstrCost(Intrinsic::ID ID, Type *RetTy,
 548            ArrayRef<Value *> Args, FastMathFlags FMF, unsigned VF) const {
 549   int Cost = TTIImpl->getIntrinsicInstrCost(ID, RetTy, Args, FMF, VF);
 550   assert(Cost >= 0 && "TTI should not produce negative costs!");
 551   return Cost;
 552 }
 553
 554 int TargetTransformInfo::getCallInstrCost(Function *F, Type *RetTy,
 555                                           ArrayRef<Type *> Tys) const {
 556   int Cost = TTIImpl->getCallInstrCost(F, RetTy, Tys);
 557   assert(Cost >= 0 && "TTI should not produce negative costs!");
 558   return Cost;
 559 }
 560
 561 unsigned TargetTransformInfo::getNumberOfParts(Type *Tp) const {
 562   return TTIImpl->getNumberOfParts(Tp);
 563 }
 564
 565 int TargetTransformInfo::getAddressComputationCost(Type *Tp,
 566                                                    ScalarEvolution *SE,
 567                                                    const SCEV *Ptr) const {
 568   int Cost = TTIImpl->getAddressComputationCost(Tp, SE, Ptr);
 569   assert(Cost >= 0 && "TTI should not produce negative costs!");
 570   return Cost;
 571 }
 572
 573 int TargetTransformInfo::getArithmeticReductionCost(unsigned Opcode, Type *Ty,
 574                                                     bool IsPairwiseForm) const {
 575   int Cost = TTIImpl->getArithmeticReductionCost(Opcode, Ty, IsPairwiseForm);
 576   assert(Cost >= 0 && "TTI should not produce negative costs!");
 577   return Cost;
 578 }
 579
 580 int TargetTransformInfo::getMinMaxReductionCost(Type *Ty, Type *CondTy,
 581                                                 bool IsPairwiseForm,
 582                                                 bool IsUnsigned) const {
 583   int Cost =
 584       TTIImpl->getMinMaxReductionCost(Ty, CondTy, IsPairwiseForm, IsUnsigned);
 585   assert(Cost >= 0 && "TTI should not produce negative costs!");
 586   return Cost;
 587 }
 588
 589 unsigned
 590 TargetTransformInfo::getCostOfKeepingLiveOverCall(ArrayRef<Type *> Tys) const {
 591   return TTIImpl->getCostOfKeepingLiveOverCall(Tys);
 592 }
 593
 594 bool TargetTransformInfo::getTgtMemIntrinsic(IntrinsicInst *Inst,
 595                                              MemIntrinsicInfo &Info) const {
 596   return TTIImpl->getTgtMemIntrinsic(Inst, Info);
 597 }
 598
 599 unsigned TargetTransformInfo::getAtomicMemIntrinsicMaxElementSize() const {
 600   return TTIImpl->getAtomicMemIntrinsicMaxElementSize();
 601 }
 602
 603 Value *TargetTransformInfo::getOrCreateResultFromMemIntrinsic(
 604     IntrinsicInst *Inst, Type *ExpectedType) const {
 605   return TTIImpl->getOrCreateResultFromMemIntrinsic(Inst, ExpectedType);
 606 }
 607
 608 Type *TargetTransformInfo::getMemcpyLoopLoweringType(LLVMContext &Context,
 609                                                      Value *Length,
 610                                                      unsigned SrcAlign,
 611                                                      unsigned DestAlign) const {
 612   return TTIImpl->getMemcpyLoopLoweringType(Context, Length, SrcAlign,
 613                                             DestAlign);
 614 }
 615
 616 void TargetTransformInfo::getMemcpyLoopResidualLoweringType(
 617     SmallVectorImpl<Type *> &OpsOut, LLVMContext &Context,
 618     unsigned RemainingBytes, unsigned SrcAlign, unsigned DestAlign) const {
 619   TTIImpl->getMemcpyLoopResidualLoweringType(OpsOut, Context, RemainingBytes,
 620                                              SrcAlign, DestAlign);
 621 }
 622
 623 bool TargetTransformInfo::areInlineCompatible(const Function *Caller,
 624                                               const Function *Callee) const {
 625   return TTIImpl->areInlineCompatible(Caller, Callee);
 626 }
 627
 628 bool TargetTransformInfo::isIndexedLoadLegal(MemIndexedMode Mode,
 629                                              Type *Ty) const {
 630   return TTIImpl->isIndexedLoadLegal(Mode, Ty);
 631 }
 632
 633 bool TargetTransformInfo::isIndexedStoreLegal(MemIndexedMode Mode,
 634                                               Type *Ty) const {
 635   return TTIImpl->isIndexedStoreLegal(Mode, Ty);
 636 }
 637
 638 unsigned TargetTransformInfo::getLoadStoreVecRegBitWidth(unsigned AS) const {
 639   return TTIImpl->getLoadStoreVecRegBitWidth(AS);
 640 }
 641
 642 bool TargetTransformInfo::isLegalToVectorizeLoad(LoadInst *LI) const {
 643   return TTIImpl->isLegalToVectorizeLoad(LI);
 644 }
 645
 646 bool TargetTransformInfo::isLegalToVectorizeStore(StoreInst *SI) const {
 647   return TTIImpl->isLegalToVectorizeStore(SI);
 648 }
 649
 650 bool TargetTransformInfo::isLegalToVectorizeLoadChain(
 651     unsigned ChainSizeInBytes, unsigned Alignment, unsigned AddrSpace) const {
 652   return TTIImpl->isLegalToVectorizeLoadChain(ChainSizeInBytes, Alignment,
 653                                               AddrSpace);
 654 }
 655
 656 bool TargetTransformInfo::isLegalToVectorizeStoreChain(
 657     unsigned ChainSizeInBytes, unsigned Alignment, unsigned AddrSpace) const {
 658   return TTIImpl->isLegalToVectorizeStoreChain(ChainSizeInBytes, Alignment,
 659                                                AddrSpace);
 660 }
 661
 662 unsigned TargetTransformInfo::getLoadVectorFactor(unsigned VF,
 663                                                   unsigned LoadSize,
 664                                                   unsigned ChainSizeInBytes,
 665                                                   VectorType *VecTy) const {
 666   return TTIImpl->getLoadVectorFactor(VF, LoadSize, ChainSizeInBytes, VecTy);
 667 }
 668
 669 unsigned TargetTransformInfo::getStoreVectorFactor(unsigned VF,
 670                                                    unsigned StoreSize,
 671                                                    unsigned ChainSizeInBytes,
 672                                                    VectorType *VecTy) const {
 673   return TTIImpl->getStoreVectorFactor(VF, StoreSize, ChainSizeInBytes, VecTy);
 674 }
 675
 676 bool TargetTransformInfo::useReductionIntrinsic(unsigned Opcode,
 677                                                 Type *Ty, ReductionFlags Flags) const {
 678   return TTIImpl->useReductionIntrinsic(Opcode, Ty, Flags);
 679 }
 680
 681 bool TargetTransformInfo::shouldExpandReduction(const IntrinsicInst *II) const {
 682   return TTIImpl->shouldExpandReduction(II);
 683 }
 684
 685 int TargetTransformInfo::getInstructionLatency(const Instruction *I) const {
 686   return TTIImpl->getInstructionLatency(I);
 687 }
 688
 689 static bool matchPairwiseShuffleMask(ShuffleVectorInst *SI, bool IsLeft,
 690                                      unsigned Level) {
 691   // We don't need a shuffle if we just want to have element 0 in position 0 of
 692   // the vector.
 693   if (!SI && Level == 0 && IsLeft)
 694     return true;
 695   else if (!SI)
 696     return false;
 697
 698   SmallVector<int, 32> Mask(SI->getType()->getVectorNumElements(), -1);
 699
 700   // Build a mask of 0, 2, ... (left) or 1, 3, ... (right) depending on whether
 701   // we look at the left or right side.
 702   for (unsigned i = 0, e = (1 << Level), val = !IsLeft; i != e; ++i, val += 2)
 703     Mask[i] = val;
 704
 705   SmallVector<int, 16> ActualMask = SI->getShuffleMask();
 706   return Mask == ActualMask;
 707 }
 708
 709 namespace {
 710 /// Kind of the reduction data.
 711 enum ReductionKind {
 712   RK_None,           /// Not a reduction.
 713   RK_Arithmetic,     /// Binary reduction data.
 714   RK_MinMax,         /// Min/max reduction data.
 715   RK_UnsignedMinMax, /// Unsigned min/max reduction data.
 716 };
 717 /// Contains opcode + LHS/RHS parts of the reduction operations.
 718 struct ReductionData {
 719   ReductionData() = delete;
 720   ReductionData(ReductionKind Kind, unsigned Opcode, Value *LHS, Value *RHS)
 721       : Opcode(Opcode), LHS(LHS), RHS(RHS), Kind(Kind) {
 722     assert(Kind != RK_None && "expected binary or min/max reduction only.");
 723   }
 724   unsigned Opcode = 0;
 725   Value *LHS = nullptr;
 726   Value *RHS = nullptr;
 727   ReductionKind Kind = RK_None;
 728   bool hasSameData(ReductionData &RD) const {
 729     return Kind == RD.Kind && Opcode == RD.Opcode;
 730   }
 731 };
 732 } // namespace
 733
 734 static Optional<ReductionData> getReductionData(Instruction *I) {
 735   Value *L, *R;
 736   if (m_BinOp(m_Value(L), m_Value(R)).match(I))
 737     return ReductionData(RK_Arithmetic, I->getOpcode(), L, R);
 738   if (auto *SI = dyn_cast<SelectInst>(I)) {
 739     if (m_SMin(m_Value(L), m_Value(R)).match(SI) ||
 740         m_SMax(m_Value(L), m_Value(R)).match(SI) ||
 741         m_OrdFMin(m_Value(L), m_Value(R)).match(SI) ||
 742         m_OrdFMax(m_Value(L), m_Value(R)).match(SI) ||
 743         m_UnordFMin(m_Value(L), m_Value(R)).match(SI) ||
 744         m_UnordFMax(m_Value(L), m_Value(R)).match(SI)) {
 745       auto *CI = cast<CmpInst>(SI->getCondition());
 746       return ReductionData(RK_MinMax, CI->getOpcode(), L, R);
 747     }
 748     if (m_UMin(m_Value(L), m_Value(R)).match(SI) ||
 749         m_UMax(m_Value(L), m_Value(R)).match(SI)) {
 750       auto *CI = cast<CmpInst>(SI->getCondition());
 751       return ReductionData(RK_UnsignedMinMax, CI->getOpcode(), L, R);
 752     }
 753   }
 754   return llvm::None;
 755 }
 756
 757 static ReductionKind matchPairwiseReductionAtLevel(Instruction *I,
 758                                                    unsigned Level,
 759                                                    unsigned NumLevels) {
 760   // Match one level of pairwise operations.
 761   // %rdx.shuf.0.0 = shufflevector <4 x float> %rdx, <4 x float> undef,
 762   //       <4 x i32> <i32 0, i32 2 , i32 undef, i32 undef>
 763   // %rdx.shuf.0.1 = shufflevector <4 x float> %rdx, <4 x float> undef,
 764   //       <4 x i32> <i32 1, i32 3, i32 undef, i32 undef>
 765   // %bin.rdx.0 = fadd <4 x float> %rdx.shuf.0.0, %rdx.shuf.0.1
 766   if (!I)
 767     return RK_None;
 768
 769   assert(I->getType()->isVectorTy() && "Expecting a vector type");
 770
 771   Optional<ReductionData> RD = getReductionData(I);
 772   if (!RD)
 773     return RK_None;
 774
 775   ShuffleVectorInst *LS = dyn_cast<ShuffleVectorInst>(RD->LHS);
 776   if (!LS && Level)
 777     return RK_None;
 778   ShuffleVectorInst *RS = dyn_cast<ShuffleVectorInst>(RD->RHS);
 779   if (!RS && Level)
 780     return RK_None;
 781
 782   // On level 0 we can omit one shufflevector instruction.
 783   if (!Level && !RS && !LS)
 784     return RK_None;
 785
 786   // Shuffle inputs must match.
 787   Value *NextLevelOpL = LS ? LS->getOperand(0) : nullptr;
 788   Value *NextLevelOpR = RS ? RS->getOperand(0) : nullptr;
 789   Value *NextLevelOp = nullptr;
 790   if (NextLevelOpR && NextLevelOpL) {
 791     // If we have two shuffles their operands must match.
 792     if (NextLevelOpL != NextLevelOpR)
 793       return RK_None;
 794
 795     NextLevelOp = NextLevelOpL;
 796   } else if (Level == 0 && (NextLevelOpR || NextLevelOpL)) {
 797     // On the first level we can omit the shufflevector <0, undef,...>. So the
 798     // input to the other shufflevector <1, undef> must match with one of the
 799     // inputs to the current binary operation.
 800     // Example:
 801     //  %NextLevelOpL = shufflevector %R, <1, undef ...>
 802     //  %BinOp        = fadd          %NextLevelOpL, %R
 803     if (NextLevelOpL && NextLevelOpL != RD->RHS)
 804       return RK_None;
 805     else if (NextLevelOpR && NextLevelOpR != RD->LHS)
 806       return RK_None;
 807
 808     NextLevelOp = NextLevelOpL ? RD->RHS : RD->LHS;
 809   } else
 810     return RK_None;
 811
 812   // Check that the next levels binary operation exists and matches with the
 813   // current one.
 814   if (Level + 1 != NumLevels) {
 815     Optional<ReductionData> NextLevelRD =
 816         getReductionData(cast<Instruction>(NextLevelOp));
 817     if (!NextLevelRD || !RD->hasSameData(*NextLevelRD))
 818       return RK_None;
 819   }
 820
 821   // Shuffle mask for pairwise operation must match.
 822   if (matchPairwiseShuffleMask(LS, /*IsLeft=*/true, Level)) {
 823     if (!matchPairwiseShuffleMask(RS, /*IsLeft=*/false, Level))
 824       return RK_None;
 825   } else if (matchPairwiseShuffleMask(RS, /*IsLeft=*/true, Level)) {
 826     if (!matchPairwiseShuffleMask(LS, /*IsLeft=*/false, Level))
 827       return RK_None;
 828   } else {
 829     return RK_None;
 830   }
 831
 832   if (++Level == NumLevels)
 833     return RD->Kind;
 834
 835   // Match next level.
 836   return matchPairwiseReductionAtLevel(cast<Instruction>(NextLevelOp), Level,
 837                                        NumLevels);
 838 }
 839
 840 static ReductionKind matchPairwiseReduction(const ExtractElementInst *ReduxRoot,
 841                                             unsigned &Opcode, Type *&Ty) {
 842   if (!EnableReduxCost)
 843     return RK_None;
 844
 845   // Need to extract the first element.
 846   ConstantInt *CI = dyn_cast<ConstantInt>(ReduxRoot->getOperand(1));
 847   unsigned Idx = ~0u;
 848   if (CI)
 849     Idx = CI->getZExtValue();
 850   if (Idx != 0)
 851     return RK_None;
 852
 853   auto *RdxStart = dyn_cast<Instruction>(ReduxRoot->getOperand(0));
 854   if (!RdxStart)
 855     return RK_None;
 856   Optional<ReductionData> RD = getReductionData(RdxStart);
 857   if (!RD)
 858     return RK_None;
 859
 860   Type *VecTy = RdxStart->getType();
 861   unsigned NumVecElems = VecTy->getVectorNumElements();
 862   if (!isPowerOf2_32(NumVecElems))
 863     return RK_None;
 864
 865   // We look for a sequence of shuffle,shuffle,add triples like the following
 866   // that builds a pairwise reduction tree.
 867   //
 868   //  (X0, X1, X2, X3)
 869   //   (X0 + X1, X2 + X3, undef, undef)
 870   //    ((X0 + X1) + (X2 + X3), undef, undef, undef)
 871   //
 872   // %rdx.shuf.0.0 = shufflevector <4 x float> %rdx, <4 x float> undef,
 873   //       <4 x i32> <i32 0, i32 2 , i32 undef, i32 undef>
 874   // %rdx.shuf.0.1 = shufflevector <4 x float> %rdx, <4 x float> undef,
 875   //       <4 x i32> <i32 1, i32 3, i32 undef, i32 undef>
 876   // %bin.rdx.0 = fadd <4 x float> %rdx.shuf.0.0, %rdx.shuf.0.1
 877   // %rdx.shuf.1.0 = shufflevector <4 x float> %bin.rdx.0, <4 x float> undef,
 878   //       <4 x i32> <i32 0, i32 undef, i32 undef, i32 undef>
 879   // %rdx.shuf.1.1 = shufflevector <4 x float> %bin.rdx.0, <4 x float> undef,
 880   //       <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
 881   // %bin.rdx8 = fadd <4 x float> %rdx.shuf.1.0, %rdx.shuf.1.1
 882   // %r = extractelement <4 x float> %bin.rdx8, i32 0
 883   if (matchPairwiseReductionAtLevel(RdxStart, 0, Log2_32(NumVecElems)) ==
 884       RK_None)
 885     return RK_None;
 886
 887   Opcode = RD->Opcode;
 888   Ty = VecTy;
 889
 890   return RD->Kind;
 891 }
 892
 893 static std::pair<Value *, ShuffleVectorInst *>
 894 getShuffleAndOtherOprd(Value *L, Value *R) {
 895   ShuffleVectorInst *S = nullptr;
 896
 897   if ((S = dyn_cast<ShuffleVectorInst>(L)))
 898     return std::make_pair(R, S);
 899
 900   S = dyn_cast<ShuffleVectorInst>(R);
 901   return std::make_pair(L, S);
 902 }
 903
 904 static ReductionKind
 905 matchVectorSplittingReduction(const ExtractElementInst *ReduxRoot,
 906                               unsigned &Opcode, Type *&Ty) {
 907   if (!EnableReduxCost)
 908     return RK_None;
 909
 910   // Need to extract the first element.
 911   ConstantInt *CI = dyn_cast<ConstantInt>(ReduxRoot->getOperand(1));
 912   unsigned Idx = ~0u;
 913   if (CI)
 914     Idx = CI->getZExtValue();
 915   if (Idx != 0)
 916     return RK_None;
 917
 918   auto *RdxStart = dyn_cast<Instruction>(ReduxRoot->getOperand(0));
 919   if (!RdxStart)
 920     return RK_None;
 921   Optional<ReductionData> RD = getReductionData(RdxStart);
 922   if (!RD)
 923     return RK_None;
 924
 925   Type *VecTy = ReduxRoot->getOperand(0)->getType();
 926   unsigned NumVecElems = VecTy->getVectorNumElements();
 927   if (!isPowerOf2_32(NumVecElems))
 928     return RK_None;
 929
 930   // We look for a sequence of shuffles and adds like the following matching one
 931   // fadd, shuffle vector pair at a time.
 932   //
 933   // %rdx.shuf = shufflevector <4 x float> %rdx, <4 x float> undef,
 934   //                           <4 x i32> <i32 2, i32 3, i32 undef, i32 undef>
 935   // %bin.rdx = fadd <4 x float> %rdx, %rdx.shuf
 936   // %rdx.shuf7 = shufflevector <4 x float> %bin.rdx, <4 x float> undef,
 937   //                          <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
 938   // %bin.rdx8 = fadd <4 x float> %bin.rdx, %rdx.shuf7
 939   // %r = extractelement <4 x float> %bin.rdx8, i32 0
 940
 941   unsigned MaskStart = 1;
 942   Instruction *RdxOp = RdxStart;
 943   SmallVector<int, 32> ShuffleMask(NumVecElems, 0);
 944   unsigned NumVecElemsRemain = NumVecElems;
 945   while (NumVecElemsRemain - 1) {
 946     // Check for the right reduction operation.
 947     if (!RdxOp)
 948       return RK_None;
 949     Optional<ReductionData> RDLevel = getReductionData(RdxOp);
 950     if (!RDLevel || !RDLevel->hasSameData(*RD))
 951       return RK_None;
 952
 953     Value *NextRdxOp;
 954     ShuffleVectorInst *Shuffle;
 955     std::tie(NextRdxOp, Shuffle) =
 956         getShuffleAndOtherOprd(RDLevel->LHS, RDLevel->RHS);
 957
 958     // Check the current reduction operation and the shuffle use the same value.
 959     if (Shuffle == nullptr)
 960       return RK_None;
 961     if (Shuffle->getOperand(0) != NextRdxOp)
 962       return RK_None;
 963
 964     // Check that shuffle masks matches.
 965     for (unsigned j = 0; j != MaskStart; ++j)
 966       ShuffleMask[j] = MaskStart + j;
 967     // Fill the rest of the mask with -1 for undef.
 968     std::fill(&ShuffleMask[MaskStart], ShuffleMask.end(), -1);
 969
 970     SmallVector<int, 16> Mask = Shuffle->getShuffleMask();
 971     if (ShuffleMask != Mask)
 972       return RK_None;
 973
 974     RdxOp = dyn_cast<Instruction>(NextRdxOp);
 975     NumVecElemsRemain /= 2;
 976     MaskStart *= 2;
 977   }
 978
 979   Opcode = RD->Opcode;
 980   Ty = VecTy;
 981   return RD->Kind;
 982 }
 983
 984 int TargetTransformInfo::getInstructionThroughput(const Instruction *I) const {
 985   switch (I->getOpcode()) {
 986   case Instruction::GetElementPtr:
 987     return getUserCost(I);
 988
 989   case Instruction::Ret:
 990   case Instruction::PHI:
 991   case Instruction::Br: {
 992     return getCFInstrCost(I->getOpcode());
 993   }
 994   case Instruction::Add:
 995   case Instruction::FAdd:
 996   case Instruction::Sub:
 997   case Instruction::FSub:
 998   case Instruction::Mul:
 999   case Instruction::FMul:
1000   case Instruction::UDiv:
1001   case Instruction::SDiv:
1002   case Instruction::FDiv:
1003   case Instruction::URem:
1004   case Instruction::SRem:
1005   case Instruction::FRem:
1006   case Instruction::Shl:
1007   case Instruction::LShr:
1008   case Instruction::AShr:
1009   case Instruction::And:
1010   case Instruction::Or:
1011   case Instruction::Xor: {
1012     TargetTransformInfo::OperandValueKind Op1VK, Op2VK;
1013     TargetTransformInfo::OperandValueProperties Op1VP, Op2VP;
1014     Op1VK = getOperandInfo(I->getOperand(0), Op1VP);
1015     Op2VK = getOperandInfo(I->getOperand(1), Op2VP);
1016     SmallVector<const Value *, 2> Operands(I->operand_values());
1017     return getArithmeticInstrCost(I->getOpcode(), I->getType(), Op1VK, Op2VK,
1018                                   Op1VP, Op2VP, Operands);
1019   }
1020   case Instruction::Select: {
1021     const SelectInst *SI = cast<SelectInst>(I);
1022     Type *CondTy = SI->getCondition()->getType();
1023     return getCmpSelInstrCost(I->getOpcode(), I->getType(), CondTy, I);
1024   }
1025   case Instruction::ICmp:
1026   case Instruction::FCmp: {
1027     Type *ValTy = I->getOperand(0)->getType();
1028     return getCmpSelInstrCost(I->getOpcode(), ValTy, I->getType(), I);
1029   }
1030   case Instruction::Store: {
1031     const StoreInst *SI = cast<StoreInst>(I);
1032     Type *ValTy = SI->getValueOperand()->getType();
1033     return getMemoryOpCost(I->getOpcode(), ValTy,
1034                                 SI->getAlignment(),
1035                                 SI->getPointerAddressSpace(), I);
1036   }
1037   case Instruction::Load: {
1038     const LoadInst *LI = cast<LoadInst>(I);
1039     return getMemoryOpCost(I->getOpcode(), I->getType(),
1040                                 LI->getAlignment(),
1041                                 LI->getPointerAddressSpace(), I);
1042   }
1043   case Instruction::ZExt:
1044   case Instruction::SExt:
1045   case Instruction::FPToUI:
1046   case Instruction::FPToSI:
1047   case Instruction::FPExt:
1048   case Instruction::PtrToInt:
1049   case Instruction::IntToPtr:
1050   case Instruction::SIToFP:
1051   case Instruction::UIToFP:
1052   case Instruction::Trunc:
1053   case Instruction::FPTrunc:
1054   case Instruction::BitCast:
1055   case Instruction::AddrSpaceCast: {
1056     Type *SrcTy = I->getOperand(0)->getType();
1057     return getCastInstrCost(I->getOpcode(), I->getType(), SrcTy, I);
1058   }
1059   case Instruction::ExtractElement: {
1060     const ExtractElementInst * EEI = cast<ExtractElementInst>(I);
1061     ConstantInt *CI = dyn_cast<ConstantInt>(I->getOperand(1));
1062     unsigned Idx = -1;
1063     if (CI)
1064       Idx = CI->getZExtValue();
1065
1066     // Try to match a reduction sequence (series of shufflevector and vector
1067     // adds followed by a extractelement).
1068     unsigned ReduxOpCode;
1069     Type *ReduxType;
1070
1071     switch (matchVectorSplittingReduction(EEI, ReduxOpCode, ReduxType)) {
1072     case RK_Arithmetic:
1073       return getArithmeticReductionCost(ReduxOpCode, ReduxType,
1074                                              /*IsPairwiseForm=*/false);
1075     case RK_MinMax:
1076       return getMinMaxReductionCost(
1077           ReduxType, CmpInst::makeCmpResultType(ReduxType),
1078           /*IsPairwiseForm=*/false, /*IsUnsigned=*/false);
1079     case RK_UnsignedMinMax:
1080       return getMinMaxReductionCost(
1081           ReduxType, CmpInst::makeCmpResultType(ReduxType),
1082           /*IsPairwiseForm=*/false, /*IsUnsigned=*/true);
1083     case RK_None:
1084       break;
1085     }
1086
1087     switch (matchPairwiseReduction(EEI, ReduxOpCode, ReduxType)) {
1088     case RK_Arithmetic:
1089       return getArithmeticReductionCost(ReduxOpCode, ReduxType,
1090                                              /*IsPairwiseForm=*/true);
1091     case RK_MinMax:
1092       return getMinMaxReductionCost(
1093           ReduxType, CmpInst::makeCmpResultType(ReduxType),
1094           /*IsPairwiseForm=*/true, /*IsUnsigned=*/false);
1095     case RK_UnsignedMinMax:
1096       return getMinMaxReductionCost(
1097           ReduxType, CmpInst::makeCmpResultType(ReduxType),
1098           /*IsPairwiseForm=*/true, /*IsUnsigned=*/true);
1099     case RK_None:
1100       break;
1101     }
1102
1103     return getVectorInstrCost(I->getOpcode(),
1104                                    EEI->getOperand(0)->getType(), Idx);
1105   }
1106   case Instruction::InsertElement: {
1107     const InsertElementInst * IE = cast<InsertElementInst>(I);
1108     ConstantInt *CI = dyn_cast<ConstantInt>(IE->getOperand(2));
1109     unsigned Idx = -1;
1110     if (CI)
1111       Idx = CI->getZExtValue();
1112     return getVectorInstrCost(I->getOpcode(),
1113                                    IE->getType(), Idx);
1114   }
1115   case Instruction::ShuffleVector: {
1116     const ShuffleVectorInst *Shuffle = cast<ShuffleVectorInst>(I);
1117     Type *Ty = Shuffle->getType();
1118     Type *SrcTy = Shuffle->getOperand(0)->getType();
1119
1120     // TODO: Identify and add costs for insert subvector, etc.
1121     int SubIndex;
1122     if (Shuffle->isExtractSubvectorMask(SubIndex))
1123       return TTIImpl->getShuffleCost(SK_ExtractSubvector, SrcTy, SubIndex, Ty);
1124
1125     if (Shuffle->changesLength())
1126       return -1;
1127
1128     if (Shuffle->isIdentity())
1129       return 0;
1130
1131     if (Shuffle->isReverse())
1132       return TTIImpl->getShuffleCost(SK_Reverse, Ty, 0, nullptr);
1133
1134     if (Shuffle->isSelect())
1135       return TTIImpl->getShuffleCost(SK_Select, Ty, 0, nullptr);
1136
1137     if (Shuffle->isTranspose())
1138       return TTIImpl->getShuffleCost(SK_Transpose, Ty, 0, nullptr);
1139
1140     if (Shuffle->isZeroEltSplat())
1141       return TTIImpl->getShuffleCost(SK_Broadcast, Ty, 0, nullptr);
1142
1143     if (Shuffle->isSingleSource())
1144       return TTIImpl->getShuffleCost(SK_PermuteSingleSrc, Ty, 0, nullptr);
1145
1146     return TTIImpl->getShuffleCost(SK_PermuteTwoSrc, Ty, 0, nullptr);
1147   }
1148   case Instruction::Call:
1149     if (const IntrinsicInst *II = dyn_cast<IntrinsicInst>(I)) {
1150       SmallVector<Value *, 4> Args(II->arg_operands());
1151
1152       FastMathFlags FMF;
1153       if (auto *FPMO = dyn_cast<FPMathOperator>(II))
1154         FMF = FPMO->getFastMathFlags();
1155
1156       return getIntrinsicInstrCost(II->getIntrinsicID(), II->getType(),
1157                                         Args, FMF);
1158     }
1159     return -1;
1160   default:
1161     // We don't have any information on this instruction.
1162     return -1;
1163   }
1164 }
1165
1166 TargetTransformInfo::Concept::~Concept() {}
1167
1168 TargetIRAnalysis::TargetIRAnalysis() : TTICallback(&getDefaultTTI) {}
1169
1170 TargetIRAnalysis::TargetIRAnalysis(
1171     std::function<Result(const Function &)> TTICallback)
1172     : TTICallback(std::move(TTICallback)) {}
1173
1174 TargetIRAnalysis::Result TargetIRAnalysis::run(const Function &F,
1175                                                FunctionAnalysisManager &) {
1176   return TTICallback(F);
1177 }
1178
1179 AnalysisKey TargetIRAnalysis::Key;
1180
1181 TargetIRAnalysis::Result TargetIRAnalysis::getDefaultTTI(const Function &F) {
1182   return Result(F.getParent()->getDataLayout());
1183 }
1184
1185 // Register the basic pass.
1186 INITIALIZE_PASS(TargetTransformInfoWrapperPass, "tti",
1187                 "Target Transform Information", false, true)
1188 char TargetTransformInfoWrapperPass::ID = 0;
1189
1190 void TargetTransformInfoWrapperPass::anchor() {}
1191
1192 TargetTransformInfoWrapperPass::TargetTransformInfoWrapperPass()
1193     : ImmutablePass(ID) {
1194   initializeTargetTransformInfoWrapperPassPass(
1195       *PassRegistry::getPassRegistry());
1196 }
1197
1198 TargetTransformInfoWrapperPass::TargetTransformInfoWrapperPass(
1199     TargetIRAnalysis TIRA)
1200     : ImmutablePass(ID), TIRA(std::move(TIRA)) {
1201   initializeTargetTransformInfoWrapperPassPass(
1202       *PassRegistry::getPassRegistry());
1203 }
1204
1205 TargetTransformInfo &TargetTransformInfoWrapperPass::getTTI(const Function &F) {
1206   FunctionAnalysisManager DummyFAM;
1207   TTI = TIRA.run(F, DummyFAM);
1208   return *TTI;
1209 }
1210
1211 ImmutablePass *
1212 llvm::createTargetTransformInfoWrapperPass(TargetIRAnalysis TIRA) {
1213   return new TargetTransformInfoWrapperPass(std::move(TIRA));
1214 }