1 # RUN: llc %s -run-pass x86-avoid-SFB -mtriple=x86_64-unknown-linux-gnu -o - | FileCheck %s
3 # This was generated from:
5 # using alpha = float __attribute__((ext_vector_type(4)));
7 # void bravo(alpha * __restrict__ p1, alpha * __restrict__ p2) {
8 # char *p3 = (char *)p1;
16 # Using the command line:
17 # clang -g -c 1.cpp -O2 -S -emit-llvm -fno-strict-aliasing --target=x86_64-unknown-unknown -o test.ll
18 # llc -stop-before=x86-avoid-SFB test.ll -o before.mir
20 # The IR has been modified to include a number of debug/meta instructions between the initial store and load.
21 # If the code treats debug/meta instructions as normal instructions, the separation between the store and load
22 # will be too great to enable the optimization.
25 ; ModuleID = 'test.ll'
26 source_filename = "1.cpp"
27 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
28 target triple = "x86_64-unknown-unknown"
30 ; Function Attrs: norecurse nounwind uwtable
31 define dso_local void @debug(<4 x float>* noalias %p1, <4 x float>* noalias nocapture %p2) local_unnamed_addr #0 !dbg !10 {
33 call void @llvm.dbg.value(metadata <4 x float>* %p1, metadata !21, metadata !DIExpression()), !dbg !27
34 call void @llvm.dbg.value(metadata <4 x float>* %p2, metadata !22, metadata !DIExpression()), !dbg !27
35 call void @llvm.dbg.value(metadata <4 x float>* %p1, metadata !23, metadata !DIExpression()), !dbg !27
36 %tobool = icmp eq <4 x float>* %p1, null, !dbg !28
37 %0 = bitcast <4 x float>* %p1 to i8*, !dbg !29
38 call void @llvm.dbg.value(metadata i8* %0, metadata !23, metadata !DIExpression()), !dbg !27
39 store i8 0, i8* %0, align 1, !dbg !30
40 call void @llvm.dbg.value(metadata i8* %0, metadata !23, metadata !DIExpression()), !dbg !27
41 call void @llvm.dbg.value(metadata i8* %0, metadata !23, metadata !DIExpression()), !dbg !27
42 call void @llvm.dbg.value(metadata i8* %0, metadata !23, metadata !DIExpression()), !dbg !27
43 call void @llvm.dbg.value(metadata i8* %0, metadata !23, metadata !DIExpression()), !dbg !27
44 call void @llvm.dbg.value(metadata i8* %0, metadata !23, metadata !DIExpression()), !dbg !27
45 call void @llvm.dbg.value(metadata i8* %0, metadata !23, metadata !DIExpression()), !dbg !27
46 call void @llvm.dbg.value(metadata i8* %0, metadata !23, metadata !DIExpression()), !dbg !27
47 call void @llvm.dbg.value(metadata i8* %0, metadata !23, metadata !DIExpression()), !dbg !27
48 call void @llvm.dbg.value(metadata i8* %0, metadata !23, metadata !DIExpression()), !dbg !27
49 call void @llvm.dbg.value(metadata i8* %0, metadata !23, metadata !DIExpression()), !dbg !27
50 call void @llvm.dbg.value(metadata i8* %0, metadata !23, metadata !DIExpression()), !dbg !27
51 call void @llvm.dbg.value(metadata i8* %0, metadata !23, metadata !DIExpression()), !dbg !27
52 call void @llvm.dbg.value(metadata i8* %0, metadata !23, metadata !DIExpression()), !dbg !27
53 call void @llvm.dbg.value(metadata i8* %0, metadata !23, metadata !DIExpression()), !dbg !27
54 call void @llvm.dbg.value(metadata i8* %0, metadata !23, metadata !DIExpression()), !dbg !27
55 call void @llvm.dbg.value(metadata i8* %0, metadata !23, metadata !DIExpression()), !dbg !27
56 call void @llvm.dbg.value(metadata i8* %0, metadata !23, metadata !DIExpression()), !dbg !27
57 call void @llvm.dbg.value(metadata i8* %0, metadata !23, metadata !DIExpression()), !dbg !27
58 br i1 %tobool, label %if.end, label %if.then, !dbg !31
60 if.then: ; preds = %entry
61 %1 = load <4 x float>, <4 x float>* %p1, align 16, !dbg !32
62 call void @llvm.dbg.value(metadata <4 x float> %1, metadata !24, metadata !DIExpression()), !dbg !33
63 store <4 x float> %1, <4 x float>* %p2, align 16, !dbg !34
64 br label %if.end, !dbg !35
66 if.end: ; preds = %if.then, %entry
70 ; Function Attrs: nounwind readnone speculatable
71 declare void @llvm.dbg.value(metadata, metadata, metadata) #1
73 ; Function Attrs: nounwind
74 declare void @llvm.stackprotector(i8*, i8**) #2
76 attributes #0 = { norecurse nounwind uwtable "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" }
77 attributes #1 = { nounwind readnone speculatable }
78 attributes #2 = { nounwind }
81 !llvm.module.flags = !{!6, !7, !8}
84 !0 = distinct !DICompileUnit(language: DW_LANG_C_plus_plus, file: !1, producer: "clang version 9.0.0 (https://github.com/llvm/llvm-project.git 1a0312ca0b20d16edb859065bbace75f6701c92e)", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: !2, retainedTypes: !3, nameTableKind: None)
85 !1 = !DIFile(filename: "1.cpp", directory: "/mnt/c/Users/gbdawsoc/Documents/llvm/bg40969")
88 !4 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !5, size: 64)
89 !5 = !DIBasicType(name: "char", size: 8, encoding: DW_ATE_signed_char)
90 !6 = !{i32 2, !"Dwarf Version", i32 4}
91 !7 = !{i32 2, !"Debug Info Version", i32 3}
92 !8 = !{i32 1, !"wchar_size", i32 4}
93 !9 = !{!"clang version 9.0.0 (https://github.com/llvm/llvm-project.git 1a0312ca0b20d16edb859065bbace75f6701c92e)"}
94 !10 = distinct !DISubprogram(name: "bravo", linkageName: "debug", scope: !1, file: !1, line: 4, type: !11, scopeLine: 4, flags: DIFlagPrototyped, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !0, retainedNodes: !20)
95 !11 = !DISubroutineType(types: !12)
96 !12 = !{null, !13, !13}
97 !13 = !DIDerivedType(tag: DW_TAG_restrict_type, baseType: !14)
98 !14 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !15, size: 64)
99 !15 = !DIDerivedType(tag: DW_TAG_typedef, name: "alpha", file: !1, line: 2, baseType: !16)
100 !16 = !DICompositeType(tag: DW_TAG_array_type, baseType: !17, size: 128, flags: DIFlagVector, elements: !18)
101 !17 = !DIBasicType(name: "float", size: 32, encoding: DW_ATE_float)
103 !19 = !DISubrange(count: 4)
104 !20 = !{!21, !22, !23, !24}
105 !21 = !DILocalVariable(name: "p1", arg: 1, scope: !10, file: !1, line: 4, type: !13)
106 !22 = !DILocalVariable(name: "p2", arg: 2, scope: !10, file: !1, line: 4, type: !13)
107 !23 = !DILocalVariable(name: "p3", scope: !10, file: !1, line: 5, type: !4)
108 !24 = !DILocalVariable(name: "t", scope: !25, file: !1, line: 8, type: !15)
109 !25 = distinct !DILexicalBlock(scope: !26, file: !1, line: 6, column: 11)
110 !26 = distinct !DILexicalBlock(scope: !10, file: !1, line: 6, column: 7)
111 !27 = !DILocation(line: 0, scope: !10)
112 !28 = !DILocation(line: 6, column: 7, scope: !26)
113 !29 = !DILocation(line: 5, column: 14, scope: !10)
114 !30 = !DILocation(line: 7, column: 9, scope: !25)
115 !31 = !DILocation(line: 6, column: 7, scope: !10)
116 !32 = !DILocation(line: 8, column: 15, scope: !25)
117 !33 = !DILocation(line: 0, scope: !25)
118 !34 = !DILocation(line: 9, column: 9, scope: !25)
119 !35 = !DILocation(line: 10, column: 3, scope: !25)
120 !36 = !DILocation(line: 11, column: 1, scope: !10)
126 exposesReturnsTwice: false
128 regBankSelected: false
131 tracksRegLiveness: true
134 - { id: 0, class: gr64, preferred-register: '' }
135 - { id: 1, class: gr64, preferred-register: '' }
136 - { id: 2, class: vr128, preferred-register: '' }
138 - { reg: '$rdi', virtual-reg: '%0' }
139 - { reg: '$rsi', virtual-reg: '%1' }
141 isFrameAddressTaken: false
142 isReturnAddressTaken: false
151 maxCallFrameSize: 4294967295
152 cvBytesOfCalleeSavedRegisters: 0
153 hasOpaqueSPAdjustment: false
155 hasMustTailInVarArgFunc: false
162 machineFunctionInfo: {}
165 successors: %bb.2(0x30000000), %bb.1(0x50000000)
168 DBG_VALUE $rdi, $noreg, !21, !DIExpression(), debug-location !27
169 DBG_VALUE $rsi, $noreg, !22, !DIExpression(), debug-location !27
170 DBG_VALUE $rdi, $noreg, !23, !DIExpression(), debug-location !27
172 DBG_VALUE %1, $noreg, !22, !DIExpression(), debug-location !27
174 DBG_VALUE %0, $noreg, !21, !DIExpression(), debug-location !27
175 DBG_VALUE %0, $noreg, !23, !DIExpression(), debug-location !27
176 TEST64rr %0, %0, implicit-def $eflags, debug-location !28
177 DBG_VALUE %0, $noreg, !23, !DIExpression(), debug-location !27
178 MOV8mi %0, 1, $noreg, 0, $noreg, 0, debug-location !30 :: (store 1 into %ir.0)
179 CFI_INSTRUCTION offset $r13, -123
180 DBG_VALUE %0, $noreg, !21, !DIExpression(), debug-location !27
181 DBG_VALUE %0, $noreg, !23, !DIExpression(), debug-location !27
182 DBG_VALUE %0, $noreg, !21, !DIExpression(), debug-location !27
183 DBG_VALUE %0, $noreg, !23, !DIExpression(), debug-location !27
184 DBG_VALUE %0, $noreg, !21, !DIExpression(), debug-location !27
185 DBG_VALUE %0, $noreg, !23, !DIExpression(), debug-location !27
186 DBG_VALUE %0, $noreg, !21, !DIExpression(), debug-location !27
187 DBG_VALUE %0, $noreg, !23, !DIExpression(), debug-location !27
188 DBG_VALUE %0, $noreg, !21, !DIExpression(), debug-location !27
189 DBG_VALUE %0, $noreg, !23, !DIExpression(), debug-location !27
190 DBG_VALUE %0, $noreg, !21, !DIExpression(), debug-location !27
191 DBG_VALUE %0, $noreg, !23, !DIExpression(), debug-location !27
192 DBG_VALUE %0, $noreg, !21, !DIExpression(), debug-location !27
193 DBG_VALUE %0, $noreg, !23, !DIExpression(), debug-location !27
194 DBG_VALUE %0, $noreg, !21, !DIExpression(), debug-location !27
195 DBG_VALUE %0, $noreg, !23, !DIExpression(), debug-location !27
196 DBG_VALUE %0, $noreg, !21, !DIExpression(), debug-location !27
197 DBG_VALUE %0, $noreg, !23, !DIExpression(), debug-location !27
198 JCC_1 %bb.2, 4, implicit $eflags, debug-location !31
199 JMP_1 %bb.1, debug-location !31
202 successors: %bb.2(0x80000000)
204 %2:vr128 = MOVAPSrm %0, 1, $noreg, 0, $noreg, debug-location !32 :: (load 16 from %ir.p1)
205 DBG_VALUE %2, $noreg, !24, !DIExpression(), debug-location !33
206 MOVAPSmr %1, 1, $noreg, 0, $noreg, killed %2, debug-location !34 :: (store 16 into %ir.p2)
209 RET 0, debug-location !36
211 ; CHECK-LABEL: name: debug
212 ; CHECK: %3:gr8 = MOV8rm
214 ; CHECK: %4:gr64 = MOV64rm
216 ; CHECK: %5:gr32 = MOV32rm
218 ; CHECK: %6:gr16 = MOV16rm
220 ; CHECK: %7:gr8 = MOV8rm