| blob | 570f59673d1ce95c4668c84df89a9f2b2baf9483 |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX1
3 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX2
4 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vpopcntdq | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX512VPOPCNTDQ
5 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vpopcntdq,+avx512vl | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX512VPOPCNTDQVL
6 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bitalg | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=BITALG_NOVLX
7 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bitalg,+avx512vl | FileCheck %s --check-prefix=ALL --check-prefix=BITALG
9 define <4 x i64> @testv4i64(<4 x i64> %in) nounwind {
10 ; AVX1-LABEL: testv4i64:
11 ; AVX1: # %bb.0:
12 ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
13 ; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
14 ; AVX1-NEXT: vpand %xmm2, %xmm1, %xmm3
15 ; AVX1-NEXT: vmovdqa {{.*#+}} xmm4 = [0,1,1,2,1,2,2,3,1,2,2,3,2,3,3,4]
16 ; AVX1-NEXT: vpshufb %xmm3, %xmm4, %xmm3
17 ; AVX1-NEXT: vpsrlw $4, %xmm1, %xmm1
18 ; AVX1-NEXT: vpand %xmm2, %xmm1, %xmm1
19 ; AVX1-NEXT: vpshufb %xmm1, %xmm4, %xmm1
20 ; AVX1-NEXT: vpaddb %xmm3, %xmm1, %xmm1
21 ; AVX1-NEXT: vpxor %xmm3, %xmm3, %xmm3
22 ; AVX1-NEXT: vpsadbw %xmm3, %xmm1, %xmm1
23 ; AVX1-NEXT: vpand %xmm2, %xmm0, %xmm5
24 ; AVX1-NEXT: vpshufb %xmm5, %xmm4, %xmm5
25 ; AVX1-NEXT: vpsrlw $4, %xmm0, %xmm0
26 ; AVX1-NEXT: vpand %xmm2, %xmm0, %xmm0
27 ; AVX1-NEXT: vpshufb %xmm0, %xmm4, %xmm0
28 ; AVX1-NEXT: vpaddb %xmm5, %xmm0, %xmm0
29 ; AVX1-NEXT: vpsadbw %xmm3, %xmm0, %xmm0
30 ; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
31 ; AVX1-NEXT: retq
32 ;
33 ; AVX2-LABEL: testv4i64:
34 ; AVX2: # %bb.0:
35 ; AVX2-NEXT: vmovdqa {{.*#+}} ymm1 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
36 ; AVX2-NEXT: vpand %ymm1, %ymm0, %ymm2
37 ; AVX2-NEXT: vmovdqa {{.*#+}} ymm3 = [0,1,1,2,1,2,2,3,1,2,2,3,2,3,3,4,0,1,1,2,1,2,2,3,1,2,2,3,2,3,3,4]
38 ; AVX2-NEXT: vpshufb %ymm2, %ymm3, %ymm2
39 ; AVX2-NEXT: vpsrlw $4, %ymm0, %ymm0
40 ; AVX2-NEXT: vpand %ymm1, %ymm0, %ymm0
41 ; AVX2-NEXT: vpshufb %ymm0, %ymm3, %ymm0
42 ; AVX2-NEXT: vpaddb %ymm2, %ymm0, %ymm0
43 ; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
44 ; AVX2-NEXT: vpsadbw %ymm1, %ymm0, %ymm0
45 ; AVX2-NEXT: retq
46 ;
47 ; AVX512VPOPCNTDQ-LABEL: testv4i64:
48 ; AVX512VPOPCNTDQ: # %bb.0:
49 ; AVX512VPOPCNTDQ-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0
50 ; AVX512VPOPCNTDQ-NEXT: vpopcntq %zmm0, %zmm0
51 ; AVX512VPOPCNTDQ-NEXT: # kill: def $ymm0 killed $ymm0 killed $zmm0
52 ; AVX512VPOPCNTDQ-NEXT: retq
53 ;
54 ; AVX512VPOPCNTDQVL-LABEL: testv4i64:
55 ; AVX512VPOPCNTDQVL: # %bb.0:
56 ; AVX512VPOPCNTDQVL-NEXT: vpopcntq %ymm0, %ymm0
57 ; AVX512VPOPCNTDQVL-NEXT: retq
58 ;
59 ; BITALG_NOVLX-LABEL: testv4i64:
60 ; BITALG_NOVLX: # %bb.0:
61 ; BITALG_NOVLX-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0
62 ; BITALG_NOVLX-NEXT: vpopcntb %zmm0, %zmm0
63 ; BITALG_NOVLX-NEXT: vpxor %xmm1, %xmm1, %xmm1
64 ; BITALG_NOVLX-NEXT: vpsadbw %ymm1, %ymm0, %ymm0
65 ; BITALG_NOVLX-NEXT: retq
66 ;
67 ; BITALG-LABEL: testv4i64:
68 ; BITALG: # %bb.0:
69 ; BITALG-NEXT: vpopcntb %ymm0, %ymm0
70 ; BITALG-NEXT: vpxor %xmm1, %xmm1, %xmm1
71 ; BITALG-NEXT: vpsadbw %ymm1, %ymm0, %ymm0
72 ; BITALG-NEXT: retq
73 %out = call <4 x i64> @llvm.ctpop.v4i64(<4 x i64> %in)
74 ret <4 x i64> %out
75 }
77 define <8 x i32> @testv8i32(<8 x i32> %in) nounwind {
78 ; AVX1-LABEL: testv8i32:
79 ; AVX1: # %bb.0:
80 ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
81 ; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
82 ; AVX1-NEXT: vpand %xmm2, %xmm1, %xmm3
83 ; AVX1-NEXT: vmovdqa {{.*#+}} xmm4 = [0,1,1,2,1,2,2,3,1,2,2,3,2,3,3,4]
84 ; AVX1-NEXT: vpshufb %xmm3, %xmm4, %xmm3
85 ; AVX1-NEXT: vpsrlw $4, %xmm1, %xmm1
86 ; AVX1-NEXT: vpand %xmm2, %xmm1, %xmm1
87 ; AVX1-NEXT: vpshufb %xmm1, %xmm4, %xmm1
88 ; AVX1-NEXT: vpaddb %xmm3, %xmm1, %xmm1
89 ; AVX1-NEXT: vpxor %xmm3, %xmm3, %xmm3
90 ; AVX1-NEXT: vpunpckhdq {{.*#+}} xmm5 = xmm1[2],xmm3[2],xmm1[3],xmm3[3]
91 ; AVX1-NEXT: vpsadbw %xmm3, %xmm5, %xmm5
92 ; AVX1-NEXT: vpmovzxdq {{.*#+}} xmm1 = xmm1[0],zero,xmm1[1],zero
93 ; AVX1-NEXT: vpsadbw %xmm3, %xmm1, %xmm1
94 ; AVX1-NEXT: vpackuswb %xmm5, %xmm1, %xmm1
95 ; AVX1-NEXT: vpand %xmm2, %xmm0, %xmm5
96 ; AVX1-NEXT: vpshufb %xmm5, %xmm4, %xmm5
97 ; AVX1-NEXT: vpsrlw $4, %xmm0, %xmm0
98 ; AVX1-NEXT: vpand %xmm2, %xmm0, %xmm0
99 ; AVX1-NEXT: vpshufb %xmm0, %xmm4, %xmm0
100 ; AVX1-NEXT: vpaddb %xmm5, %xmm0, %xmm0
101 ; AVX1-NEXT: vpunpckhdq {{.*#+}} xmm2 = xmm0[2],xmm3[2],xmm0[3],xmm3[3]
102 ; AVX1-NEXT: vpsadbw %xmm3, %xmm2, %xmm2
103 ; AVX1-NEXT: vpmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero
104 ; AVX1-NEXT: vpsadbw %xmm3, %xmm0, %xmm0
105 ; AVX1-NEXT: vpackuswb %xmm2, %xmm0, %xmm0
106 ; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
107 ; AVX1-NEXT: retq
108 ;
109 ; AVX2-LABEL: testv8i32:
110 ; AVX2: # %bb.0:
111 ; AVX2-NEXT: vmovdqa {{.*#+}} ymm1 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
112 ; AVX2-NEXT: vpand %ymm1, %ymm0, %ymm2
113 ; AVX2-NEXT: vmovdqa {{.*#+}} ymm3 = [0,1,1,2,1,2,2,3,1,2,2,3,2,3,3,4,0,1,1,2,1,2,2,3,1,2,2,3,2,3,3,4]
114 ; AVX2-NEXT: vpshufb %ymm2, %ymm3, %ymm2
115 ; AVX2-NEXT: vpsrlw $4, %ymm0, %ymm0
116 ; AVX2-NEXT: vpand %ymm1, %ymm0, %ymm0
117 ; AVX2-NEXT: vpshufb %ymm0, %ymm3, %ymm0
118 ; AVX2-NEXT: vpaddb %ymm2, %ymm0, %ymm0
119 ; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
120 ; AVX2-NEXT: vpunpckhdq {{.*#+}} ymm2 = ymm0[2],ymm1[2],ymm0[3],ymm1[3],ymm0[6],ymm1[6],ymm0[7],ymm1[7]
121 ; AVX2-NEXT: vpsadbw %ymm1, %ymm2, %ymm2
122 ; AVX2-NEXT: vpunpckldq {{.*#+}} ymm0 = ymm0[0],ymm1[0],ymm0[1],ymm1[1],ymm0[4],ymm1[4],ymm0[5],ymm1[5]
123 ; AVX2-NEXT: vpsadbw %ymm1, %ymm0, %ymm0
124 ; AVX2-NEXT: vpackuswb %ymm2, %ymm0, %ymm0
125 ; AVX2-NEXT: retq
126 ;
127 ; AVX512VPOPCNTDQ-LABEL: testv8i32:
128 ; AVX512VPOPCNTDQ: # %bb.0:
129 ; AVX512VPOPCNTDQ-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0
130 ; AVX512VPOPCNTDQ-NEXT: vpopcntd %zmm0, %zmm0
131 ; AVX512VPOPCNTDQ-NEXT: # kill: def $ymm0 killed $ymm0 killed $zmm0
132 ; AVX512VPOPCNTDQ-NEXT: retq
133 ;
134 ; AVX512VPOPCNTDQVL-LABEL: testv8i32:
135 ; AVX512VPOPCNTDQVL: # %bb.0:
136 ; AVX512VPOPCNTDQVL-NEXT: vpopcntd %ymm0, %ymm0
137 ; AVX512VPOPCNTDQVL-NEXT: retq
138 ;
139 ; BITALG_NOVLX-LABEL: testv8i32:
140 ; BITALG_NOVLX: # %bb.0:
141 ; BITALG_NOVLX-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0
142 ; BITALG_NOVLX-NEXT: vpopcntb %zmm0, %zmm0
143 ; BITALG_NOVLX-NEXT: vpxor %xmm1, %xmm1, %xmm1
144 ; BITALG_NOVLX-NEXT: vpunpckhdq {{.*#+}} ymm2 = ymm0[2],ymm1[2],ymm0[3],ymm1[3],ymm0[6],ymm1[6],ymm0[7],ymm1[7]
145 ; BITALG_NOVLX-NEXT: vpsadbw %ymm1, %ymm2, %ymm2
146 ; BITALG_NOVLX-NEXT: vpunpckldq {{.*#+}} ymm0 = ymm0[0],ymm1[0],ymm0[1],ymm1[1],ymm0[4],ymm1[4],ymm0[5],ymm1[5]
147 ; BITALG_NOVLX-NEXT: vpsadbw %ymm1, %ymm0, %ymm0
148 ; BITALG_NOVLX-NEXT: vpackuswb %ymm2, %ymm0, %ymm0
149 ; BITALG_NOVLX-NEXT: retq
150 ;
151 ; BITALG-LABEL: testv8i32:
152 ; BITALG: # %bb.0:
153 ; BITALG-NEXT: vpopcntb %ymm0, %ymm0
154 ; BITALG-NEXT: vpxor %xmm1, %xmm1, %xmm1
155 ; BITALG-NEXT: vpunpckhdq {{.*#+}} ymm2 = ymm0[2],ymm1[2],ymm0[3],ymm1[3],ymm0[6],ymm1[6],ymm0[7],ymm1[7]
156 ; BITALG-NEXT: vpsadbw %ymm1, %ymm2, %ymm2
157 ; BITALG-NEXT: vpunpckldq {{.*#+}} ymm0 = ymm0[0],ymm1[0],ymm0[1],ymm1[1],ymm0[4],ymm1[4],ymm0[5],ymm1[5]
158 ; BITALG-NEXT: vpsadbw %ymm1, %ymm0, %ymm0
159 ; BITALG-NEXT: vpackuswb %ymm2, %ymm0, %ymm0
160 ; BITALG-NEXT: retq
161 %out = call <8 x i32> @llvm.ctpop.v8i32(<8 x i32> %in)
162 ret <8 x i32> %out
163 }
165 define <16 x i16> @testv16i16(<16 x i16> %in) nounwind {
166 ; AVX1-LABEL: testv16i16:
167 ; AVX1: # %bb.0:
168 ; AVX1-NEXT: vmovdqa {{.*#+}} xmm1 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
169 ; AVX1-NEXT: vpand %xmm1, %xmm0, %xmm2
170 ; AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [0,1,1,2,1,2,2,3,1,2,2,3,2,3,3,4]
171 ; AVX1-NEXT: vpshufb %xmm2, %xmm3, %xmm2
172 ; AVX1-NEXT: vpsrlw $4, %xmm0, %xmm4
173 ; AVX1-NEXT: vpand %xmm1, %xmm4, %xmm4
174 ; AVX1-NEXT: vpshufb %xmm4, %xmm3, %xmm4
175 ; AVX1-NEXT: vpaddb %xmm2, %xmm4, %xmm2
176 ; AVX1-NEXT: vpsllw $8, %xmm2, %xmm4
177 ; AVX1-NEXT: vpaddb %xmm2, %xmm4, %xmm2
178 ; AVX1-NEXT: vpsrlw $8, %xmm2, %xmm2
179 ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0
180 ; AVX1-NEXT: vpand %xmm1, %xmm0, %xmm4
181 ; AVX1-NEXT: vpshufb %xmm4, %xmm3, %xmm4
182 ; AVX1-NEXT: vpsrlw $4, %xmm0, %xmm0
183 ; AVX1-NEXT: vpand %xmm1, %xmm0, %xmm0
184 ; AVX1-NEXT: vpshufb %xmm0, %xmm3, %xmm0
185 ; AVX1-NEXT: vpaddb %xmm4, %xmm0, %xmm0
186 ; AVX1-NEXT: vpsllw $8, %xmm0, %xmm1
187 ; AVX1-NEXT: vpaddb %xmm0, %xmm1, %xmm0
188 ; AVX1-NEXT: vpsrlw $8, %xmm0, %xmm0
189 ; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm2, %ymm0
190 ; AVX1-NEXT: retq
191 ;
192 ; AVX2-LABEL: testv16i16:
193 ; AVX2: # %bb.0:
194 ; AVX2-NEXT: vmovdqa {{.*#+}} ymm1 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
195 ; AVX2-NEXT: vpand %ymm1, %ymm0, %ymm2
196 ; AVX2-NEXT: vmovdqa {{.*#+}} ymm3 = [0,1,1,2,1,2,2,3,1,2,2,3,2,3,3,4,0,1,1,2,1,2,2,3,1,2,2,3,2,3,3,4]
197 ; AVX2-NEXT: vpshufb %ymm2, %ymm3, %ymm2
198 ; AVX2-NEXT: vpsrlw $4, %ymm0, %ymm0
199 ; AVX2-NEXT: vpand %ymm1, %ymm0, %ymm0
200 ; AVX2-NEXT: vpshufb %ymm0, %ymm3, %ymm0
201 ; AVX2-NEXT: vpaddb %ymm2, %ymm0, %ymm0
202 ; AVX2-NEXT: vpsllw $8, %ymm0, %ymm1
203 ; AVX2-NEXT: vpaddb %ymm0, %ymm1, %ymm0
204 ; AVX2-NEXT: vpsrlw $8, %ymm0, %ymm0
205 ; AVX2-NEXT: retq
206 ;
207 ; AVX512VPOPCNTDQ-LABEL: testv16i16:
208 ; AVX512VPOPCNTDQ: # %bb.0:
209 ; AVX512VPOPCNTDQ-NEXT: vpmovzxwd {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero
210 ; AVX512VPOPCNTDQ-NEXT: vpopcntd %zmm0, %zmm0
211 ; AVX512VPOPCNTDQ-NEXT: vpmovdw %zmm0, %ymm0
212 ; AVX512VPOPCNTDQ-NEXT: retq
213 ;
214 ; AVX512VPOPCNTDQVL-LABEL: testv16i16:
215 ; AVX512VPOPCNTDQVL: # %bb.0:
216 ; AVX512VPOPCNTDQVL-NEXT: vpmovzxwd {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero
217 ; AVX512VPOPCNTDQVL-NEXT: vpopcntd %zmm0, %zmm0
218 ; AVX512VPOPCNTDQVL-NEXT: vpmovdw %zmm0, %ymm0
219 ; AVX512VPOPCNTDQVL-NEXT: retq
220 ;
221 ; BITALG_NOVLX-LABEL: testv16i16:
222 ; BITALG_NOVLX: # %bb.0:
223 ; BITALG_NOVLX-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0
224 ; BITALG_NOVLX-NEXT: vpopcntw %zmm0, %zmm0
225 ; BITALG_NOVLX-NEXT: # kill: def $ymm0 killed $ymm0 killed $zmm0
226 ; BITALG_NOVLX-NEXT: retq
227 ;
228 ; BITALG-LABEL: testv16i16:
229 ; BITALG: # %bb.0:
230 ; BITALG-NEXT: vpopcntw %ymm0, %ymm0
231 ; BITALG-NEXT: retq
232 %out = call <16 x i16> @llvm.ctpop.v16i16(<16 x i16> %in)
233 ret <16 x i16> %out
234 }
236 define <32 x i8> @testv32i8(<32 x i8> %in) nounwind {
237 ; AVX1-LABEL: testv32i8:
238 ; AVX1: # %bb.0:
239 ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
240 ; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
241 ; AVX1-NEXT: vpand %xmm2, %xmm1, %xmm3
242 ; AVX1-NEXT: vmovdqa {{.*#+}} xmm4 = [0,1,1,2,1,2,2,3,1,2,2,3,2,3,3,4]
243 ; AVX1-NEXT: vpshufb %xmm3, %xmm4, %xmm3
244 ; AVX1-NEXT: vpsrlw $4, %xmm1, %xmm1
245 ; AVX1-NEXT: vpand %xmm2, %xmm1, %xmm1
246 ; AVX1-NEXT: vpshufb %xmm1, %xmm4, %xmm1
247 ; AVX1-NEXT: vpaddb %xmm3, %xmm1, %xmm1
248 ; AVX1-NEXT: vpand %xmm2, %xmm0, %xmm3
249 ; AVX1-NEXT: vpshufb %xmm3, %xmm4, %xmm3
250 ; AVX1-NEXT: vpsrlw $4, %xmm0, %xmm0
251 ; AVX1-NEXT: vpand %xmm2, %xmm0, %xmm0
252 ; AVX1-NEXT: vpshufb %xmm0, %xmm4, %xmm0
253 ; AVX1-NEXT: vpaddb %xmm3, %xmm0, %xmm0
254 ; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
255 ; AVX1-NEXT: retq
256 ;
257 ; AVX2-LABEL: testv32i8:
258 ; AVX2: # %bb.0:
259 ; AVX2-NEXT: vmovdqa {{.*#+}} ymm1 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
260 ; AVX2-NEXT: vpand %ymm1, %ymm0, %ymm2
261 ; AVX2-NEXT: vmovdqa {{.*#+}} ymm3 = [0,1,1,2,1,2,2,3,1,2,2,3,2,3,3,4,0,1,1,2,1,2,2,3,1,2,2,3,2,3,3,4]
262 ; AVX2-NEXT: vpshufb %ymm2, %ymm3, %ymm2
263 ; AVX2-NEXT: vpsrlw $4, %ymm0, %ymm0
264 ; AVX2-NEXT: vpand %ymm1, %ymm0, %ymm0
265 ; AVX2-NEXT: vpshufb %ymm0, %ymm3, %ymm0
266 ; AVX2-NEXT: vpaddb %ymm2, %ymm0, %ymm0
267 ; AVX2-NEXT: retq
268 ;
269 ; AVX512VPOPCNTDQ-LABEL: testv32i8:
270 ; AVX512VPOPCNTDQ: # %bb.0:
271 ; AVX512VPOPCNTDQ-NEXT: vmovdqa {{.*#+}} ymm1 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
272 ; AVX512VPOPCNTDQ-NEXT: vpand %ymm1, %ymm0, %ymm2
273 ; AVX512VPOPCNTDQ-NEXT: vmovdqa {{.*#+}} ymm3 = [0,1,1,2,1,2,2,3,1,2,2,3,2,3,3,4,0,1,1,2,1,2,2,3,1,2,2,3,2,3,3,4]
274 ; AVX512VPOPCNTDQ-NEXT: vpshufb %ymm2, %ymm3, %ymm2
275 ; AVX512VPOPCNTDQ-NEXT: vpsrlw $4, %ymm0, %ymm0
276 ; AVX512VPOPCNTDQ-NEXT: vpand %ymm1, %ymm0, %ymm0
277 ; AVX512VPOPCNTDQ-NEXT: vpshufb %ymm0, %ymm3, %ymm0
278 ; AVX512VPOPCNTDQ-NEXT: vpaddb %ymm2, %ymm0, %ymm0
279 ; AVX512VPOPCNTDQ-NEXT: retq
280 ;
281 ; AVX512VPOPCNTDQVL-LABEL: testv32i8:
282 ; AVX512VPOPCNTDQVL: # %bb.0:
283 ; AVX512VPOPCNTDQVL-NEXT: vmovdqa {{.*#+}} ymm1 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
284 ; AVX512VPOPCNTDQVL-NEXT: vpand %ymm1, %ymm0, %ymm2
285 ; AVX512VPOPCNTDQVL-NEXT: vmovdqa {{.*#+}} ymm3 = [0,1,1,2,1,2,2,3,1,2,2,3,2,3,3,4,0,1,1,2,1,2,2,3,1,2,2,3,2,3,3,4]
286 ; AVX512VPOPCNTDQVL-NEXT: vpshufb %ymm2, %ymm3, %ymm2
287 ; AVX512VPOPCNTDQVL-NEXT: vpsrlw $4, %ymm0, %ymm0
288 ; AVX512VPOPCNTDQVL-NEXT: vpand %ymm1, %ymm0, %ymm0
289 ; AVX512VPOPCNTDQVL-NEXT: vpshufb %ymm0, %ymm3, %ymm0
290 ; AVX512VPOPCNTDQVL-NEXT: vpaddb %ymm2, %ymm0, %ymm0
291 ; AVX512VPOPCNTDQVL-NEXT: retq
292 ;
293 ; BITALG_NOVLX-LABEL: testv32i8:
294 ; BITALG_NOVLX: # %bb.0:
295 ; BITALG_NOVLX-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0
296 ; BITALG_NOVLX-NEXT: vpopcntb %zmm0, %zmm0
297 ; BITALG_NOVLX-NEXT: # kill: def $ymm0 killed $ymm0 killed $zmm0
298 ; BITALG_NOVLX-NEXT: retq
299 ;
300 ; BITALG-LABEL: testv32i8:
301 ; BITALG: # %bb.0:
302 ; BITALG-NEXT: vpopcntb %ymm0, %ymm0
303 ; BITALG-NEXT: retq
304 %out = call <32 x i8> @llvm.ctpop.v32i8(<32 x i8> %in)
305 ret <32 x i8> %out
306 }
308 define <4 x i64> @foldv4i64() nounwind {
309 ; ALL-LABEL: foldv4i64:
310 ; ALL: # %bb.0:
311 ; ALL-NEXT: vmovaps {{.*#+}} ymm0 = [1,64,0,8]
312 ; ALL-NEXT: retq
313 %out = call <4 x i64> @llvm.ctpop.v4i64(<4 x i64> <i64 256, i64 -1, i64 0, i64 255>)
314 ret <4 x i64> %out
315 }
317 define <8 x i32> @foldv8i32() nounwind {
318 ; ALL-LABEL: foldv8i32:
319 ; ALL: # %bb.0:
320 ; ALL-NEXT: vmovaps {{.*#+}} ymm0 = [1,32,0,8,16,3,2,3]
321 ; ALL-NEXT: retq
322 %out = call <8 x i32> @llvm.ctpop.v8i32(<8 x i32> <i32 256, i32 -1, i32 0, i32 255, i32 -65536, i32 7, i32 24, i32 88>)
323 ret <8 x i32> %out
324 }
326 define <16 x i16> @foldv16i16() nounwind {
327 ; ALL-LABEL: foldv16i16:
328 ; ALL: # %bb.0:
329 ; ALL-NEXT: vmovaps {{.*#+}} ymm0 = [1,16,0,8,0,3,2,3,15,7,1,1,1,1,1,1]
330 ; ALL-NEXT: retq
331 %out = call <16 x i16> @llvm.ctpop.v16i16(<16 x i16> <i16 256, i16 -1, i16 0, i16 255, i16 -65536, i16 7, i16 24, i16 88, i16 -2, i16 254, i16 1, i16 2, i16 4, i16 8, i16 16, i16 32>)
332 ret <16 x i16> %out
333 }
335 define <32 x i8> @foldv32i8() nounwind {
336 ; ALL-LABEL: foldv32i8:
337 ; ALL: # %bb.0:
338 ; ALL-NEXT: vmovaps {{.*#+}} ymm0 = [0,8,0,8,0,3,2,3,7,7,1,1,1,1,1,1,1,1,0,0,1,2,3,4,5,6,7,8,2,2,3,7]
339 ; ALL-NEXT: retq
340 %out = call <32 x i8> @llvm.ctpop.v32i8(<32 x i8> <i8 256, i8 -1, i8 0, i8 255, i8 -65536, i8 7, i8 24, i8 88, i8 -2, i8 254, i8 1, i8 2, i8 4, i8 8, i8 16, i8 32, i8 64, i8 128, i8 256, i8 -256, i8 -128, i8 -64, i8 -32, i8 -16, i8 -8, i8 -4, i8 -2, i8 -1, i8 3, i8 5, i8 7, i8 127>)
341 ret <32 x i8> %out
342 }
344 declare <4 x i64> @llvm.ctpop.v4i64(<4 x i64>)
345 declare <8 x i32> @llvm.ctpop.v8i32(<8 x i32>)
346 declare <16 x i16> @llvm.ctpop.v16i16(<16 x i16>)
347 declare <32 x i8> @llvm.ctpop.v32i8(<32 x i8>)