1 # RUN: llc -mcpu=pwr8 -mtriple=powerpc64le-unknown-linux-gnu -start-after \
2 # RUN: virtregrewriter -ppc-asm-full-reg-names -verify-machineinstrs %s \
3 # RUN: -o - | FileCheck %s
7 source_filename = "a.c"
8 target datalayout = "e-m:e-i64:64-n32:64"
9 target triple = "powerpc64le-unknown-linux-gnu"
11 ; Function Attrs: nounwind
12 define void @test(i32 signext %a6, i32 signext %a7, i32 signext %a17) local_unnamed_addr #0 {
14 %cmp27 = icmp slt i32 %a6, %a7
15 %cmp29 = icmp sgt i32 %a6, %a17
16 %or.cond781 = or i1 %cmp27, %cmp29
17 tail call void asm sideeffect "# nothing", "~{cr0},~{cr1},~{cr2},~{cr3},~{cr4},~{cr5},~{cr6},~{cr7},~{memory}"() #1, !srcloc !1
20 if.end326: ; preds = %entry
21 br i1 %or.cond781, label %if.then330, label %if.end331
23 if.then330: ; preds = %if.end326
26 if.end331: ; preds = %if.end326
30 ; Function Attrs: nounwind
31 declare void @llvm.stackprotector(i8*, i8**) #1
33 attributes #0 = { nounwind "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="ppc64le" "target-features"="+altivec,+bpermd,+crypto,+direct-move,+extdiv,+htm,+power8-vector,+vsx,-power9-vector,-qpx" "unsafe-fp-math"="false" "use-soft-float"="false" }
34 attributes #1 = { nounwind }
38 !0 = !{!"clang version 8.0.0 (trunk 349357)"}
45 exposesReturnsTwice: false
47 regBankSelected: false
50 tracksRegLiveness: true
54 - { reg: '$x3', virtual-reg: '' }
55 - { reg: '$x4', virtual-reg: '' }
56 - { reg: '$x5', virtual-reg: '' }
58 isFrameAddressTaken: false
59 isReturnAddressTaken: false
68 maxCallFrameSize: 4294967295
69 cvBytesOfCalleeSavedRegisters: 0
70 hasOpaqueSPAdjustment: false
72 hasMustTailInVarArgFunc: false
78 - { id: 0, name: '', type: spill-slot, offset: 0, size: 4, alignment: 4,
79 stack-id: default, callee-saved-register: '', callee-saved-restored: true,
80 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
81 - { id: 1, name: '', type: spill-slot, offset: 0, size: 4, alignment: 4,
82 stack-id: default, callee-saved-register: '', callee-saved-restored: true,
83 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
84 - { id: 2, name: '', type: spill-slot, offset: 0, size: 4, alignment: 4,
85 stack-id: default, callee-saved-register: '', callee-saved-restored: true,
86 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
90 liveins: $x3, $x4, $x5
92 renamable $cr0 = CMPW renamable $r3, renamable $r4, implicit $x4
93 renamable $cr1 = CMPW renamable $r3, renamable $r5, implicit $x5, implicit killed $x3
94 renamable $cr5lt = CRNOR renamable $cr0lt, renamable $cr1gt, implicit killed $cr0
95 renamable $cr5gt = COPY renamable $cr1gt, implicit $cr1
96 ; CHECK: crnor 4*cr5+lt, lt, 4*cr1+gt
97 ; CHECK: cror 4*cr5+gt, 4*cr1+gt, 4*cr1+gt
98 SPILL_CRBIT killed renamable $cr5lt, 0, %stack.0 :: (store 4 into %stack.0)
99 renamable $cr1 = CMPW renamable $r4, renamable $r5, implicit killed $x5, implicit killed $x4
100 SPILL_CRBIT killed renamable $cr5gt, 0, %stack.1 :: (store 4 into %stack.1)
101 SPILL_CRBIT killed renamable $cr1gt, 0, %stack.2 :: (store 4 into %stack.2)
102 INLINEASM &"# nothing", 25, 12, implicit-def dead early-clobber $cr0, 12, implicit-def dead early-clobber $cr1, 12, implicit-def dead early-clobber $cr2, 12, implicit-def dead early-clobber $cr3, 12, implicit-def dead early-clobber $cr4, 12, implicit-def dead early-clobber $cr5, 12, implicit-def dead early-clobber $cr6, 12, implicit-def dead early-clobber $cr7, !1
103 BLR8 implicit $lr8, implicit $rm
106 successors: %bb.2(0x00000001), %bb.3(0x7fffffff)
108 renamable $cr5lt = RESTORE_CRBIT 0, %stack.0 :: (load 4 from %stack.0)
109 renamable $cr5gt = RESTORE_CRBIT 0, %stack.1 :: (load 4 from %stack.1)
110 renamable $cr5lt = CROR killed renamable $cr5lt, killed renamable $cr5gt
111 BCn killed renamable $cr5lt, %bb.3
119 BLR8 implicit $lr8, implicit $rm