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[ARM] More MVE compare vector splat combines for ANDs
[llvm-complete.git]
/
test
/
CodeGen
/
PowerPC
/
named-reg-alloc-r1-64.ll
blob
080b1982c88cbff3a7559e37a8ca4aeacea7554a
1
; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64-unknown-linux-gnu 2>&1 | FileCheck %s
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define i64 @get_reg() nounwind {
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entry:
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%reg = call i64 @llvm.read_register.i64(metadata !0)
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ret i64 %reg
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; CHECK-LABEL: get_reg
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; CHECK: mr 3, 1
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}
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declare i64 @llvm.read_register.i64(metadata) nounwind
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!0 = !{!"r1\00"}