| blob | ed8f2309c37f6957bc125d054275f19f157ef6bd |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr9 -verify-machineinstrs < %s | FileCheck %s -check-prefix=CHECK-PPC64LE
3 ; RUN: llc -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr8 -verify-machineinstrs < %s | FileCheck %s -check-prefix=CHECK-PPC64
4 ; i8* p;
5 ; i32 m;
6 ; p[0] = (m >> 0) & 0xFF;
7 ; p[1] = (m >> 8) & 0xFF;
8 ; p[2] = (m >> 16) & 0xFF;
9 ; p[3] = (m >> 24) & 0xFF;
10 define void @store_i32_by_i8(i32 signext %m, i8* %p) {
11 ; CHECK-PPC64LE-LABEL: store_i32_by_i8:
12 ; CHECK-PPC64LE: # %bb.0: # %entry
13 ; CHECK-PPC64LE-NEXT: stw 3, 0(4)
14 ; CHECK-PPC64LE-NEXT: blr
15 ;
16 ; CHECK-PPC64-LABEL: store_i32_by_i8:
17 ; CHECK-PPC64: # %bb.0: # %entry
18 ; CHECK-PPC64-NEXT: stwbrx 3, 0, 4
19 ; CHECK-PPC64-NEXT: blr
20 entry:
21 %conv = trunc i32 %m to i8
22 store i8 %conv, i8* %p, align 1
23 %0 = lshr i32 %m, 8
24 %conv3 = trunc i32 %0 to i8
25 %arrayidx4 = getelementptr inbounds i8, i8* %p, i64 1
26 store i8 %conv3, i8* %arrayidx4, align 1
27 %1 = lshr i32 %m, 16
28 %conv7 = trunc i32 %1 to i8
29 %arrayidx8 = getelementptr inbounds i8, i8* %p, i64 2
30 store i8 %conv7, i8* %arrayidx8, align 1
31 %2 = lshr i32 %m, 24
32 %conv11 = trunc i32 %2 to i8
33 %arrayidx12 = getelementptr inbounds i8, i8* %p, i64 3
34 store i8 %conv11, i8* %arrayidx12, align 1
35 ret void
36 }
37 ; i8* p;
38 ; i32 m;
39 ; p[0] = (m >> 24) & 0xFF;
40 ; p[1] = (m >> 16) & 0xFF;
41 ; p[2] = (m >> 8) & 0xFF;
42 ; p[3] = (m >> 0) & 0xFF;
43 define void @store_i32_by_i8_bswap(i32 signext %m, i8* %p) {
44 ; CHECK-PPC64LE-LABEL: store_i32_by_i8_bswap:
45 ; CHECK-PPC64LE: # %bb.0: # %entry
46 ; CHECK-PPC64LE-NEXT: stwbrx 3, 0, 4
47 ; CHECK-PPC64LE-NEXT: blr
48 ;
49 ; CHECK-PPC64-LABEL: store_i32_by_i8_bswap:
50 ; CHECK-PPC64: # %bb.0: # %entry
51 ; CHECK-PPC64-NEXT: stw 3, 0(4)
52 ; CHECK-PPC64-NEXT: blr
53 entry:
54 %0 = lshr i32 %m, 24
55 %conv = trunc i32 %0 to i8
56 store i8 %conv, i8* %p, align 1
57 %1 = lshr i32 %m, 16
58 %conv3 = trunc i32 %1 to i8
59 %arrayidx4 = getelementptr inbounds i8, i8* %p, i64 1
60 store i8 %conv3, i8* %arrayidx4, align 1
61 %2 = lshr i32 %m, 8
62 %conv7 = trunc i32 %2 to i8
63 %arrayidx8 = getelementptr inbounds i8, i8* %p, i64 2
64 store i8 %conv7, i8* %arrayidx8, align 1
65 %conv11 = trunc i32 %m to i8
66 %arrayidx12 = getelementptr inbounds i8, i8* %p, i64 3
67 store i8 %conv11, i8* %arrayidx12, align 1
68 ret void
69 }
70 ; i8 *p;
71 ; i64 m;
72 ; p[0] = (m >> 0) & 0xFF;
73 ; p[1] = (m >> 8) & 0xFF;
74 ; p[2] = (m >> 16) & 0xFF;
75 ; p[3] = (m >> 24) & 0xFF;
76 ; p[4] = (m >> 32) & 0xFF;
77 ; p[5] = (m >> 40) & 0xFF;
78 ; p[6] = (m >> 48) & 0xFF;
79 ; p[7] = (m >> 56) & 0xFF;
80 define void @store_i64_by_i8(i64 %m, i8* %p) {
81 ; CHECK-PPC64LE-LABEL: store_i64_by_i8:
82 ; CHECK-PPC64LE: # %bb.0: # %entry
83 ; CHECK-PPC64LE-NEXT: stdx 3, 0, 4
84 ; CHECK-PPC64LE-NEXT: blr
85 ;
86 ; CHECK-PPC64-LABEL: store_i64_by_i8:
87 ; CHECK-PPC64: # %bb.0: # %entry
88 ; CHECK-PPC64-NEXT: stdbrx 3, 0, 4
89 ; CHECK-PPC64-NEXT: blr
90 entry:
91 %conv = trunc i64 %m to i8
92 store i8 %conv, i8* %p, align 1
93 %0 = lshr i64 %m, 8
94 %conv3 = trunc i64 %0 to i8
95 %arrayidx4 = getelementptr inbounds i8, i8* %p, i64 1
96 store i8 %conv3, i8* %arrayidx4, align 1
97 %1 = lshr i64 %m, 16
98 %conv7 = trunc i64 %1 to i8
99 %arrayidx8 = getelementptr inbounds i8, i8* %p, i64 2
100 store i8 %conv7, i8* %arrayidx8, align 1
101 %2 = lshr i64 %m, 24
102 %conv11 = trunc i64 %2 to i8
103 %arrayidx12 = getelementptr inbounds i8, i8* %p, i64 3
104 store i8 %conv11, i8* %arrayidx12, align 1
105 %3 = lshr i64 %m, 32
106 %conv15 = trunc i64 %3 to i8
107 %arrayidx16 = getelementptr inbounds i8, i8* %p, i64 4
108 store i8 %conv15, i8* %arrayidx16, align 1
109 %4 = lshr i64 %m, 40
110 %conv19 = trunc i64 %4 to i8
111 %arrayidx20 = getelementptr inbounds i8, i8* %p, i64 5
112 store i8 %conv19, i8* %arrayidx20, align 1
113 %5 = lshr i64 %m, 48
114 %conv23 = trunc i64 %5 to i8
115 %arrayidx24 = getelementptr inbounds i8, i8* %p, i64 6
116 store i8 %conv23, i8* %arrayidx24, align 1
117 %6 = lshr i64 %m, 56
118 %conv27 = trunc i64 %6 to i8
119 %arrayidx28 = getelementptr inbounds i8, i8* %p, i64 7
120 store i8 %conv27, i8* %arrayidx28, align 1
121 ret void
122 }
123 ; i8 *p;
124 ; i64 m;
125 ; p[7] = (m >> 0) & 0xFF;
126 ; p[6] = (m >> 8) & 0xFF;
127 ; p[5] = (m >> 16) & 0xFF;
128 ; p[4] = (m >> 24) & 0xFF;
129 ; p[3] = (m >> 32) & 0xFF;
130 ; p[2] = (m >> 40) & 0xFF;
131 ; p[1] = (m >> 48) & 0xFF;
132 ; p[0] = (m >> 56) & 0xFF;
133 define void @store_i64_by_i8_bswap(i64 %m, i8* %p) {
134 ; CHECK-PPC64LE-LABEL: store_i64_by_i8_bswap:
135 ; CHECK-PPC64LE: # %bb.0: # %entry
136 ; CHECK-PPC64LE-NEXT: stdbrx 3, 0, 4
137 ; CHECK-PPC64LE-NEXT: blr
138 ;
139 ; CHECK-PPC64-LABEL: store_i64_by_i8_bswap:
140 ; CHECK-PPC64: # %bb.0: # %entry
141 ; CHECK-PPC64-NEXT: stdx 3, 0, 4
142 ; CHECK-PPC64-NEXT: blr
143 entry:
144 %conv = trunc i64 %m to i8
145 %arrayidx = getelementptr inbounds i8, i8* %p, i64 7
146 store i8 %conv, i8* %arrayidx, align 1
147 %0 = lshr i64 %m, 8
148 %conv3 = trunc i64 %0 to i8
149 %arrayidx4 = getelementptr inbounds i8, i8* %p, i64 6
150 store i8 %conv3, i8* %arrayidx4, align 1
151 %1 = lshr i64 %m, 16
152 %conv7 = trunc i64 %1 to i8
153 %arrayidx8 = getelementptr inbounds i8, i8* %p, i64 5
154 store i8 %conv7, i8* %arrayidx8, align 1
155 %2 = lshr i64 %m, 24
156 %conv11 = trunc i64 %2 to i8
157 %arrayidx12 = getelementptr inbounds i8, i8* %p, i64 4
158 store i8 %conv11, i8* %arrayidx12, align 1
159 %3 = lshr i64 %m, 32
160 %conv15 = trunc i64 %3 to i8
161 %arrayidx16 = getelementptr inbounds i8, i8* %p, i64 3
162 store i8 %conv15, i8* %arrayidx16, align 1
163 %4 = lshr i64 %m, 40
164 %conv19 = trunc i64 %4 to i8
165 %arrayidx20 = getelementptr inbounds i8, i8* %p, i64 2
166 store i8 %conv19, i8* %arrayidx20, align 1
167 %5 = lshr i64 %m, 48
168 %conv23 = trunc i64 %5 to i8
169 %arrayidx24 = getelementptr inbounds i8, i8* %p, i64 1
170 store i8 %conv23, i8* %arrayidx24, align 1
171 %6 = lshr i64 %m, 56
172 %conv27 = trunc i64 %6 to i8
173 store i8 %conv27, i8* %p, align 1
174 ret void
175 }
177 ; i32 t; i8 *p;
178 ; i64 m = t * 7;
179 ; p[7] = (m >> 0) & 0xFF;
180 ; p[6] = (m >> 8) & 0xFF;
181 ; p[5] = (m >> 16) & 0xFF;
182 ; p[4] = (m >> 24) & 0xFF;
183 ; p[3] = (m >> 32) & 0xFF;
184 ; p[2] = (m >> 40) & 0xFF;
185 ; p[1] = (m >> 48) & 0xFF;
186 ; p[0] = (m >> 56) & 0xFF;
187 define void @store_i64_by_i8_bswap_uses(i32 signext %t, i8* %p) {
188 ; CHECK-PPC64LE-LABEL: store_i64_by_i8_bswap_uses:
189 ; CHECK-PPC64LE: # %bb.0: # %entry
190 ; CHECK-PPC64LE-NEXT: slwi [[REG:[0-9]+]], 3, 3
191 ; CHECK-PPC64LE-NEXT: subf [[REG1:[0-9]+]], 3, [[REG]]
192 ; CHECK-PPC64LE-NEXT: extsw [[REG2:[0-9]+]], [[REG1]]
193 ; CHECK-PPC64LE-NEXT: stdbrx [[REG2]], 0, 4
194 ; CHECK-PPC64LE-NEXT: blr
195 ;
196 ; CHECK-PPC64-LABEL: store_i64_by_i8_bswap_uses:
197 ; CHECK-PPC64: # %bb.0: # %entry
198 ; CHECK-PPC64-NEXT: slwi [[REG:[0-9]+]], 3, 3
199 ; CHECK-PPC64-NEXT: subf [[REG1:[0-9]+]], 3, [[REG]]
200 ; CHECK-PPC64-NEXT: extsw [[REG2:[0-9]+]], [[REG1]]
201 ; CHECK-PPC64-NEXT: stdx [[REG2]], 0, 4
202 ; CHECK-PPC64-NEXT: blr
203 entry:
204 %mul = mul nsw i32 %t, 7
205 %conv = sext i32 %mul to i64
206 %conv1 = trunc i32 %mul to i8
207 %arrayidx = getelementptr inbounds i8, i8* %p, i64 7
208 store i8 %conv1, i8* %arrayidx, align 1
209 %0 = lshr i64 %conv, 8
210 %conv4 = trunc i64 %0 to i8
211 %arrayidx5 = getelementptr inbounds i8, i8* %p, i64 6
212 store i8 %conv4, i8* %arrayidx5, align 1
213 %1 = lshr i64 %conv, 16
214 %conv8 = trunc i64 %1 to i8
215 %arrayidx9 = getelementptr inbounds i8, i8* %p, i64 5
216 store i8 %conv8, i8* %arrayidx9, align 1
217 %2 = lshr i64 %conv, 24
218 %conv12 = trunc i64 %2 to i8
219 %arrayidx13 = getelementptr inbounds i8, i8* %p, i64 4
220 store i8 %conv12, i8* %arrayidx13, align 1
221 %shr14 = ashr i64 %conv, 32
222 %conv16 = trunc i64 %shr14 to i8
223 %arrayidx17 = getelementptr inbounds i8, i8* %p, i64 3
224 store i8 %conv16, i8* %arrayidx17, align 1
225 %shr18 = ashr i64 %conv, 40
226 %conv20 = trunc i64 %shr18 to i8
227 %arrayidx21 = getelementptr inbounds i8, i8* %p, i64 2
228 store i8 %conv20, i8* %arrayidx21, align 1
229 %shr22 = ashr i64 %conv, 48
230 %conv24 = trunc i64 %shr22 to i8
231 %arrayidx25 = getelementptr inbounds i8, i8* %p, i64 1
232 store i8 %conv24, i8* %arrayidx25, align 1
233 %shr26 = ashr i64 %conv, 56
234 %conv28 = trunc i64 %shr26 to i8
235 store i8 %conv28, i8* %p, align 1
236 ret void
237 ; CEHCK-PPC64LE: stdbrx [[REG2]], 0, 4
238 ; CEHCK-PPC64: stdx [[REG2]], 0, 4
239 }
241 ; One of the stores is volatile
242 ; i8 *p;
243 ; p0 = volatile *p;
244 ; p[3] = (m >> 0) & 0xFF;
245 ; p[2] = (m >> 8) & 0xFF;
246 ; p[1] = (m >> 16) & 0xFF;
247 ; *p0 = (m >> 24) & 0xFF;
248 define void @store_i32_by_i8_bswap_volatile(i32 signext %m, i8* %p) {
249 ; CHECK-PPC64LE-LABEL: store_i32_by_i8_bswap_volatile:
250 ; CHECK-PPC64LE: # %bb.0: # %entry
251 ; CHECK-PPC64LE-NOT: stwbrx
252 ;
253 ; CHECK-PPC64-LABEL: store_i32_by_i8_bswap_volatile:
254 ; CHECK-PPC64: # %bb.0: # %entry
255 ; CHECK-PPC64-NOT: stw
256 entry:
257 %conv = trunc i32 %m to i8
258 %arrayidx = getelementptr inbounds i8, i8* %p, i64 3
259 store i8 %conv, i8* %arrayidx, align 1
260 %0 = lshr i32 %m, 8
261 %conv3 = trunc i32 %0 to i8
262 %arrayidx4 = getelementptr inbounds i8, i8* %p, i64 2
263 store i8 %conv3, i8* %arrayidx4, align 1
264 %1 = lshr i32 %m, 16
265 %conv7 = trunc i32 %1 to i8
266 %arrayidx8 = getelementptr inbounds i8, i8* %p, i64 1
267 store i8 %conv7, i8* %arrayidx8, align 1
268 %2 = lshr i32 %m, 24
269 %conv11 = trunc i32 %2 to i8
270 store volatile i8 %conv11, i8* %p, align 1
271 ret void
272 }
274 ; There is a store in between individual stores
275 ; i8* p, q;
276 ; p[3] = (m >> 0) & 0xFF;
277 ; p[2] = (m >> 8) & 0xFF;
278 ; *q = 3;
279 ; p[1] = (m >> 16) & 0xFF;
280 ; p[0] = (m >> 24) & 0xFF;
281 define void @store_i32_by_i8_bswap_store_in_between(i32 signext %m, i8* %p, i8* %q) {
282 ; CHECK-PPC64LE-LABEL: store_i32_by_i8_bswap_store_in_between:
283 ; CHECK-PPC64LE: # %bb.0: # %entry
284 ; CHECK-PPC64LE-NOT: stwbrx
285 ;
286 ; CHECK-PPC64-LABEL: store_i32_by_i8_bswap_store_in_between:
287 ; CHECK-PPC64: # %bb.0: # %entry
288 ; CHECK-PPC64-NOT: stw
289 entry:
290 %conv = trunc i32 %m to i8
291 %arrayidx = getelementptr inbounds i8, i8* %p, i64 3
292 store i8 %conv, i8* %arrayidx, align 1
293 %0 = lshr i32 %m, 8
294 %conv3 = trunc i32 %0 to i8
295 %arrayidx4 = getelementptr inbounds i8, i8* %p, i64 2
296 store i8 %conv3, i8* %arrayidx4, align 1
297 store i8 3, i8* %q, align 1
298 %1 = lshr i32 %m, 16
299 %conv7 = trunc i32 %1 to i8
300 %arrayidx8 = getelementptr inbounds i8, i8* %p, i64 1
301 store i8 %conv7, i8* %arrayidx8, align 1
302 %2 = lshr i32 %m, 24
303 %conv11 = trunc i32 %2 to i8
304 store i8 %conv11, i8* %p, align 1
305 ret void
306 }
308 define void @store_i32_by_i8_bswap_unrelated_store(i32 signext %m, i8* %p, i8* %q) {
309 ; CHECK-PPC64LE-LABEL: store_i32_by_i8_bswap_unrelated_store:
310 ; CHECK-PPC64LE: # %bb.0: # %entry
311 ; CHECK-PPC64LE-NOT: stwbrx
312 ;
313 ; CHECK-PPC64-LABEL: store_i32_by_i8_bswap_unrelated_store:
314 ; CHECK-PPC64: # %bb.0: # %entry
315 ; CHECK-PPC64-NOT: stw
316 entry:
317 %conv = trunc i32 %m to i8
318 %arrayidx = getelementptr inbounds i8, i8* %p, i64 3
319 store i8 %conv, i8* %arrayidx, align 1
320 %0 = lshr i32 %m, 8
321 %conv3 = trunc i32 %0 to i8
322 %arrayidx4 = getelementptr inbounds i8, i8* %q, i64 2
323 store i8 %conv3, i8* %arrayidx4, align 1
324 %1 = lshr i32 %m, 16
325 %conv7 = trunc i32 %1 to i8
326 %arrayidx8 = getelementptr inbounds i8, i8* %p, i64 1
327 store i8 %conv7, i8* %arrayidx8, align 1
328 %2 = lshr i32 %m, 24
329 %conv11 = trunc i32 %2 to i8
330 store i8 %conv11, i8* %p, align 1
331 ret void
332 }
333 ; i32 m;
334 ; i8* p;
335 ; p[3] = (m >> 8) & 0xFF;
336 ; p[4] = (m >> 0) & 0xFF;
337 ; p[2] = (m >> 16) & 0xFF;
338 ; p[1] = (m >> 24) & 0xFF;
339 define void @store_i32_by_i8_bswap_nonzero_offset(i32 signext %m, i8* %p) {
340 ; CHECK-PPC64LE-LABEL: store_i32_by_i8_bswap_nonzero_offset:
341 ; CHECK-PPC64LE: # %bb.0: # %entry
342 ; CHECK-PPC64LE-NEXT: addi [[REG1:[0-9]+]], 4, 1
343 ; CHECK-PPC64LE-NEXT: stwbrx 3, 0, [[REG1]]
344 ; CHECK-PPC64LE-NEXT: blr
345 ;
346 ; CHECK-PPC64-LABEL: store_i32_by_i8_bswap_nonzero_offset:
347 ; CHECK-PPC64: # %bb.0: # %entry
348 ; CHECK-PPC64-NEXT: stw 3, 1(4)
349 ; CHECK-PPC64-NEXT: blr
350 entry:
351 %0 = lshr i32 %m, 8
352 %conv = trunc i32 %0 to i8
353 %arrayidx = getelementptr inbounds i8, i8* %p, i64 3
354 store i8 %conv, i8* %arrayidx, align 1
355 %conv3 = trunc i32 %m to i8
356 %arrayidx4 = getelementptr inbounds i8, i8* %p, i64 4
357 store i8 %conv3, i8* %arrayidx4, align 1
358 %1 = lshr i32 %m, 16
359 %conv7 = trunc i32 %1 to i8
360 %arrayidx8 = getelementptr inbounds i8, i8* %p, i64 2
361 store i8 %conv7, i8* %arrayidx8, align 1
362 %2 = lshr i32 %m, 24
363 %conv11 = trunc i32 %2 to i8
364 %arrayidx12 = getelementptr inbounds i8, i8* %p, i64 1
365 store i8 %conv11, i8* %arrayidx12, align 1
366 ret void
367 }
368 ; i32 m;
369 ; i8* p;
370 ; p[-3] = (m >> 8) & 0xFF;
371 ; p[-4] = (m >> 0) & 0xFF;
372 ; p[-2] = (m >> 16) & 0xFF;
373 ; p[-1] = (m >> 24) & 0xFF;
374 define void @store_i32_by_i8_neg_offset(i32 signext %m, i8* %p) {
375 ; CHECK-PPC64LE-LABEL: store_i32_by_i8_neg_offset:
376 ; CHECK-PPC64LE: # %bb.0: # %entry
377 ; CHECK-PPC64LE-NEXT: stw 3, -4(4)
378 ; CHECK-PPC64LE-NEXT: blr
379 ;
380 ; CHECK-PPC64-LABEL: store_i32_by_i8_neg_offset:
381 ; CHECK-PPC64: # %bb.0: # %entry
382 ; CHECK-PPC64-NEXT: addi [[REG1:[0-9]+]], 4, -4
383 ; CHECK-PPC64-NEXT: stwbrx 3, 0, [[REG1]]
384 ; CHECK-PPC64-NEXT: blr
385 entry:
386 %0 = lshr i32 %m, 8
387 %conv = trunc i32 %0 to i8
388 %arrayidx = getelementptr inbounds i8, i8* %p, i64 -3
389 store i8 %conv, i8* %arrayidx, align 1
390 %conv3 = trunc i32 %m to i8
391 %arrayidx4 = getelementptr inbounds i8, i8* %p, i64 -4
392 store i8 %conv3, i8* %arrayidx4, align 1
393 %1 = lshr i32 %m, 16
394 %conv7 = trunc i32 %1 to i8
395 %arrayidx8 = getelementptr inbounds i8, i8* %p, i64 -2
396 store i8 %conv7, i8* %arrayidx8, align 1
397 %2 = lshr i32 %m, 24
398 %conv11 = trunc i32 %2 to i8
399 %arrayidx12 = getelementptr inbounds i8, i8* %p, i64 -1
400 store i8 %conv11, i8* %arrayidx12, align 1
401 ret void
402 }
403 ; i32 m;
404 ; i8* p;
405 ; p[-3] = (m >> 16) & 0xFF;
406 ; p[-4] = (m >> 24) & 0xFF;
407 ; p[-2] = (m >> 8) & 0xFF;
408 ; p[-1] = (m >> 0) & 0xFF;
409 define void @store_i32_by_i8_bswap_neg_offset(i32 signext %m, i8* %p) {
410 ; CHECK-PPC64LE-LABEL: store_i32_by_i8_bswap_neg_offset:
411 ; CHECK-PPC64LE: # %bb.0: # %entry
412 ; CHECK-PPC64LE-NEXT: addi [[REG1:[0-9]+]], 4, -4
413 ; CHECK-PPC64LE-NEXT: stwbrx 3, 0, [[REG1]]
414 ; CHECK-PPC64LE-NEXT: blr
415 ;
416 ; CHECK-PPC64-LABEL: store_i32_by_i8_bswap_neg_offset:
417 ; CHECK-PPC64: # %bb.0: # %entry
418 ; CHECK-PPC64-NEXT: stw 3, -4(4)
419 ; CHECK-PPC64-NEXT: blr
420 entry:
421 %0 = lshr i32 %m, 16
422 %conv = trunc i32 %0 to i8
423 %arrayidx = getelementptr inbounds i8, i8* %p, i64 -3
424 store i8 %conv, i8* %arrayidx, align 1
425 %1 = lshr i32 %m, 24
426 %conv3 = trunc i32 %1 to i8
427 %arrayidx4 = getelementptr inbounds i8, i8* %p, i64 -4
428 store i8 %conv3, i8* %arrayidx4, align 1
429 %2 = lshr i32 %m, 8
430 %conv7 = trunc i32 %2 to i8
431 %arrayidx8 = getelementptr inbounds i8, i8* %p, i64 -2
432 store i8 %conv7, i8* %arrayidx8, align 1
433 %conv11 = trunc i32 %m to i8
434 %arrayidx12 = getelementptr inbounds i8, i8* %p, i64 -1
435 store i8 %conv11, i8* %arrayidx12, align 1
436 ret void
437 }
438 ; i32 m, i;
439 ; i8* p;
440 ; p[i-3] = (m >> 16) & 0xFF;
441 ; p[i-4] = (m >> 24) & 0xFF;
442 ; p[i-2] = (m >> 8) & 0xFF;
443 ; p[i-1] = (m >> 0) & 0xFF;
444 define void @store_i32_by_i8_bswap_base_index_offset(i32 %m, i32 %i, i8* %p) {
445 ; CHECK-PPC64LE-LABEL: store_i32_by_i8_bswap_base_index_offset:
446 ; CHECK-PPC64LE: # %bb.0: # %entry
447 ; CHECK-PPC64LE-NEXT: extsw [[REG1:[0-9]+]], 4
448 ; CHECK-PPC64LE-NEXT: add [[REG2:[0-9]+]], 5, [[REG1]]
449 ; CHECK-PPC64LE-NEXT: addi [[REG3:[0-9]+]], [[REG2]], -4
450 ; CHECK-PPC64LE-NEXT: stwbrx 3, 0, [[REG3]]
451 ; CHECK-PPC64LE-NEXT: blr
452 ;
453 ; CHECK-PPC64-LABEL: store_i32_by_i8_bswap_base_index_offset:
454 ; CHECK-PPC64: # %bb.0: # %entry
455 ; CHECK-PPC64-NEXT: extsw [[REG1:[0-9]+]], 4
456 ; CHECK-PPC64-NEXT: add [[REG2:[0-9]+]], 5, [[REG1]]
457 ; CHECK-PPC64-NEXT: stw 3, -4([[REG2]])
458 ; CHECK-PPC64-NEXT: blr
459 entry:
460 %0 = lshr i32 %m, 16
461 %conv = trunc i32 %0 to i8
462 %sub = add nsw i32 %i, -3
463 %idxprom = sext i32 %sub to i64
464 %arrayidx = getelementptr inbounds i8, i8* %p, i64 %idxprom
465 store i8 %conv, i8* %arrayidx, align 1
466 %1 = lshr i32 %m, 24
467 %conv3 = trunc i32 %1 to i8
468 %sub4 = add nsw i32 %i, -4
469 %idxprom5 = sext i32 %sub4 to i64
470 %arrayidx6 = getelementptr inbounds i8, i8* %p, i64 %idxprom5
471 store i8 %conv3, i8* %arrayidx6, align 1
472 %2 = lshr i32 %m, 8
473 %conv9 = trunc i32 %2 to i8
474 %sub10 = add nsw i32 %i, -2
475 %idxprom11 = sext i32 %sub10 to i64
476 %arrayidx12 = getelementptr inbounds i8, i8* %p, i64 %idxprom11
477 store i8 %conv9, i8* %arrayidx12, align 1
478 %conv15 = trunc i32 %m to i8
479 %sub16 = add nsw i32 %i, -1
480 %idxprom17 = sext i32 %sub16 to i64
481 %arrayidx18 = getelementptr inbounds i8, i8* %p, i64 %idxprom17
482 store i8 %conv15, i8* %arrayidx18, align 1
483 ret void
484 }
486 ; i8* p;
487 ; i32 i, m;
488 ; i8* p0 = p + i;
489 ; i8* p1 = p + i + 1;
490 ; i8* p2 = p + i + 2;
491 ; i8 *p3 = p + i + 3;
492 ; p0[3] = (m >> 24) & 0xFF;
493 ; p1[3] = (m >> 16) & 0xFF;
494 ; p2[3] = (m >> 8) & 0xFF;
495 ; p3[3] = (m >> 0) & 0xFF;
496 define void @store_i32_by_i8_bswap_complicated(i32 %m, i32 %i, i8* %p) {
497 ; CHECK-PPC64LE-LABEL: store_i32_by_i8_bswap_complicated:
498 ; CHECK-PPC64LE: # %bb.0: # %entry
499 ; CHECK-PPC64LE-NEXT: extsw [[REG1:[0-9]+]], 4
500 ; CHECK-PPC64LE-NEXT: add [[REG2:[0-9]+]], 5, [[REG1]]
501 ; CHECK-PPC64LE-NEXT: addi [[REG3:[0-9]+]], [[REG2]], 3
502 ; CHECK-PPC64LE-NEXT: stwbrx 3, 0, [[REG3]]
503 ; CHECK-PPC64LE-NEXT: blr
504 ;
505 ; CHECK-PPC64-LABEL: store_i32_by_i8_bswap_complicated:
506 ; CHECK-PPC64: # %bb.0: # %entry
507 ; CHECK-PPC64-NEXT: extsw [[REG1:[0-9]+]], 4
508 ; CHECK-PPC64-NEXT: add [[REG2:[0-9]+]], 5, [[REG1]]
509 ; CHECK-PPC64-NEXT: stw 3, 3([[REG2]])
510 ; CHECK-PPC64-NEXT: blr
511 entry:
512 %idx.ext = sext i32 %i to i64
513 %add.ptr = getelementptr inbounds i8, i8* %p, i64 %idx.ext
514 %add.ptr3 = getelementptr inbounds i8, i8* %add.ptr, i64 1
515 %add.ptr6 = getelementptr inbounds i8, i8* %add.ptr, i64 2
516 %add.ptr9 = getelementptr inbounds i8, i8* %add.ptr, i64 3
517 %0 = lshr i32 %m, 24
518 %conv = trunc i32 %0 to i8
519 store i8 %conv, i8* %add.ptr9, align 1
520 %1 = lshr i32 %m, 16
521 %conv12 = trunc i32 %1 to i8
522 %arrayidx13 = getelementptr inbounds i8, i8* %add.ptr3, i64 3
523 store i8 %conv12, i8* %arrayidx13, align 1
524 %2 = lshr i32 %m, 8
525 %conv16 = trunc i32 %2 to i8
526 %arrayidx17 = getelementptr inbounds i8, i8* %add.ptr6, i64 3
527 store i8 %conv16, i8* %arrayidx17, align 1
528 %conv20 = trunc i32 %m to i8
529 %arrayidx21 = getelementptr inbounds i8, i8* %add.ptr9, i64 3
530 store i8 %conv20, i8* %arrayidx21, align 1
531 ret void
532 }
533 ; i8* p; i32 m;
534 ; p[0] = (m >> 8) & 0xFF;
535 ; p[1] = (m >> 0) & 0xFF;
536 define void @store_i16_by_i8_bswap(i16 %m, i8* %p) {
537 ; CHECK-PPC64LE-LABEL: store_i16_by_i8_bswap:
538 ; CHECK-PPC64LE: # %bb.0: # %entry
539 ; CHECK-PPC64LE-NEXT: sthbrx 3, 0, 4
540 ; CHECK-PPC64LE-NEXT: blr
541 ;
542 ; CHECK-PPC64-LABEL: store_i16_by_i8_bswap:
543 ; CHECK-PPC64: # %bb.0: # %entry
544 ; CHECK-PPC64-NEXT: sth 3, 0(4)
545 ; CHECK-PPC64-NEXT: blr
546 entry:
547 %0 = lshr i16 %m, 8
548 %conv1 = trunc i16 %0 to i8
549 store i8 %conv1, i8* %p, align 1
550 %conv5 = trunc i16 %m to i8
551 %arrayidx6 = getelementptr inbounds i8, i8* %p, i64 1
552 store i8 %conv5, i8* %arrayidx6, align 1
553 ret void
554 }
555 ; i8* p; i32 m;
556 ; p[0] = (m >> 0) & 0xFF;
557 ; p[1] = (m >> 8) & 0xFF;
558 define void @store_16_by_i8(i16 %m, i8* %p) {
559 ; CHECK-PPC64LE-LABEL: store_16_by_i8:
560 ; CHECK-PPC64LE: # %bb.0: # %entry
561 ; CHECK-PPC64LE-NEXT: sth 3, 0(4)
562 ; CHECK-PPC64LE-NEXT: blr
563 ;
564 ; CHECK-PPC64-LABEL: store_16_by_i8:
565 ; CHECK-PPC64: # %bb.0: # %entry
566 ; CHECK-PPC64-NEXT: sthbrx 3, 0, 4
567 ; CHECK-PPC64-NEXT: blr
568 entry:
569 %conv1 = trunc i16 %m to i8
570 store i8 %conv1, i8* %p, align 1
571 %0 = lshr i16 %m, 8
572 %conv5 = trunc i16 %0 to i8
573 %arrayidx6 = getelementptr inbounds i8, i8* %p, i64 1
574 store i8 %conv5, i8* %arrayidx6, align 1
575 ret void
576 }
577 ; This was found when testing the hexxagon in testsuite
578 ; i8* p; i8 v;
579 ; p[0] = v;
580 ; p[1] = v;
581 define void @store_same_value_to_consecutive_mem(i8* %p, i8 zeroext %v) {
582 ; CHECK-PPC64LE-LABEL: store_same_value_to_consecutive_mem
583 ; CHECK-PPC64LE: # %bb.0: # %entry
584 ; CHECK-PPC64LE-NEXT: stb 4, 0(3)
585 ; CHECK-PPC64LE-NEXT: stb 4, 1(3)
586 ;
587 ; CHECK-PPC64-LABEL: store_same_value_to_consecutive_mem
588 ; CHECK-PPC64: # %bb.0: # %entry
589 ; CHECK-PPC64-NEXT: stb 4, 0(3)
590 ; CHECK-PPC64-NEXT: stb 4, 1(3)
591 entry:
592 store i8 %v, i8* %p, align 1
593 %arrayidx1 = getelementptr inbounds i8, i8* %p, i64 1
594 store i8 %v, i8* %arrayidx1, align 1
595 ret void
596 }