test/MC/RISCV/fde-reloc.s

   1 # RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+relax < %s \
   2 # RUN:     | llvm-readobj -r | FileCheck -check-prefix=RELAX-RELOC %s
   3 # RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=-relax < %s \
   4 # RUN:     | llvm-readobj -r | FileCheck -check-prefix=NORELAX-RELOC %s
   5
   6 func:
   7         .cfi_startproc
   8   ret
   9         .cfi_endproc
  10
  11 # TODO: Should produce R_RISCV_32_PCREL for the FDE pc relocation. Many of the
  12 # ADD32/SUB32 relocations also can be safely resolved even with linker
  13 # relaxation enabled. This test is written to capture current behaviour, in
  14 # preparation for follow-on patches to fix it.
  15
  16 # RELAX-RELOC:   Section (4) .rela.eh_frame {
  17 # RELAX-RELOC-NEXT:   0x0 R_RISCV_32 - 0x10
  18 # RELAX-RELOC-NEXT:   0x14 R_RISCV_32 - 0x10
  19 # RELAX-RELOC-NEXT:   0x18 R_RISCV_32 - 0x18
  20 # RELAX-RELOC-NEXT:   0x1C R_RISCV_ADD32 - 0x0
  21 # RELAX-RELOC-NEXT:   0x1C R_RISCV_SUB32 - 0x0
  22 # RELAX-RELOC-NEXT:   0x20 R_RISCV_ADD32 - 0x0
  23 # RELAX-RELOC-NEXT:   0x20 R_RISCV_SUB32 - 0x0
  24 # RELAX-RELOC-NEXT: }
  25
  26 # NORELAX-RELOC:        Section (4) .rela.eh_frame {
  27 # NORELAX-RELOC-NEXT:    0x1C R_RISCV_32_PCREL - 0x0
  28 # NORELAX-RELOC-NEXT:  }