include/llvm/CodeGen/MachineInstrBuilder.h

   1 //===- CodeGen/MachineInstrBuilder.h - Simplify creation of MIs --*- C++ -*-===//
   2 //
   3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
   4 // See https://llvm.org/LICENSE.txt for license information.
   5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
   6 //
   7 //===----------------------------------------------------------------------===//
   8 //
   9 // This file exposes a function named BuildMI, which is useful for dramatically
  10 // simplifying how MachineInstr's are created.  It allows use of code like this:
  11 //
  12 //   M = BuildMI(MBB, MI, DL, TII.get(X86::ADD8rr), Dst)
  13 //           .addReg(argVal1)
  14 //           .addReg(argVal2);
  15 //
  16 //===----------------------------------------------------------------------===//
  17
  18 #ifndef LLVM_CODEGEN_MACHINEINSTRBUILDER_H
  19 #define LLVM_CODEGEN_MACHINEINSTRBUILDER_H
  20
  21 #include "llvm/ADT/ArrayRef.h"
  22 #include "llvm/CodeGen/GlobalISel/Utils.h"
  23 #include "llvm/CodeGen/MachineBasicBlock.h"
  24 #include "llvm/CodeGen/MachineFunction.h"
  25 #include "llvm/CodeGen/MachineInstr.h"
  26 #include "llvm/CodeGen/MachineInstrBundle.h"
  27 #include "llvm/CodeGen/MachineOperand.h"
  28 #include "llvm/CodeGen/TargetRegisterInfo.h"
  29 #include "llvm/IR/InstrTypes.h"
  30 #include "llvm/IR/Intrinsics.h"
  31 #include "llvm/Support/ErrorHandling.h"
  32 #include <cassert>
  33 #include <cstdint>
  34 #include <utility>
  35
  36 namespace llvm {
  37
  38 class MCInstrDesc;
  39 class MDNode;
  40
  41 namespace RegState {
  42
  43   enum {
  44     Define         = 0x2,
  45     Implicit       = 0x4,
  46     Kill           = 0x8,
  47     Dead           = 0x10,
  48     Undef          = 0x20,
  49     EarlyClobber   = 0x40,
  50     Debug          = 0x80,
  51     InternalRead   = 0x100,
  52     Renamable      = 0x200,
  53     DefineNoRead   = Define | Undef,
  54     ImplicitDefine = Implicit | Define,
  55     ImplicitKill   = Implicit | Kill
  56   };
  57
  58 } // end namespace RegState
  59
  60 class MachineInstrBuilder {
  61   MachineFunction *MF = nullptr;
  62   MachineInstr *MI = nullptr;
  63
  64 public:
  65   MachineInstrBuilder() = default;
  66
  67   /// Create a MachineInstrBuilder for manipulating an existing instruction.
  68   /// F must be the machine function that was used to allocate I.
  69   MachineInstrBuilder(MachineFunction &F, MachineInstr *I) : MF(&F), MI(I) {}
  70   MachineInstrBuilder(MachineFunction &F, MachineBasicBlock::iterator I)
  71       : MF(&F), MI(&*I) {}
  72
  73   /// Allow automatic conversion to the machine instruction we are working on.
  74   operator MachineInstr*() const { return MI; }
  75   MachineInstr *operator->() const { return MI; }
  76   operator MachineBasicBlock::iterator() const { return MI; }
  77
  78   /// If conversion operators fail, use this method to get the MachineInstr
  79   /// explicitly.
  80   MachineInstr *getInstr() const { return MI; }
  81
  82   /// Get the register for the operand index.
  83   /// The operand at the index should be a register (asserted by
  84   /// MachineOperand).
  85   unsigned getReg(unsigned Idx) { return MI->getOperand(Idx).getReg(); }
  86
  87   /// Add a new virtual register operand.
  88   const MachineInstrBuilder &addReg(unsigned RegNo, unsigned flags = 0,
  89                                     unsigned SubReg = 0) const {
  90     assert((flags & 0x1) == 0 &&
  91            "Passing in 'true' to addReg is forbidden! Use enums instead.");
  92     MI->addOperand(*MF, MachineOperand::CreateReg(RegNo,
  93                                                flags & RegState::Define,
  94                                                flags & RegState::Implicit,
  95                                                flags & RegState::Kill,
  96                                                flags & RegState::Dead,
  97                                                flags & RegState::Undef,
  98                                                flags & RegState::EarlyClobber,
  99                                                SubReg,
 100                                                flags & RegState::Debug,
 101                                                flags & RegState::InternalRead,
 102                                                flags & RegState::Renamable));
 103     return *this;
 104   }
 105
 106   /// Add a virtual register definition operand.
 107   const MachineInstrBuilder &addDef(unsigned RegNo, unsigned Flags = 0,
 108                                     unsigned SubReg = 0) const {
 109     return addReg(RegNo, Flags | RegState::Define, SubReg);
 110   }
 111
 112   /// Add a virtual register use operand. It is an error for Flags to contain
 113   /// `RegState::Define` when calling this function.
 114   const MachineInstrBuilder &addUse(unsigned RegNo, unsigned Flags = 0,
 115                                     unsigned SubReg = 0) const {
 116     assert(!(Flags & RegState::Define) &&
 117            "Misleading addUse defines register, use addReg instead.");
 118     return addReg(RegNo, Flags, SubReg);
 119   }
 120
 121   /// Add a new immediate operand.
 122   const MachineInstrBuilder &addImm(int64_t Val) const {
 123     MI->addOperand(*MF, MachineOperand::CreateImm(Val));
 124     return *this;
 125   }
 126
 127   const MachineInstrBuilder &addCImm(const ConstantInt *Val) const {
 128     MI->addOperand(*MF, MachineOperand::CreateCImm(Val));
 129     return *this;
 130   }
 131
 132   const MachineInstrBuilder &addFPImm(const ConstantFP *Val) const {
 133     MI->addOperand(*MF, MachineOperand::CreateFPImm(Val));
 134     return *this;
 135   }
 136
 137   const MachineInstrBuilder &addMBB(MachineBasicBlock *MBB,
 138                                     unsigned char TargetFlags = 0) const {
 139     MI->addOperand(*MF, MachineOperand::CreateMBB(MBB, TargetFlags));
 140     return *this;
 141   }
 142
 143   const MachineInstrBuilder &addFrameIndex(int Idx) const {
 144     MI->addOperand(*MF, MachineOperand::CreateFI(Idx));
 145     return *this;
 146   }
 147
 148   const MachineInstrBuilder &addConstantPoolIndex(unsigned Idx,
 149                                                   int Offset = 0,
 150                                           unsigned char TargetFlags = 0) const {
 151     MI->addOperand(*MF, MachineOperand::CreateCPI(Idx, Offset, TargetFlags));
 152     return *this;
 153   }
 154
 155   const MachineInstrBuilder &addTargetIndex(unsigned Idx, int64_t Offset = 0,
 156                                           unsigned char TargetFlags = 0) const {
 157     MI->addOperand(*MF, MachineOperand::CreateTargetIndex(Idx, Offset,
 158                                                           TargetFlags));
 159     return *this;
 160   }
 161
 162   const MachineInstrBuilder &addJumpTableIndex(unsigned Idx,
 163                                           unsigned char TargetFlags = 0) const {
 164     MI->addOperand(*MF, MachineOperand::CreateJTI(Idx, TargetFlags));
 165     return *this;
 166   }
 167
 168   const MachineInstrBuilder &addGlobalAddress(const GlobalValue *GV,
 169                                               int64_t Offset = 0,
 170                                           unsigned char TargetFlags = 0) const {
 171     MI->addOperand(*MF, MachineOperand::CreateGA(GV, Offset, TargetFlags));
 172     return *this;
 173   }
 174
 175   const MachineInstrBuilder &addExternalSymbol(const char *FnName,
 176                                           unsigned char TargetFlags = 0) const {
 177     MI->addOperand(*MF, MachineOperand::CreateES(FnName, TargetFlags));
 178     return *this;
 179   }
 180
 181   const MachineInstrBuilder &addBlockAddress(const BlockAddress *BA,
 182                                              int64_t Offset = 0,
 183                                           unsigned char TargetFlags = 0) const {
 184     MI->addOperand(*MF, MachineOperand::CreateBA(BA, Offset, TargetFlags));
 185     return *this;
 186   }
 187
 188   const MachineInstrBuilder &addRegMask(const uint32_t *Mask) const {
 189     MI->addOperand(*MF, MachineOperand::CreateRegMask(Mask));
 190     return *this;
 191   }
 192
 193   const MachineInstrBuilder &addMemOperand(MachineMemOperand *MMO) const {
 194     MI->addMemOperand(*MF, MMO);
 195     return *this;
 196   }
 197
 198   const MachineInstrBuilder &
 199   setMemRefs(ArrayRef<MachineMemOperand *> MMOs) const {
 200     MI->setMemRefs(*MF, MMOs);
 201     return *this;
 202   }
 203
 204   const MachineInstrBuilder &cloneMemRefs(const MachineInstr &OtherMI) const {
 205     MI->cloneMemRefs(*MF, OtherMI);
 206     return *this;
 207   }
 208
 209   const MachineInstrBuilder &
 210   cloneMergedMemRefs(ArrayRef<const MachineInstr *> OtherMIs) const {
 211     MI->cloneMergedMemRefs(*MF, OtherMIs);
 212     return *this;
 213   }
 214
 215   const MachineInstrBuilder &add(const MachineOperand &MO) const {
 216     MI->addOperand(*MF, MO);
 217     return *this;
 218   }
 219
 220   const MachineInstrBuilder &add(ArrayRef<MachineOperand> MOs) const {
 221     for (const MachineOperand &MO : MOs) {
 222       MI->addOperand(*MF, MO);
 223     }
 224     return *this;
 225   }
 226
 227   const MachineInstrBuilder &addMetadata(const MDNode *MD) const {
 228     MI->addOperand(*MF, MachineOperand::CreateMetadata(MD));
 229     assert((MI->isDebugValue() ? static_cast<bool>(MI->getDebugVariable())
 230                                : true) &&
 231            "first MDNode argument of a DBG_VALUE not a variable");
 232     assert((MI->isDebugLabel() ? static_cast<bool>(MI->getDebugLabel())
 233                                : true) &&
 234            "first MDNode argument of a DBG_LABEL not a label");
 235     return *this;
 236   }
 237
 238   const MachineInstrBuilder &addCFIIndex(unsigned CFIIndex) const {
 239     MI->addOperand(*MF, MachineOperand::CreateCFIIndex(CFIIndex));
 240     return *this;
 241   }
 242
 243   const MachineInstrBuilder &addIntrinsicID(Intrinsic::ID ID) const {
 244     MI->addOperand(*MF, MachineOperand::CreateIntrinsicID(ID));
 245     return *this;
 246   }
 247
 248   const MachineInstrBuilder &addPredicate(CmpInst::Predicate Pred) const {
 249     MI->addOperand(*MF, MachineOperand::CreatePredicate(Pred));
 250     return *this;
 251   }
 252
 253   const MachineInstrBuilder &addSym(MCSymbol *Sym,
 254                                     unsigned char TargetFlags = 0) const {
 255     MI->addOperand(*MF, MachineOperand::CreateMCSymbol(Sym, TargetFlags));
 256     return *this;
 257   }
 258
 259   const MachineInstrBuilder &setMIFlags(unsigned Flags) const {
 260     MI->setFlags(Flags);
 261     return *this;
 262   }
 263
 264   const MachineInstrBuilder &setMIFlag(MachineInstr::MIFlag Flag) const {
 265     MI->setFlag(Flag);
 266     return *this;
 267   }
 268
 269   // Add a displacement from an existing MachineOperand with an added offset.
 270   const MachineInstrBuilder &addDisp(const MachineOperand &Disp, int64_t off,
 271                                      unsigned char TargetFlags = 0) const {
 272     // If caller specifies new TargetFlags then use it, otherwise the
 273     // default behavior is to copy the target flags from the existing
 274     // MachineOperand. This means if the caller wants to clear the
 275     // target flags it needs to do so explicitly.
 276     if (0 == TargetFlags)
 277       TargetFlags = Disp.getTargetFlags();
 278
 279     switch (Disp.getType()) {
 280       default:
 281         llvm_unreachable("Unhandled operand type in addDisp()");
 282       case MachineOperand::MO_Immediate:
 283         return addImm(Disp.getImm() + off);
 284       case MachineOperand::MO_ConstantPoolIndex:
 285         return addConstantPoolIndex(Disp.getIndex(), Disp.getOffset() + off,
 286                                     TargetFlags);
 287       case MachineOperand::MO_GlobalAddress:
 288         return addGlobalAddress(Disp.getGlobal(), Disp.getOffset() + off,
 289                                 TargetFlags);
 290     }
 291   }
 292
 293   /// Copy all the implicit operands from OtherMI onto this one.
 294   const MachineInstrBuilder &
 295   copyImplicitOps(const MachineInstr &OtherMI) const {
 296     MI->copyImplicitOps(*MF, OtherMI);
 297     return *this;
 298   }
 299
 300   bool constrainAllUses(const TargetInstrInfo &TII,
 301                         const TargetRegisterInfo &TRI,
 302                         const RegisterBankInfo &RBI) const {
 303     return constrainSelectedInstRegOperands(*MI, TII, TRI, RBI);
 304   }
 305 };
 306
 307 /// Builder interface. Specify how to create the initial instruction itself.
 308 inline MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL,
 309                                    const MCInstrDesc &MCID) {
 310   return MachineInstrBuilder(MF, MF.CreateMachineInstr(MCID, DL));
 311 }
 312
 313 /// This version of the builder sets up the first operand as a
 314 /// destination virtual register.
 315 inline MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL,
 316                                    const MCInstrDesc &MCID, unsigned DestReg) {
 317   return MachineInstrBuilder(MF, MF.CreateMachineInstr(MCID, DL))
 318            .addReg(DestReg, RegState::Define);
 319 }
 320
 321 /// This version of the builder inserts the newly-built instruction before
 322 /// the given position in the given MachineBasicBlock, and sets up the first
 323 /// operand as a destination virtual register.
 324 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
 325                                    MachineBasicBlock::iterator I,
 326                                    const DebugLoc &DL, const MCInstrDesc &MCID,
 327                                    unsigned DestReg) {
 328   MachineFunction &MF = *BB.getParent();
 329   MachineInstr *MI = MF.CreateMachineInstr(MCID, DL);
 330   BB.insert(I, MI);
 331   return MachineInstrBuilder(MF, MI).addReg(DestReg, RegState::Define);
 332 }
 333
 334 /// This version of the builder inserts the newly-built instruction before
 335 /// the given position in the given MachineBasicBlock, and sets up the first
 336 /// operand as a destination virtual register.
 337 ///
 338 /// If \c I is inside a bundle, then the newly inserted \a MachineInstr is
 339 /// added to the same bundle.
 340 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
 341                                    MachineBasicBlock::instr_iterator I,
 342                                    const DebugLoc &DL, const MCInstrDesc &MCID,
 343                                    unsigned DestReg) {
 344   MachineFunction &MF = *BB.getParent();
 345   MachineInstr *MI = MF.CreateMachineInstr(MCID, DL);
 346   BB.insert(I, MI);
 347   return MachineInstrBuilder(MF, MI).addReg(DestReg, RegState::Define);
 348 }
 349
 350 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB, MachineInstr &I,
 351                                    const DebugLoc &DL, const MCInstrDesc &MCID,
 352                                    unsigned DestReg) {
 353   // Calling the overload for instr_iterator is always correct.  However, the
 354   // definition is not available in headers, so inline the check.
 355   if (I.isInsideBundle())
 356     return BuildMI(BB, MachineBasicBlock::instr_iterator(I), DL, MCID, DestReg);
 357   return BuildMI(BB, MachineBasicBlock::iterator(I), DL, MCID, DestReg);
 358 }
 359
 360 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB, MachineInstr *I,
 361                                    const DebugLoc &DL, const MCInstrDesc &MCID,
 362                                    unsigned DestReg) {
 363   return BuildMI(BB, *I, DL, MCID, DestReg);
 364 }
 365
 366 /// This version of the builder inserts the newly-built instruction before the
 367 /// given position in the given MachineBasicBlock, and does NOT take a
 368 /// destination register.
 369 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
 370                                    MachineBasicBlock::iterator I,
 371                                    const DebugLoc &DL,
 372                                    const MCInstrDesc &MCID) {
 373   MachineFunction &MF = *BB.getParent();
 374   MachineInstr *MI = MF.CreateMachineInstr(MCID, DL);
 375   BB.insert(I, MI);
 376   return MachineInstrBuilder(MF, MI);
 377 }
 378
 379 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
 380                                    MachineBasicBlock::instr_iterator I,
 381                                    const DebugLoc &DL,
 382                                    const MCInstrDesc &MCID) {
 383   MachineFunction &MF = *BB.getParent();
 384   MachineInstr *MI = MF.CreateMachineInstr(MCID, DL);
 385   BB.insert(I, MI);
 386   return MachineInstrBuilder(MF, MI);
 387 }
 388
 389 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB, MachineInstr &I,
 390                                    const DebugLoc &DL,
 391                                    const MCInstrDesc &MCID) {
 392   // Calling the overload for instr_iterator is always correct.  However, the
 393   // definition is not available in headers, so inline the check.
 394   if (I.isInsideBundle())
 395     return BuildMI(BB, MachineBasicBlock::instr_iterator(I), DL, MCID);
 396   return BuildMI(BB, MachineBasicBlock::iterator(I), DL, MCID);
 397 }
 398
 399 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB, MachineInstr *I,
 400                                    const DebugLoc &DL,
 401                                    const MCInstrDesc &MCID) {
 402   return BuildMI(BB, *I, DL, MCID);
 403 }
 404
 405 /// This version of the builder inserts the newly-built instruction at the end
 406 /// of the given MachineBasicBlock, and does NOT take a destination register.
 407 inline MachineInstrBuilder BuildMI(MachineBasicBlock *BB, const DebugLoc &DL,
 408                                    const MCInstrDesc &MCID) {
 409   return BuildMI(*BB, BB->end(), DL, MCID);
 410 }
 411
 412 /// This version of the builder inserts the newly-built instruction at the
 413 /// end of the given MachineBasicBlock, and sets up the first operand as a
 414 /// destination virtual register.
 415 inline MachineInstrBuilder BuildMI(MachineBasicBlock *BB, const DebugLoc &DL,
 416                                    const MCInstrDesc &MCID, unsigned DestReg) {
 417   return BuildMI(*BB, BB->end(), DL, MCID, DestReg);
 418 }
 419
 420 /// This version of the builder builds a DBG_VALUE intrinsic
 421 /// for either a value in a register or a register-indirect
 422 /// address.  The convention is that a DBG_VALUE is indirect iff the
 423 /// second operand is an immediate.
 424 MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL,
 425                             const MCInstrDesc &MCID, bool IsIndirect,
 426                             unsigned Reg, const MDNode *Variable,
 427                             const MDNode *Expr);
 428
 429 /// This version of the builder builds a DBG_VALUE intrinsic
 430 /// for a MachineOperand.
 431 MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL,
 432                             const MCInstrDesc &MCID, bool IsIndirect,
 433                             MachineOperand &MO, const MDNode *Variable,
 434                             const MDNode *Expr);
 435
 436 /// This version of the builder builds a DBG_VALUE intrinsic
 437 /// for either a value in a register or a register-indirect
 438 /// address and inserts it at position I.
 439 MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
 440                             MachineBasicBlock::iterator I, const DebugLoc &DL,
 441                             const MCInstrDesc &MCID, bool IsIndirect,
 442                             unsigned Reg, const MDNode *Variable,
 443                             const MDNode *Expr);
 444
 445 /// This version of the builder builds a DBG_VALUE intrinsic
 446 /// for a machine operand and inserts it at position I.
 447 MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
 448                             MachineBasicBlock::iterator I, const DebugLoc &DL,
 449                             const MCInstrDesc &MCID, bool IsIndirect,
 450                             MachineOperand &MO, const MDNode *Variable,
 451                             const MDNode *Expr);
 452
 453 /// Clone a DBG_VALUE whose value has been spilled to FrameIndex.
 454 MachineInstr *buildDbgValueForSpill(MachineBasicBlock &BB,
 455                                     MachineBasicBlock::iterator I,
 456                                     const MachineInstr &Orig, int FrameIndex);
 457
 458 /// Update a DBG_VALUE whose value has been spilled to FrameIndex. Useful when
 459 /// modifying an instruction in place while iterating over a basic block.
 460 void updateDbgValueForSpill(MachineInstr &Orig, int FrameIndex);
 461
 462 inline unsigned getDefRegState(bool B) {
 463   return B ? RegState::Define : 0;
 464 }
 465 inline unsigned getImplRegState(bool B) {
 466   return B ? RegState::Implicit : 0;
 467 }
 468 inline unsigned getKillRegState(bool B) {
 469   return B ? RegState::Kill : 0;
 470 }
 471 inline unsigned getDeadRegState(bool B) {
 472   return B ? RegState::Dead : 0;
 473 }
 474 inline unsigned getUndefRegState(bool B) {
 475   return B ? RegState::Undef : 0;
 476 }
 477 inline unsigned getInternalReadRegState(bool B) {
 478   return B ? RegState::InternalRead : 0;
 479 }
 480 inline unsigned getDebugRegState(bool B) {
 481   return B ? RegState::Debug : 0;
 482 }
 483 inline unsigned getRenamableRegState(bool B) {
 484   return B ? RegState::Renamable : 0;
 485 }
 486
 487 /// Get all register state flags from machine operand \p RegOp.
 488 inline unsigned getRegState(const MachineOperand &RegOp) {
 489   assert(RegOp.isReg() && "Not a register operand");
 490   return getDefRegState(RegOp.isDef())                    |
 491          getImplRegState(RegOp.isImplicit())              |
 492          getKillRegState(RegOp.isKill())                  |
 493          getDeadRegState(RegOp.isDead())                  |
 494          getUndefRegState(RegOp.isUndef())                |
 495          getInternalReadRegState(RegOp.isInternalRead())  |
 496          getDebugRegState(RegOp.isDebug())                |
 497          getRenamableRegState(
 498              TargetRegisterInfo::isPhysicalRegister(RegOp.getReg()) &&
 499              RegOp.isRenamable());
 500 }
 501
 502 /// Helper class for constructing bundles of MachineInstrs.
 503 ///
 504 /// MIBundleBuilder can create a bundle from scratch by inserting new
 505 /// MachineInstrs one at a time, or it can create a bundle from a sequence of
 506 /// existing MachineInstrs in a basic block.
 507 class MIBundleBuilder {
 508   MachineBasicBlock &MBB;
 509   MachineBasicBlock::instr_iterator Begin;
 510   MachineBasicBlock::instr_iterator End;
 511
 512 public:
 513   /// Create an MIBundleBuilder that inserts instructions into a new bundle in
 514   /// BB above the bundle or instruction at Pos.
 515   MIBundleBuilder(MachineBasicBlock &BB, MachineBasicBlock::iterator Pos)
 516       : MBB(BB), Begin(Pos.getInstrIterator()), End(Begin) {}
 517
 518   /// Create a bundle from the sequence of instructions between B and E.
 519   MIBundleBuilder(MachineBasicBlock &BB, MachineBasicBlock::iterator B,
 520                   MachineBasicBlock::iterator E)
 521       : MBB(BB), Begin(B.getInstrIterator()), End(E.getInstrIterator()) {
 522     assert(B != E && "No instructions to bundle");
 523     ++B;
 524     while (B != E) {
 525       MachineInstr &MI = *B;
 526       ++B;
 527       MI.bundleWithPred();
 528     }
 529   }
 530
 531   /// Create an MIBundleBuilder representing an existing instruction or bundle
 532   /// that has MI as its head.
 533   explicit MIBundleBuilder(MachineInstr *MI)
 534       : MBB(*MI->getParent()), Begin(MI),
 535         End(getBundleEnd(MI->getIterator())) {}
 536
 537   /// Return a reference to the basic block containing this bundle.
 538   MachineBasicBlock &getMBB() const { return MBB; }
 539
 540   /// Return true if no instructions have been inserted in this bundle yet.
 541   /// Empty bundles aren't representable in a MachineBasicBlock.
 542   bool empty() const { return Begin == End; }
 543
 544   /// Return an iterator to the first bundled instruction.
 545   MachineBasicBlock::instr_iterator begin() const { return Begin; }
 546
 547   /// Return an iterator beyond the last bundled instruction.
 548   MachineBasicBlock::instr_iterator end() const { return End; }
 549
 550   /// Insert MI into this bundle before I which must point to an instruction in
 551   /// the bundle, or end().
 552   MIBundleBuilder &insert(MachineBasicBlock::instr_iterator I,
 553                           MachineInstr *MI) {
 554     MBB.insert(I, MI);
 555     if (I == Begin) {
 556       if (!empty())
 557         MI->bundleWithSucc();
 558       Begin = MI->getIterator();
 559       return *this;
 560     }
 561     if (I == End) {
 562       MI->bundleWithPred();
 563       return *this;
 564     }
 565     // MI was inserted in the middle of the bundle, so its neighbors' flags are
 566     // already fine. Update MI's bundle flags manually.
 567     MI->setFlag(MachineInstr::BundledPred);
 568     MI->setFlag(MachineInstr::BundledSucc);
 569     return *this;
 570   }
 571
 572   /// Insert MI into MBB by prepending it to the instructions in the bundle.
 573   /// MI will become the first instruction in the bundle.
 574   MIBundleBuilder &prepend(MachineInstr *MI) {
 575     return insert(begin(), MI);
 576   }
 577
 578   /// Insert MI into MBB by appending it to the instructions in the bundle.
 579   /// MI will become the last instruction in the bundle.
 580   MIBundleBuilder &append(MachineInstr *MI) {
 581     return insert(end(), MI);
 582   }
 583 };
 584
 585 } // end namespace llvm
 586
 587 #endif // LLVM_CODEGEN_MACHINEINSTRBUILDER_H