1 //===-- SystemZOperators.td - SystemZ-specific operators ------*- tblgen-*-===//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
12 def SDT_CallSeqStart : SDCallSeqStart<[SDTCisVT<0, i64>,
14 def SDT_CallSeqEnd : SDCallSeqEnd<[SDTCisVT<0, i64>,
16 def SDT_ZCall : SDTypeProfile<0, -1, [SDTCisPtrTy<0>]>;
17 def SDT_ZCmp : SDTypeProfile<1, 2,
20 def SDT_ZICmp : SDTypeProfile<1, 3,
24 def SDT_ZBRCCMask : SDTypeProfile<0, 4,
29 def SDT_ZSelectCCMask : SDTypeProfile<1, 5,
35 def SDT_ZWrapPtr : SDTypeProfile<1, 1,
38 def SDT_ZWrapOffset : SDTypeProfile<1, 2,
42 def SDT_ZAdjDynAlloc : SDTypeProfile<1, 0, [SDTCisVT<0, i64>]>;
43 def SDT_ZGR128Binary : SDTypeProfile<1, 2,
44 [SDTCisVT<0, untyped>,
47 def SDT_ZBinaryWithFlags : SDTypeProfile<2, 2,
52 def SDT_ZBinaryWithCarry : SDTypeProfile<2, 3,
58 def SDT_ZAtomicLoadBinaryW : SDTypeProfile<1, 5,
65 def SDT_ZAtomicCmpSwapW : SDTypeProfile<2, 6,
74 def SDT_ZAtomicCmpSwap : SDTypeProfile<2, 3,
80 def SDT_ZAtomicLoad128 : SDTypeProfile<1, 1,
81 [SDTCisVT<0, untyped>,
83 def SDT_ZAtomicStore128 : SDTypeProfile<0, 2,
84 [SDTCisVT<0, untyped>,
86 def SDT_ZAtomicCmpSwap128 : SDTypeProfile<2, 3,
87 [SDTCisVT<0, untyped>,
91 SDTCisVT<4, untyped>]>;
92 def SDT_ZMemMemLength : SDTypeProfile<0, 3,
96 def SDT_ZMemMemLengthCC : SDTypeProfile<1, 3,
101 def SDT_ZMemMemLoop : SDTypeProfile<0, 4,
106 def SDT_ZMemMemLoopCC : SDTypeProfile<1, 4,
112 def SDT_ZString : SDTypeProfile<1, 3,
117 def SDT_ZStringCC : SDTypeProfile<2, 3,
123 def SDT_ZIPM : SDTypeProfile<1, 1,
126 def SDT_ZPrefetch : SDTypeProfile<0, 2,
129 def SDT_ZTBegin : SDTypeProfile<1, 2,
133 def SDT_ZTEnd : SDTypeProfile<1, 0,
135 def SDT_ZInsertVectorElt : SDTypeProfile<1, 3,
139 def SDT_ZExtractVectorElt : SDTypeProfile<1, 2,
142 def SDT_ZReplicate : SDTypeProfile<1, 1,
144 def SDT_ZVecUnaryConv : SDTypeProfile<1, 1,
147 def SDT_ZVecUnary : SDTypeProfile<1, 1,
149 SDTCisSameAs<0, 1>]>;
150 def SDT_ZVecUnaryCC : SDTypeProfile<2, 1,
153 SDTCisSameAs<0, 2>]>;
154 def SDT_ZVecBinary : SDTypeProfile<1, 2,
157 SDTCisSameAs<0, 2>]>;
158 def SDT_ZVecBinaryCC : SDTypeProfile<2, 2,
162 SDTCisSameAs<0, 2>]>;
163 def SDT_ZVecBinaryInt : SDTypeProfile<1, 2,
167 def SDT_ZVecBinaryConv : SDTypeProfile<1, 2,
170 SDTCisSameAs<1, 2>]>;
171 def SDT_ZVecBinaryConvCC : SDTypeProfile<2, 2,
175 SDTCisSameAs<2, 3>]>;
176 def SDT_ZVecBinaryConvIntCC : SDTypeProfile<2, 2,
181 def SDT_ZRotateMask : SDTypeProfile<1, 2,
185 def SDT_ZJoinDwords : SDTypeProfile<1, 2,
189 def SDT_ZVecTernary : SDTypeProfile<1, 3,
193 SDTCisSameAs<0, 3>]>;
194 def SDT_ZVecTernaryInt : SDTypeProfile<1, 3,
199 def SDT_ZVecTernaryIntCC : SDTypeProfile<2, 3,
205 def SDT_ZVecQuaternaryInt : SDTypeProfile<1, 4,
211 def SDT_ZVecQuaternaryIntCC : SDTypeProfile<2, 4,
218 def SDT_ZTest : SDTypeProfile<1, 2,
222 //===----------------------------------------------------------------------===//
224 //===----------------------------------------------------------------------===//
226 // These are target-independent nodes, but have target-specific formats.
227 def callseq_start : SDNode<"ISD::CALLSEQ_START", SDT_CallSeqStart,
228 [SDNPHasChain, SDNPSideEffect, SDNPOutGlue]>;
229 def callseq_end : SDNode<"ISD::CALLSEQ_END", SDT_CallSeqEnd,
230 [SDNPHasChain, SDNPSideEffect, SDNPOptInGlue,
232 def global_offset_table : SDNode<"ISD::GLOBAL_OFFSET_TABLE", SDTPtrLeaf>;
234 // Nodes for SystemZISD::*. See SystemZISelLowering.h for more details.
235 def z_retflag : SDNode<"SystemZISD::RET_FLAG", SDTNone,
236 [SDNPHasChain, SDNPOptInGlue, SDNPVariadic]>;
237 def z_call : SDNode<"SystemZISD::CALL", SDT_ZCall,
238 [SDNPHasChain, SDNPOutGlue, SDNPOptInGlue,
240 def z_sibcall : SDNode<"SystemZISD::SIBCALL", SDT_ZCall,
241 [SDNPHasChain, SDNPOutGlue, SDNPOptInGlue,
243 def z_tls_gdcall : SDNode<"SystemZISD::TLS_GDCALL", SDT_ZCall,
244 [SDNPHasChain, SDNPInGlue, SDNPOutGlue,
246 def z_tls_ldcall : SDNode<"SystemZISD::TLS_LDCALL", SDT_ZCall,
247 [SDNPHasChain, SDNPInGlue, SDNPOutGlue,
249 def z_pcrel_wrapper : SDNode<"SystemZISD::PCREL_WRAPPER", SDT_ZWrapPtr, []>;
250 def z_pcrel_offset : SDNode<"SystemZISD::PCREL_OFFSET",
251 SDT_ZWrapOffset, []>;
252 def z_iabs : SDNode<"SystemZISD::IABS", SDTIntUnaryOp, []>;
253 def z_icmp : SDNode<"SystemZISD::ICMP", SDT_ZICmp>;
254 def z_fcmp : SDNode<"SystemZISD::FCMP", SDT_ZCmp>;
255 def z_tm : SDNode<"SystemZISD::TM", SDT_ZICmp>;
256 def z_br_ccmask_1 : SDNode<"SystemZISD::BR_CCMASK", SDT_ZBRCCMask,
258 def z_select_ccmask_1 : SDNode<"SystemZISD::SELECT_CCMASK",
260 def z_ipm_1 : SDNode<"SystemZISD::IPM", SDT_ZIPM>;
261 def z_adjdynalloc : SDNode<"SystemZISD::ADJDYNALLOC", SDT_ZAdjDynAlloc>;
262 def z_popcnt : SDNode<"SystemZISD::POPCNT", SDTIntUnaryOp>;
263 def z_smul_lohi : SDNode<"SystemZISD::SMUL_LOHI", SDT_ZGR128Binary>;
264 def z_umul_lohi : SDNode<"SystemZISD::UMUL_LOHI", SDT_ZGR128Binary>;
265 def z_sdivrem : SDNode<"SystemZISD::SDIVREM", SDT_ZGR128Binary>;
266 def z_udivrem : SDNode<"SystemZISD::UDIVREM", SDT_ZGR128Binary>;
267 def z_saddo : SDNode<"SystemZISD::SADDO", SDT_ZBinaryWithFlags>;
268 def z_ssubo : SDNode<"SystemZISD::SSUBO", SDT_ZBinaryWithFlags>;
269 def z_uaddo : SDNode<"SystemZISD::UADDO", SDT_ZBinaryWithFlags>;
270 def z_usubo : SDNode<"SystemZISD::USUBO", SDT_ZBinaryWithFlags>;
271 def z_addcarry_1 : SDNode<"SystemZISD::ADDCARRY", SDT_ZBinaryWithCarry>;
272 def z_subcarry_1 : SDNode<"SystemZISD::SUBCARRY", SDT_ZBinaryWithCarry>;
274 def z_membarrier : SDNode<"SystemZISD::MEMBARRIER", SDTNone,
275 [SDNPHasChain, SDNPSideEffect]>;
277 def z_loadbswap : SDNode<"SystemZISD::LRV", SDTLoad,
278 [SDNPHasChain, SDNPMayLoad, SDNPMemOperand]>;
279 def z_storebswap : SDNode<"SystemZISD::STRV", SDTStore,
280 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
282 def z_tdc : SDNode<"SystemZISD::TDC", SDT_ZTest>;
284 // Defined because the index is an i32 rather than a pointer.
285 def z_vector_insert : SDNode<"ISD::INSERT_VECTOR_ELT",
286 SDT_ZInsertVectorElt>;
287 def z_vector_extract : SDNode<"ISD::EXTRACT_VECTOR_ELT",
288 SDT_ZExtractVectorElt>;
289 def z_rotate_mask : SDNode<"SystemZISD::ROTATE_MASK", SDT_ZRotateMask>;
290 def z_replicate : SDNode<"SystemZISD::REPLICATE", SDT_ZReplicate>;
291 def z_join_dwords : SDNode<"SystemZISD::JOIN_DWORDS", SDT_ZJoinDwords>;
292 def z_splat : SDNode<"SystemZISD::SPLAT", SDT_ZVecBinaryInt>;
293 def z_merge_high : SDNode<"SystemZISD::MERGE_HIGH", SDT_ZVecBinary>;
294 def z_merge_low : SDNode<"SystemZISD::MERGE_LOW", SDT_ZVecBinary>;
295 def z_shl_double : SDNode<"SystemZISD::SHL_DOUBLE", SDT_ZVecTernaryInt>;
296 def z_permute_dwords : SDNode<"SystemZISD::PERMUTE_DWORDS",
298 def z_permute : SDNode<"SystemZISD::PERMUTE", SDT_ZVecTernary>;
299 def z_pack : SDNode<"SystemZISD::PACK", SDT_ZVecBinaryConv>;
300 def z_packs_cc : SDNode<"SystemZISD::PACKS_CC", SDT_ZVecBinaryConvCC>;
301 def z_packls_cc : SDNode<"SystemZISD::PACKLS_CC", SDT_ZVecBinaryConvCC>;
302 def z_unpack_high : SDNode<"SystemZISD::UNPACK_HIGH", SDT_ZVecUnaryConv>;
303 def z_unpackl_high : SDNode<"SystemZISD::UNPACKL_HIGH", SDT_ZVecUnaryConv>;
304 def z_unpack_low : SDNode<"SystemZISD::UNPACK_LOW", SDT_ZVecUnaryConv>;
305 def z_unpackl_low : SDNode<"SystemZISD::UNPACKL_LOW", SDT_ZVecUnaryConv>;
306 def z_vshl_by_scalar : SDNode<"SystemZISD::VSHL_BY_SCALAR",
308 def z_vsrl_by_scalar : SDNode<"SystemZISD::VSRL_BY_SCALAR",
310 def z_vsra_by_scalar : SDNode<"SystemZISD::VSRA_BY_SCALAR",
312 def z_vsum : SDNode<"SystemZISD::VSUM", SDT_ZVecBinaryConv>;
313 def z_vicmpe : SDNode<"SystemZISD::VICMPE", SDT_ZVecBinary>;
314 def z_vicmph : SDNode<"SystemZISD::VICMPH", SDT_ZVecBinary>;
315 def z_vicmphl : SDNode<"SystemZISD::VICMPHL", SDT_ZVecBinary>;
316 def z_vicmpes : SDNode<"SystemZISD::VICMPES", SDT_ZVecBinaryCC>;
317 def z_vicmphs : SDNode<"SystemZISD::VICMPHS", SDT_ZVecBinaryCC>;
318 def z_vicmphls : SDNode<"SystemZISD::VICMPHLS", SDT_ZVecBinaryCC>;
319 def z_vfcmpe : SDNode<"SystemZISD::VFCMPE", SDT_ZVecBinaryConv>;
320 def z_vfcmph : SDNode<"SystemZISD::VFCMPH", SDT_ZVecBinaryConv>;
321 def z_vfcmphe : SDNode<"SystemZISD::VFCMPHE", SDT_ZVecBinaryConv>;
322 def z_vfcmpes : SDNode<"SystemZISD::VFCMPES", SDT_ZVecBinaryConvCC>;
323 def z_vfcmphs : SDNode<"SystemZISD::VFCMPHS", SDT_ZVecBinaryConvCC>;
324 def z_vfcmphes : SDNode<"SystemZISD::VFCMPHES", SDT_ZVecBinaryConvCC>;
325 def z_vextend : SDNode<"SystemZISD::VEXTEND", SDT_ZVecUnaryConv>;
326 def z_vround : SDNode<"SystemZISD::VROUND", SDT_ZVecUnaryConv>;
327 def z_vtm : SDNode<"SystemZISD::VTM", SDT_ZCmp>;
328 def z_vfae_cc : SDNode<"SystemZISD::VFAE_CC", SDT_ZVecTernaryIntCC>;
329 def z_vfaez_cc : SDNode<"SystemZISD::VFAEZ_CC", SDT_ZVecTernaryIntCC>;
330 def z_vfee_cc : SDNode<"SystemZISD::VFEE_CC", SDT_ZVecBinaryCC>;
331 def z_vfeez_cc : SDNode<"SystemZISD::VFEEZ_CC", SDT_ZVecBinaryCC>;
332 def z_vfene_cc : SDNode<"SystemZISD::VFENE_CC", SDT_ZVecBinaryCC>;
333 def z_vfenez_cc : SDNode<"SystemZISD::VFENEZ_CC", SDT_ZVecBinaryCC>;
334 def z_vistr_cc : SDNode<"SystemZISD::VISTR_CC", SDT_ZVecUnaryCC>;
335 def z_vstrc_cc : SDNode<"SystemZISD::VSTRC_CC",
336 SDT_ZVecQuaternaryIntCC>;
337 def z_vstrcz_cc : SDNode<"SystemZISD::VSTRCZ_CC",
338 SDT_ZVecQuaternaryIntCC>;
339 def z_vftci : SDNode<"SystemZISD::VFTCI", SDT_ZVecBinaryConvIntCC>;
341 class AtomicWOp<string name, SDTypeProfile profile = SDT_ZAtomicLoadBinaryW>
342 : SDNode<"SystemZISD::"##name, profile,
343 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, SDNPMemOperand]>;
345 def z_atomic_swapw : AtomicWOp<"ATOMIC_SWAPW">;
346 def z_atomic_loadw_add : AtomicWOp<"ATOMIC_LOADW_ADD">;
347 def z_atomic_loadw_sub : AtomicWOp<"ATOMIC_LOADW_SUB">;
348 def z_atomic_loadw_and : AtomicWOp<"ATOMIC_LOADW_AND">;
349 def z_atomic_loadw_or : AtomicWOp<"ATOMIC_LOADW_OR">;
350 def z_atomic_loadw_xor : AtomicWOp<"ATOMIC_LOADW_XOR">;
351 def z_atomic_loadw_nand : AtomicWOp<"ATOMIC_LOADW_NAND">;
352 def z_atomic_loadw_min : AtomicWOp<"ATOMIC_LOADW_MIN">;
353 def z_atomic_loadw_max : AtomicWOp<"ATOMIC_LOADW_MAX">;
354 def z_atomic_loadw_umin : AtomicWOp<"ATOMIC_LOADW_UMIN">;
355 def z_atomic_loadw_umax : AtomicWOp<"ATOMIC_LOADW_UMAX">;
357 def z_atomic_cmp_swap : SDNode<"SystemZISD::ATOMIC_CMP_SWAP",
359 [SDNPHasChain, SDNPMayStore, SDNPMayLoad,
361 def z_atomic_cmp_swapw : SDNode<"SystemZISD::ATOMIC_CMP_SWAPW",
363 [SDNPHasChain, SDNPMayStore, SDNPMayLoad,
366 def z_atomic_load_128 : SDNode<"SystemZISD::ATOMIC_LOAD_128",
368 [SDNPHasChain, SDNPMayLoad, SDNPMemOperand]>;
369 def z_atomic_store_128 : SDNode<"SystemZISD::ATOMIC_STORE_128",
371 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
372 def z_atomic_cmp_swap_128 : SDNode<"SystemZISD::ATOMIC_CMP_SWAP_128",
373 SDT_ZAtomicCmpSwap128,
374 [SDNPHasChain, SDNPMayStore, SDNPMayLoad,
377 def z_mvc : SDNode<"SystemZISD::MVC", SDT_ZMemMemLength,
378 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
379 def z_mvc_loop : SDNode<"SystemZISD::MVC_LOOP", SDT_ZMemMemLoop,
380 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
381 def z_nc : SDNode<"SystemZISD::NC", SDT_ZMemMemLength,
382 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
383 def z_nc_loop : SDNode<"SystemZISD::NC_LOOP", SDT_ZMemMemLoop,
384 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
385 def z_oc : SDNode<"SystemZISD::OC", SDT_ZMemMemLength,
386 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
387 def z_oc_loop : SDNode<"SystemZISD::OC_LOOP", SDT_ZMemMemLoop,
388 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
389 def z_xc : SDNode<"SystemZISD::XC", SDT_ZMemMemLength,
390 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
391 def z_xc_loop : SDNode<"SystemZISD::XC_LOOP", SDT_ZMemMemLoop,
392 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
393 def z_clc : SDNode<"SystemZISD::CLC", SDT_ZMemMemLengthCC,
394 [SDNPHasChain, SDNPMayLoad]>;
395 def z_clc_loop : SDNode<"SystemZISD::CLC_LOOP", SDT_ZMemMemLoopCC,
396 [SDNPHasChain, SDNPMayLoad]>;
397 def z_strcmp : SDNode<"SystemZISD::STRCMP", SDT_ZStringCC,
398 [SDNPHasChain, SDNPMayLoad]>;
399 def z_stpcpy : SDNode<"SystemZISD::STPCPY", SDT_ZString,
400 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
401 def z_search_string : SDNode<"SystemZISD::SEARCH_STRING", SDT_ZStringCC,
402 [SDNPHasChain, SDNPMayLoad]>;
403 def z_prefetch : SDNode<"SystemZISD::PREFETCH", SDT_ZPrefetch,
404 [SDNPHasChain, SDNPMayLoad, SDNPMayStore,
407 def z_tbegin : SDNode<"SystemZISD::TBEGIN", SDT_ZTBegin,
408 [SDNPHasChain, SDNPMayStore, SDNPSideEffect]>;
409 def z_tbegin_nofloat : SDNode<"SystemZISD::TBEGIN_NOFLOAT", SDT_ZTBegin,
410 [SDNPHasChain, SDNPMayStore, SDNPSideEffect]>;
411 def z_tend : SDNode<"SystemZISD::TEND", SDT_ZTEnd,
412 [SDNPHasChain, SDNPSideEffect]>;
414 def z_vshl : SDNode<"ISD::SHL", SDT_ZVecBinary>;
415 def z_vsra : SDNode<"ISD::SRA", SDT_ZVecBinary>;
416 def z_vsrl : SDNode<"ISD::SRL", SDT_ZVecBinary>;
418 //===----------------------------------------------------------------------===//
420 //===----------------------------------------------------------------------===//
422 def z_loadbswap16 : PatFrag<(ops node:$addr), (z_loadbswap node:$addr), [{
423 return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i16;
425 def z_loadbswap32 : PatFrag<(ops node:$addr), (z_loadbswap node:$addr), [{
426 return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i32;
428 def z_loadbswap64 : PatFrag<(ops node:$addr), (z_loadbswap node:$addr), [{
429 return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i64;
432 def z_storebswap16 : PatFrag<(ops node:$src, node:$addr),
433 (z_storebswap node:$src, node:$addr), [{
434 return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i16;
436 def z_storebswap32 : PatFrag<(ops node:$src, node:$addr),
437 (z_storebswap node:$src, node:$addr), [{
438 return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i32;
440 def z_storebswap64 : PatFrag<(ops node:$src, node:$addr),
441 (z_storebswap node:$src, node:$addr), [{
442 return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i64;
445 // Fragments including CC as an implicit source.
447 : PatFrag<(ops node:$valid, node:$mask, node:$bb),
448 (z_br_ccmask_1 node:$valid, node:$mask, node:$bb, CC)>;
450 : PatFrag<(ops node:$true, node:$false, node:$valid, node:$mask),
451 (z_select_ccmask_1 node:$true, node:$false,
452 node:$valid, node:$mask, CC)>;
453 def z_ipm : PatFrag<(ops), (z_ipm_1 CC)>;
454 def z_addcarry : PatFrag<(ops node:$lhs, node:$rhs),
455 (z_addcarry_1 node:$lhs, node:$rhs, CC)>;
456 def z_subcarry : PatFrag<(ops node:$lhs, node:$rhs),
457 (z_subcarry_1 node:$lhs, node:$rhs, CC)>;
459 // Signed and unsigned comparisons.
460 def z_scmp : PatFrag<(ops node:$a, node:$b), (z_icmp node:$a, node:$b, imm), [{
461 unsigned Type = cast<ConstantSDNode>(N->getOperand(2))->getZExtValue();
462 return Type != SystemZICMP::UnsignedOnly;
464 def z_ucmp : PatFrag<(ops node:$a, node:$b), (z_icmp node:$a, node:$b, imm), [{
465 unsigned Type = cast<ConstantSDNode>(N->getOperand(2))->getZExtValue();
466 return Type != SystemZICMP::SignedOnly;
469 // Register- and memory-based TEST UNDER MASK.
470 def z_tm_reg : PatFrag<(ops node:$a, node:$b), (z_tm node:$a, node:$b, imm)>;
471 def z_tm_mem : PatFrag<(ops node:$a, node:$b), (z_tm node:$a, node:$b, 0)>;
473 // Register sign-extend operations. Sub-32-bit values are represented as i32s.
474 def sext8 : PatFrag<(ops node:$src), (sext_inreg node:$src, i8)>;
475 def sext16 : PatFrag<(ops node:$src), (sext_inreg node:$src, i16)>;
476 def sext32 : PatFrag<(ops node:$src), (sext (i32 node:$src))>;
478 // Match extensions of an i32 to an i64, followed by an in-register sign
479 // extension from a sub-i32 value.
480 def sext8dbl : PatFrag<(ops node:$src), (sext8 (anyext node:$src))>;
481 def sext16dbl : PatFrag<(ops node:$src), (sext16 (anyext node:$src))>;
483 // Register zero-extend operations. Sub-32-bit values are represented as i32s.
484 def zext8 : PatFrag<(ops node:$src), (and node:$src, 0xff)>;
485 def zext16 : PatFrag<(ops node:$src), (and node:$src, 0xffff)>;
486 def zext32 : PatFrag<(ops node:$src), (zext (i32 node:$src))>;
488 // Extending loads in which the extension type can be signed.
489 def asextload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{
490 unsigned Type = cast<LoadSDNode>(N)->getExtensionType();
491 return Type == ISD::EXTLOAD || Type == ISD::SEXTLOAD;
493 def asextloadi8 : PatFrag<(ops node:$ptr), (asextload node:$ptr), [{
494 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8;
496 def asextloadi16 : PatFrag<(ops node:$ptr), (asextload node:$ptr), [{
497 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16;
499 def asextloadi32 : PatFrag<(ops node:$ptr), (asextload node:$ptr), [{
500 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32;
503 // Extending loads in which the extension type can be unsigned.
504 def azextload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{
505 unsigned Type = cast<LoadSDNode>(N)->getExtensionType();
506 return Type == ISD::EXTLOAD || Type == ISD::ZEXTLOAD;
508 def azextloadi8 : PatFrag<(ops node:$ptr), (azextload node:$ptr), [{
509 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8;
511 def azextloadi16 : PatFrag<(ops node:$ptr), (azextload node:$ptr), [{
512 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16;
514 def azextloadi32 : PatFrag<(ops node:$ptr), (azextload node:$ptr), [{
515 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32;
518 // Extending loads in which the extension type doesn't matter.
519 def anyextload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{
520 return cast<LoadSDNode>(N)->getExtensionType() != ISD::NON_EXTLOAD;
522 def anyextloadi8 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{
523 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8;
525 def anyextloadi16 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{
526 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16;
528 def anyextloadi32 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{
529 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32;
533 class AlignedLoad<SDPatternOperator load>
534 : PatFrag<(ops node:$addr), (load node:$addr), [{
535 auto *Load = cast<LoadSDNode>(N);
536 return Load->getAlignment() >= Load->getMemoryVT().getStoreSize();
538 def aligned_load : AlignedLoad<load>;
539 def aligned_asextloadi16 : AlignedLoad<asextloadi16>;
540 def aligned_asextloadi32 : AlignedLoad<asextloadi32>;
541 def aligned_azextloadi16 : AlignedLoad<azextloadi16>;
542 def aligned_azextloadi32 : AlignedLoad<azextloadi32>;
545 class AlignedStore<SDPatternOperator store>
546 : PatFrag<(ops node:$src, node:$addr), (store node:$src, node:$addr), [{
547 auto *Store = cast<StoreSDNode>(N);
548 return Store->getAlignment() >= Store->getMemoryVT().getStoreSize();
550 def aligned_store : AlignedStore<store>;
551 def aligned_truncstorei16 : AlignedStore<truncstorei16>;
552 def aligned_truncstorei32 : AlignedStore<truncstorei32>;
554 // Non-volatile loads. Used for instructions that might access the storage
555 // location multiple times.
556 class NonvolatileLoad<SDPatternOperator load>
557 : PatFrag<(ops node:$addr), (load node:$addr), [{
558 auto *Load = cast<LoadSDNode>(N);
559 return !Load->isVolatile();
561 def nonvolatile_anyextloadi8 : NonvolatileLoad<anyextloadi8>;
562 def nonvolatile_anyextloadi16 : NonvolatileLoad<anyextloadi16>;
563 def nonvolatile_anyextloadi32 : NonvolatileLoad<anyextloadi32>;
565 // Non-volatile stores.
566 class NonvolatileStore<SDPatternOperator store>
567 : PatFrag<(ops node:$src, node:$addr), (store node:$src, node:$addr), [{
568 auto *Store = cast<StoreSDNode>(N);
569 return !Store->isVolatile();
571 def nonvolatile_truncstorei8 : NonvolatileStore<truncstorei8>;
572 def nonvolatile_truncstorei16 : NonvolatileStore<truncstorei16>;
573 def nonvolatile_truncstorei32 : NonvolatileStore<truncstorei32>;
575 // A store of a load that can be implemented using MVC.
576 def mvc_store : PatFrag<(ops node:$value, node:$addr),
577 (unindexedstore node:$value, node:$addr),
578 [{ return storeLoadCanUseMVC(N); }]>;
580 // Binary read-modify-write operations on memory in which the other
581 // operand is also memory and for which block operations like NC can
582 // be used. There are two patterns for each operator, depending on
583 // which operand contains the "other" load.
584 multiclass block_op<SDPatternOperator operator> {
585 def "1" : PatFrag<(ops node:$value, node:$addr),
586 (unindexedstore (operator node:$value,
587 (unindexedload node:$addr)),
589 [{ return storeLoadCanUseBlockBinary(N, 0); }]>;
590 def "2" : PatFrag<(ops node:$value, node:$addr),
591 (unindexedstore (operator (unindexedload node:$addr),
594 [{ return storeLoadCanUseBlockBinary(N, 1); }]>;
596 defm block_and : block_op<and>;
597 defm block_or : block_op<or>;
598 defm block_xor : block_op<xor>;
601 def inserti8 : PatFrag<(ops node:$src1, node:$src2),
602 (or (and node:$src1, -256), node:$src2)>;
603 def insertll : PatFrag<(ops node:$src1, node:$src2),
604 (or (and node:$src1, 0xffffffffffff0000), node:$src2)>;
605 def insertlh : PatFrag<(ops node:$src1, node:$src2),
606 (or (and node:$src1, 0xffffffff0000ffff), node:$src2)>;
607 def inserthl : PatFrag<(ops node:$src1, node:$src2),
608 (or (and node:$src1, 0xffff0000ffffffff), node:$src2)>;
609 def inserthh : PatFrag<(ops node:$src1, node:$src2),
610 (or (and node:$src1, 0x0000ffffffffffff), node:$src2)>;
611 def insertlf : PatFrag<(ops node:$src1, node:$src2),
612 (or (and node:$src1, 0xffffffff00000000), node:$src2)>;
613 def inserthf : PatFrag<(ops node:$src1, node:$src2),
614 (or (and node:$src1, 0x00000000ffffffff), node:$src2)>;
616 // ORs that can be treated as insertions.
617 def or_as_inserti8 : PatFrag<(ops node:$src1, node:$src2),
618 (or node:$src1, node:$src2), [{
619 unsigned BitWidth = N->getValueType(0).getScalarSizeInBits();
620 return CurDAG->MaskedValueIsZero(N->getOperand(0),
621 APInt::getLowBitsSet(BitWidth, 8));
624 // ORs that can be treated as reversed insertions.
625 def or_as_revinserti8 : PatFrag<(ops node:$src1, node:$src2),
626 (or node:$src1, node:$src2), [{
627 unsigned BitWidth = N->getValueType(0).getScalarSizeInBits();
628 return CurDAG->MaskedValueIsZero(N->getOperand(1),
629 APInt::getLowBitsSet(BitWidth, 8));
632 // Negative integer absolute.
633 def z_inegabs : PatFrag<(ops node:$src), (ineg (z_iabs node:$src))>;
635 // Integer absolute, matching the canonical form generated by DAGCombiner.
636 def z_iabs32 : PatFrag<(ops node:$src),
637 (xor (add node:$src, (sra node:$src, (i32 31))),
638 (sra node:$src, (i32 31)))>;
639 def z_iabs64 : PatFrag<(ops node:$src),
640 (xor (add node:$src, (sra node:$src, (i32 63))),
641 (sra node:$src, (i32 63)))>;
642 def z_inegabs32 : PatFrag<(ops node:$src), (ineg (z_iabs32 node:$src))>;
643 def z_inegabs64 : PatFrag<(ops node:$src), (ineg (z_iabs64 node:$src))>;
645 // Integer multiply-and-add
646 def z_muladd : PatFrag<(ops node:$src1, node:$src2, node:$src3),
647 (add (mul node:$src1, node:$src2), node:$src3)>;
649 // Alternatives to match operations with or without an overflow CC result.
650 def z_sadd : PatFrags<(ops node:$src1, node:$src2),
651 [(z_saddo node:$src1, node:$src2),
652 (add node:$src1, node:$src2)]>;
653 def z_uadd : PatFrags<(ops node:$src1, node:$src2),
654 [(z_uaddo node:$src1, node:$src2),
655 (add node:$src1, node:$src2)]>;
656 def z_ssub : PatFrags<(ops node:$src1, node:$src2),
657 [(z_ssubo node:$src1, node:$src2),
658 (sub node:$src1, node:$src2)]>;
659 def z_usub : PatFrags<(ops node:$src1, node:$src2),
660 [(z_usubo node:$src1, node:$src2),
661 (sub node:$src1, node:$src2)]>;
663 // Fused multiply-subtract, using the natural operand order.
664 def fms : PatFrag<(ops node:$src1, node:$src2, node:$src3),
665 (fma node:$src1, node:$src2, (fneg node:$src3))>;
667 // Fused multiply-add and multiply-subtract, but with the order of the
668 // operands matching SystemZ's MA and MS instructions.
669 def z_fma : PatFrag<(ops node:$src1, node:$src2, node:$src3),
670 (fma node:$src2, node:$src3, node:$src1)>;
671 def z_fms : PatFrag<(ops node:$src1, node:$src2, node:$src3),
672 (fma node:$src2, node:$src3, (fneg node:$src1))>;
674 // Negative fused multiply-add and multiply-subtract.
675 def fnma : PatFrag<(ops node:$src1, node:$src2, node:$src3),
676 (fneg (fma node:$src1, node:$src2, node:$src3))>;
677 def fnms : PatFrag<(ops node:$src1, node:$src2, node:$src3),
678 (fneg (fms node:$src1, node:$src2, node:$src3))>;
680 // Floating-point negative absolute.
681 def fnabs : PatFrag<(ops node:$ptr), (fneg (fabs node:$ptr))>;
683 // Create a unary operator that loads from memory and then performs
684 // the given operation on it.
685 class loadu<SDPatternOperator operator, SDPatternOperator load = load>
686 : PatFrag<(ops node:$addr), (operator (load node:$addr))>;
688 // Create a store operator that performs the given unary operation
689 // on the value before storing it.
690 class storeu<SDPatternOperator operator, SDPatternOperator store = store>
691 : PatFrag<(ops node:$value, node:$addr),
692 (store (operator node:$value), node:$addr)>;
694 // Create a store operator that performs the given inherent operation
695 // and stores the resulting value.
696 class storei<SDPatternOperator operator, SDPatternOperator store = store>
697 : PatFrag<(ops node:$addr),
698 (store (operator), node:$addr)>;
700 // Create a shift operator that optionally ignores an AND of the
701 // shift count with an immediate if the bottom 6 bits are all set.
702 def imm32bottom6set : PatLeaf<(i32 imm), [{
703 return (N->getZExtValue() & 0x3f) == 0x3f;
705 class shiftop<SDPatternOperator operator>
706 : PatFrags<(ops node:$val, node:$count),
707 [(operator node:$val, node:$count),
708 (operator node:$val, (and node:$count, imm32bottom6set))]>;
710 // Load a scalar and replicate it in all elements of a vector.
711 class z_replicate_load<ValueType scalartype, SDPatternOperator load>
712 : PatFrag<(ops node:$addr),
713 (z_replicate (scalartype (load node:$addr)))>;
714 def z_replicate_loadi8 : z_replicate_load<i32, anyextloadi8>;
715 def z_replicate_loadi16 : z_replicate_load<i32, anyextloadi16>;
716 def z_replicate_loadi32 : z_replicate_load<i32, load>;
717 def z_replicate_loadi64 : z_replicate_load<i64, load>;
718 def z_replicate_loadf32 : z_replicate_load<f32, load>;
719 def z_replicate_loadf64 : z_replicate_load<f64, load>;
721 // Load a scalar and insert it into a single element of a vector.
722 class z_vle<ValueType scalartype, SDPatternOperator load>
723 : PatFrag<(ops node:$vec, node:$addr, node:$index),
724 (z_vector_insert node:$vec, (scalartype (load node:$addr)),
726 def z_vlei8 : z_vle<i32, anyextloadi8>;
727 def z_vlei16 : z_vle<i32, anyextloadi16>;
728 def z_vlei32 : z_vle<i32, load>;
729 def z_vlei64 : z_vle<i64, load>;
730 def z_vlef32 : z_vle<f32, load>;
731 def z_vlef64 : z_vle<f64, load>;
733 // Load a scalar and insert it into the low element of the high i64 of a
735 class z_vllez<ValueType scalartype, SDPatternOperator load, int index>
736 : PatFrag<(ops node:$addr),
737 (z_vector_insert (immAllZerosV),
738 (scalartype (load node:$addr)), (i32 index))>;
739 def z_vllezi8 : z_vllez<i32, anyextloadi8, 7>;
740 def z_vllezi16 : z_vllez<i32, anyextloadi16, 3>;
741 def z_vllezi32 : z_vllez<i32, load, 1>;
742 def z_vllezi64 : PatFrags<(ops node:$addr),
743 [(z_vector_insert (immAllZerosV),
744 (i64 (load node:$addr)), (i32 0)),
745 (z_join_dwords (i64 (load node:$addr)), (i64 0))]>;
746 // We use high merges to form a v4f32 from four f32s. Propagating zero
747 // into all elements but index 1 gives this expression.
748 def z_vllezf32 : PatFrag<(ops node:$addr),
754 (v4f32 (scalar_to_vector
755 (f32 (load node:$addr)))))))),
757 (bitconvert (v4f32 (immAllZerosV)))))>;
758 def z_vllezf64 : PatFrag<(ops node:$addr),
760 (v2f64 (scalar_to_vector (f64 (load node:$addr)))),
763 // Similarly for the high element of a zeroed vector.
764 def z_vllezli32 : z_vllez<i32, load, 0>;
765 def z_vllezlf32 : PatFrag<(ops node:$addr),
770 (v4f32 (scalar_to_vector
771 (f32 (load node:$addr)))),
772 (v4f32 (immAllZerosV))))),
774 (bitconvert (v4f32 (immAllZerosV)))))>;
776 // Store one element of a vector.
777 class z_vste<ValueType scalartype, SDPatternOperator store>
778 : PatFrag<(ops node:$vec, node:$addr, node:$index),
779 (store (scalartype (z_vector_extract node:$vec, node:$index)),
781 def z_vstei8 : z_vste<i32, truncstorei8>;
782 def z_vstei16 : z_vste<i32, truncstorei16>;
783 def z_vstei32 : z_vste<i32, store>;
784 def z_vstei64 : z_vste<i64, store>;
785 def z_vstef32 : z_vste<f32, store>;
786 def z_vstef64 : z_vste<f64, store>;
788 // Arithmetic negation on vectors.
789 def z_vneg : PatFrag<(ops node:$x), (sub (immAllZerosV), node:$x)>;
791 // Bitwise negation on vectors.
792 def z_vnot : PatFrag<(ops node:$x), (xor node:$x, (immAllOnesV))>;
794 // Signed "integer greater than zero" on vectors.
795 def z_vicmph_zero : PatFrag<(ops node:$x), (z_vicmph node:$x, (immAllZerosV))>;
797 // Signed "integer less than zero" on vectors.
798 def z_vicmpl_zero : PatFrag<(ops node:$x), (z_vicmph (immAllZerosV), node:$x)>;
800 // Integer absolute on vectors.
801 class z_viabs<int shift>
802 : PatFrag<(ops node:$src),
803 (xor (add node:$src, (z_vsra_by_scalar node:$src, (i32 shift))),
804 (z_vsra_by_scalar node:$src, (i32 shift)))>;
805 def z_viabs8 : z_viabs<7>;
806 def z_viabs16 : z_viabs<15>;
807 def z_viabs32 : z_viabs<31>;
808 def z_viabs64 : z_viabs<63>;
810 // Sign-extend the i64 elements of a vector.
811 class z_vse<int shift>
812 : PatFrag<(ops node:$src),
813 (z_vsra_by_scalar (z_vshl_by_scalar node:$src, shift), shift)>;
814 def z_vsei8 : z_vse<56>;
815 def z_vsei16 : z_vse<48>;
816 def z_vsei32 : z_vse<32>;
818 // ...and again with the extensions being done on individual i64 scalars.
819 class z_vse_by_parts<SDPatternOperator operator, int index1, int index2>
820 : PatFrag<(ops node:$src),
822 (operator (z_vector_extract node:$src, index1)),
823 (operator (z_vector_extract node:$src, index2)))>;
824 def z_vsei8_by_parts : z_vse_by_parts<sext8dbl, 7, 15>;
825 def z_vsei16_by_parts : z_vse_by_parts<sext16dbl, 3, 7>;
826 def z_vsei32_by_parts : z_vse_by_parts<sext32, 1, 3>;