[ARM] Cortex-M4 schedule additions
[llvm-complete.git] / test / CodeGen / ARM / 2009-02-22-SoftenFloatVaArg.ll
bloba14589fa47d8fa8a597e71269bb01a444509a0f4
1 ; RUN: llc < %s
2 ; PR3610
3 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-s0:0:64-f80:32:32"
4 target triple = "arm-elf"
6 define i32 @main(i8*) nounwind {
7 entry:
8         %ap = alloca i8*                ; <i8**> [#uses=2]
9         store i8* %0, i8** %ap
10         %retval = alloca i32            ; <i32*> [#uses=2]
11         store i32 0, i32* %retval
12         %tmp = alloca float             ; <float*> [#uses=1]
13         %1 = va_arg i8** %ap, float             ; <float> [#uses=1]
14         store float %1, float* %tmp
15         br label %return
17 return:         ; preds = %entry
18         %2 = load i32, i32* %retval             ; <i32> [#uses=1]
19         ret i32 %2