[ARM] Cortex-M4 schedule additions

[llvm-complete.git] / test / CodeGen / MIR / Generic / expected-colon-after-basic-block.mir

# RUN: not llc -run-pass none -o /dev/null %s 2>&1 | FileCheck %s

--- |

  define i32 @foo() {
  entry:
    ret i32 0
  }

...
---
name:            foo
body: |
  ; CHECK: [[@LINE+1]]:13: expected ':'
  bb.0.entry
...