1 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2 # RUN: llc -mtriple=mips-mti-linux-gnu -mattr=+micromips -o - %s -start-before mips-delay-slot-filler -stop-after mips-branch-expansion | FileCheck %s --check-prefix=MM
3 # RUN: llc -mtriple=mips-mti-linux-gnu -mattr=+micromips -o - %s -start-before mips-delay-slot-filler -stop-after mips-branch-expansion -relocation-model=pic | FileCheck %s --check-prefix=PIC
5 # Test the long branch expansion of various branches
8 define void @expand_BEQ_MM(i1 %a) {
9 br i1 %a, label %iftrue, label %tail
12 call void asm sideeffect ".space 131068", ""()
19 define void @expand_BGEZ_MM(i1 %a) {
20 br i1 %a, label %iftrue, label %tail
23 call void asm sideeffect ".space 131068", ""()
30 define void @expand_BGTZ_MM(i1 %a) {
31 br i1 %a, label %iftrue, label %tail
34 call void asm sideeffect ".space 131068", ""()
41 define void @expand_BLEZ_MM(i1 %a) {
42 br i1 %a, label %iftrue, label %tail
45 call void asm sideeffect ".space 131068", ""()
52 define void @expand_BLTZ_MM(i1 %a) {
53 br i1 %a, label %iftrue, label %tail
56 call void asm sideeffect ".space 131068", ""()
63 define void @expand_BNE_MM(i1 %a) {
64 br i1 %a, label %iftrue, label %tail
67 call void asm sideeffect ".space 131068", ""()
74 define void @expand_BEQZ16_MM(i1 %a) {
75 br i1 %a, label %iftrue, label %tail
78 call void asm sideeffect ".space 131068", ""()
85 define void @expand_BNEZ16_MM(i1 %a) {
86 br i1 %a, label %iftrue, label %tail
89 call void asm sideeffect ".space 131068", ""()
101 exposesReturnsTwice: false
103 regBankSelected: false
106 tracksRegLiveness: true
109 - { reg: '$a0', virtual-reg: '' }
111 isFrameAddressTaken: false
112 isReturnAddressTaken: false
122 hasOpaqueSPAdjustment: false
124 hasMustTailInVarArgFunc: false
132 ; MM-LABEL: name: expand_BEQ_MM
133 ; MM: bb.0 (%ir-block.0):
134 ; MM: successors: %bb.2(0x40000000), %bb.1(0x40000000)
135 ; MM: renamable $at = ANDi killed renamable $a0, 1
136 ; MM: BNEZC_MM $at, %bb.2, implicit-def $at
137 ; MM: bb.1 (%ir-block.0):
138 ; MM: successors: %bb.3(0x80000000)
139 ; MM: J %bb.3, implicit-def $at {
143 ; MM: successors: %bb.3(0x80000000)
144 ; MM: INLINEASM &".space 131068", 1
146 ; MM: JRC16_MM undef $ra
147 ; PIC-LABEL: name: expand_BEQ_MM
148 ; PIC: bb.0 (%ir-block.0):
149 ; PIC: successors: %bb.3(0x40000000), %bb.1(0x40000000)
150 ; PIC: renamable $at = ANDi killed renamable $a0, 1
151 ; PIC: BNEZC_MM $at, %bb.3, implicit-def $at
152 ; PIC: bb.1 (%ir-block.0):
153 ; PIC: successors: %bb.2(0x80000000)
154 ; PIC: $sp = ADDiu $sp, -8
155 ; PIC: SW $ra, $sp, 0
156 ; PIC: $at = LONG_BRANCH_LUi target-flags(mips-abs-hi) %bb.4, %bb.2
157 ; PIC: BAL_BR_MM %bb.2, implicit-def $ra {
158 ; PIC: $at = LONG_BRANCH_ADDiu $at, target-flags(mips-abs-lo) %bb.4, %bb.2
160 ; PIC: bb.2 (%ir-block.0):
161 ; PIC: successors: %bb.4(0x80000000)
162 ; PIC: $at = ADDu $ra, $at
163 ; PIC: $ra = LW $sp, 0
165 ; PIC: $sp = ADDiu $sp, 8
168 ; PIC: successors: %bb.4(0x80000000)
169 ; PIC: INLINEASM &".space 131068", 1
171 ; PIC: JRC16_MM undef $ra
173 successors: %bb.1(0x40000000), %bb.2(0x40000000)
176 renamable $at = ANDi killed renamable $a0, 1
177 BEQ_MM killed renamable $at, $zero, %bb.2, implicit-def $at
180 successors: %bb.2(0x80000000)
182 INLINEASM &".space 131068", 1
185 PseudoReturn undef $ra
192 exposesReturnsTwice: false
194 regBankSelected: false
197 tracksRegLiveness: true
200 - { reg: '$a0', virtual-reg: '' }
202 isFrameAddressTaken: false
203 isReturnAddressTaken: false
213 hasOpaqueSPAdjustment: false
215 hasMustTailInVarArgFunc: false
223 ; MM-LABEL: name: expand_BGEZ_MM
224 ; MM: bb.0 (%ir-block.0):
225 ; MM: successors: %bb.2(0x40000000), %bb.1(0x40000000)
226 ; MM: renamable $at = ANDi killed renamable $a0, 1
227 ; MM: BLTZ_MM $at, %bb.2, implicit-def $at {
230 ; MM: bb.1 (%ir-block.0):
231 ; MM: successors: %bb.3(0x80000000)
232 ; MM: J %bb.3, implicit-def $at {
236 ; MM: successors: %bb.3(0x80000000)
237 ; MM: INLINEASM &".space 131068", 1
239 ; MM: JRC16_MM undef $ra
240 ; PIC-LABEL: name: expand_BGEZ_MM
241 ; PIC: bb.0 (%ir-block.0):
242 ; PIC: successors: %bb.3(0x40000000), %bb.1(0x40000000)
243 ; PIC: renamable $at = ANDi killed renamable $a0, 1
244 ; PIC: BLTZ_MM $at, %bb.3, implicit-def $at {
247 ; PIC: bb.1 (%ir-block.0):
248 ; PIC: successors: %bb.2(0x80000000)
249 ; PIC: $sp = ADDiu $sp, -8
250 ; PIC: SW $ra, $sp, 0
251 ; PIC: $at = LONG_BRANCH_LUi target-flags(mips-abs-hi) %bb.4, %bb.2
252 ; PIC: BAL_BR_MM %bb.2, implicit-def $ra {
253 ; PIC: $at = LONG_BRANCH_ADDiu $at, target-flags(mips-abs-lo) %bb.4, %bb.2
255 ; PIC: bb.2 (%ir-block.0):
256 ; PIC: successors: %bb.4(0x80000000)
257 ; PIC: $at = ADDu $ra, $at
258 ; PIC: $ra = LW $sp, 0
260 ; PIC: $sp = ADDiu $sp, 8
263 ; PIC: successors: %bb.4(0x80000000)
264 ; PIC: INLINEASM &".space 131068", 1
266 ; PIC: JRC16_MM undef $ra
268 successors: %bb.1(0x40000000), %bb.2(0x40000000)
271 renamable $at = ANDi killed renamable $a0, 1
272 BGEZ_MM killed renamable $at, %bb.2, implicit-def $at
275 successors: %bb.2(0x80000000)
277 INLINEASM &".space 131068", 1
280 PseudoReturn undef $ra
287 exposesReturnsTwice: false
289 regBankSelected: false
292 tracksRegLiveness: true
295 - { reg: '$a0', virtual-reg: '' }
297 isFrameAddressTaken: false
298 isReturnAddressTaken: false
308 hasOpaqueSPAdjustment: false
310 hasMustTailInVarArgFunc: false
318 ; MM-LABEL: name: expand_BGTZ_MM
319 ; MM: bb.0 (%ir-block.0):
320 ; MM: successors: %bb.2(0x40000000), %bb.1(0x40000000)
321 ; MM: renamable $at = ANDi killed renamable $a0, 1
322 ; MM: BLEZ_MM $at, %bb.2, implicit-def $at {
325 ; MM: bb.1 (%ir-block.0):
326 ; MM: successors: %bb.3(0x80000000)
327 ; MM: J %bb.3, implicit-def $at {
331 ; MM: successors: %bb.3(0x80000000)
332 ; MM: INLINEASM &".space 131068", 1
334 ; MM: JRC16_MM undef $ra
335 ; PIC-LABEL: name: expand_BGTZ_MM
336 ; PIC: bb.0 (%ir-block.0):
337 ; PIC: successors: %bb.3(0x40000000), %bb.1(0x40000000)
338 ; PIC: renamable $at = ANDi killed renamable $a0, 1
339 ; PIC: BLEZ_MM $at, %bb.3, implicit-def $at {
342 ; PIC: bb.1 (%ir-block.0):
343 ; PIC: successors: %bb.2(0x80000000)
344 ; PIC: $sp = ADDiu $sp, -8
345 ; PIC: SW $ra, $sp, 0
346 ; PIC: $at = LONG_BRANCH_LUi target-flags(mips-abs-hi) %bb.4, %bb.2
347 ; PIC: BAL_BR_MM %bb.2, implicit-def $ra {
348 ; PIC: $at = LONG_BRANCH_ADDiu $at, target-flags(mips-abs-lo) %bb.4, %bb.2
350 ; PIC: bb.2 (%ir-block.0):
351 ; PIC: successors: %bb.4(0x80000000)
352 ; PIC: $at = ADDu $ra, $at
353 ; PIC: $ra = LW $sp, 0
355 ; PIC: $sp = ADDiu $sp, 8
358 ; PIC: successors: %bb.4(0x80000000)
359 ; PIC: INLINEASM &".space 131068", 1
361 ; PIC: JRC16_MM undef $ra
363 successors: %bb.1(0x40000000), %bb.2(0x40000000)
366 renamable $at = ANDi killed renamable $a0, 1
367 BGTZ_MM killed renamable $at, %bb.2, implicit-def $at
370 successors: %bb.2(0x80000000)
372 INLINEASM &".space 131068", 1
375 PseudoReturn undef $ra
382 exposesReturnsTwice: false
384 regBankSelected: false
387 tracksRegLiveness: true
390 - { reg: '$a0', virtual-reg: '' }
392 isFrameAddressTaken: false
393 isReturnAddressTaken: false
403 hasOpaqueSPAdjustment: false
405 hasMustTailInVarArgFunc: false
413 ; MM-LABEL: name: expand_BLEZ_MM
414 ; MM: bb.0 (%ir-block.0):
415 ; MM: successors: %bb.2(0x40000000), %bb.1(0x40000000)
416 ; MM: renamable $at = ANDi killed renamable $a0, 1
417 ; MM: BGTZ_MM $at, %bb.2, implicit-def $at {
420 ; MM: bb.1 (%ir-block.0):
421 ; MM: successors: %bb.3(0x80000000)
422 ; MM: J %bb.3, implicit-def $at {
426 ; MM: successors: %bb.3(0x80000000)
427 ; MM: INLINEASM &".space 131068", 1
429 ; MM: JRC16_MM undef $ra
430 ; PIC-LABEL: name: expand_BLEZ_MM
431 ; PIC: bb.0 (%ir-block.0):
432 ; PIC: successors: %bb.3(0x40000000), %bb.1(0x40000000)
433 ; PIC: renamable $at = ANDi killed renamable $a0, 1
434 ; PIC: BGTZ_MM $at, %bb.3, implicit-def $at {
437 ; PIC: bb.1 (%ir-block.0):
438 ; PIC: successors: %bb.2(0x80000000)
439 ; PIC: $sp = ADDiu $sp, -8
440 ; PIC: SW $ra, $sp, 0
441 ; PIC: $at = LONG_BRANCH_LUi target-flags(mips-abs-hi) %bb.4, %bb.2
442 ; PIC: BAL_BR_MM %bb.2, implicit-def $ra {
443 ; PIC: $at = LONG_BRANCH_ADDiu $at, target-flags(mips-abs-lo) %bb.4, %bb.2
445 ; PIC: bb.2 (%ir-block.0):
446 ; PIC: successors: %bb.4(0x80000000)
447 ; PIC: $at = ADDu $ra, $at
448 ; PIC: $ra = LW $sp, 0
450 ; PIC: $sp = ADDiu $sp, 8
453 ; PIC: successors: %bb.4(0x80000000)
454 ; PIC: INLINEASM &".space 131068", 1
456 ; PIC: JRC16_MM undef $ra
458 successors: %bb.1(0x40000000), %bb.2(0x40000000)
461 renamable $at = ANDi killed renamable $a0, 1
462 BLEZ_MM killed renamable $at, %bb.2, implicit-def $at
465 successors: %bb.2(0x80000000)
467 INLINEASM &".space 131068", 1
470 PseudoReturn undef $ra
477 exposesReturnsTwice: false
479 regBankSelected: false
482 tracksRegLiveness: true
485 - { reg: '$a0', virtual-reg: '' }
487 isFrameAddressTaken: false
488 isReturnAddressTaken: false
498 hasOpaqueSPAdjustment: false
500 hasMustTailInVarArgFunc: false
508 ; MM-LABEL: name: expand_BLTZ_MM
509 ; MM: bb.0 (%ir-block.0):
510 ; MM: successors: %bb.2(0x40000000), %bb.1(0x40000000)
511 ; MM: renamable $at = ANDi killed renamable $a0, 1
512 ; MM: BGEZ_MM $at, %bb.2, implicit-def $at {
515 ; MM: bb.1 (%ir-block.0):
516 ; MM: successors: %bb.3(0x80000000)
517 ; MM: J %bb.3, implicit-def $at {
521 ; MM: successors: %bb.3(0x80000000)
522 ; MM: INLINEASM &".space 131068", 1
524 ; MM: JRC16_MM undef $ra
525 ; PIC-LABEL: name: expand_BLTZ_MM
526 ; PIC: bb.0 (%ir-block.0):
527 ; PIC: successors: %bb.3(0x40000000), %bb.1(0x40000000)
528 ; PIC: renamable $at = ANDi killed renamable $a0, 1
529 ; PIC: BGEZ_MM $at, %bb.3, implicit-def $at {
532 ; PIC: bb.1 (%ir-block.0):
533 ; PIC: successors: %bb.2(0x80000000)
534 ; PIC: $sp = ADDiu $sp, -8
535 ; PIC: SW $ra, $sp, 0
536 ; PIC: $at = LONG_BRANCH_LUi target-flags(mips-abs-hi) %bb.4, %bb.2
537 ; PIC: BAL_BR_MM %bb.2, implicit-def $ra {
538 ; PIC: $at = LONG_BRANCH_ADDiu $at, target-flags(mips-abs-lo) %bb.4, %bb.2
540 ; PIC: bb.2 (%ir-block.0):
541 ; PIC: successors: %bb.4(0x80000000)
542 ; PIC: $at = ADDu $ra, $at
543 ; PIC: $ra = LW $sp, 0
545 ; PIC: $sp = ADDiu $sp, 8
548 ; PIC: successors: %bb.4(0x80000000)
549 ; PIC: INLINEASM &".space 131068", 1
551 ; PIC: JRC16_MM undef $ra
553 successors: %bb.1(0x40000000), %bb.2(0x40000000)
556 renamable $at = ANDi killed renamable $a0, 1
557 BLTZ_MM killed renamable $at, %bb.2, implicit-def $at
560 successors: %bb.2(0x80000000)
562 INLINEASM &".space 131068", 1
565 PseudoReturn undef $ra
572 exposesReturnsTwice: false
574 regBankSelected: false
577 tracksRegLiveness: true
580 - { reg: '$a0', virtual-reg: '' }
582 isFrameAddressTaken: false
583 isReturnAddressTaken: false
593 hasOpaqueSPAdjustment: false
595 hasMustTailInVarArgFunc: false
603 ; MM-LABEL: name: expand_BNE_MM
604 ; MM: bb.0 (%ir-block.0):
605 ; MM: successors: %bb.2(0x40000000), %bb.1(0x40000000)
606 ; MM: renamable $at = ANDi killed renamable $a0, 1
607 ; MM: BEQZC_MM $at, %bb.2, implicit-def $at
608 ; MM: bb.1 (%ir-block.0):
609 ; MM: successors: %bb.3(0x80000000)
610 ; MM: J %bb.3, implicit-def $at {
614 ; MM: successors: %bb.3(0x80000000)
615 ; MM: INLINEASM &".space 131068", 1
617 ; MM: JRC16_MM undef $ra
618 ; PIC-LABEL: name: expand_BNE_MM
619 ; PIC: bb.0 (%ir-block.0):
620 ; PIC: successors: %bb.3(0x40000000), %bb.1(0x40000000)
621 ; PIC: renamable $at = ANDi killed renamable $a0, 1
622 ; PIC: BEQZC_MM $at, %bb.3, implicit-def $at
623 ; PIC: bb.1 (%ir-block.0):
624 ; PIC: successors: %bb.2(0x80000000)
625 ; PIC: $sp = ADDiu $sp, -8
626 ; PIC: SW $ra, $sp, 0
627 ; PIC: $at = LONG_BRANCH_LUi target-flags(mips-abs-hi) %bb.4, %bb.2
628 ; PIC: BAL_BR_MM %bb.2, implicit-def $ra {
629 ; PIC: $at = LONG_BRANCH_ADDiu $at, target-flags(mips-abs-lo) %bb.4, %bb.2
631 ; PIC: bb.2 (%ir-block.0):
632 ; PIC: successors: %bb.4(0x80000000)
633 ; PIC: $at = ADDu $ra, $at
634 ; PIC: $ra = LW $sp, 0
636 ; PIC: $sp = ADDiu $sp, 8
639 ; PIC: successors: %bb.4(0x80000000)
640 ; PIC: INLINEASM &".space 131068", 1
642 ; PIC: JRC16_MM undef $ra
644 successors: %bb.1(0x40000000), %bb.2(0x40000000)
647 renamable $at = ANDi killed renamable $a0, 1
648 BNE_MM killed renamable $at, $zero, %bb.2, implicit-def $at
651 successors: %bb.2(0x80000000)
653 INLINEASM &".space 131068", 1
656 PseudoReturn undef $ra
661 name: expand_BEQZ16_MM
663 exposesReturnsTwice: false
665 regBankSelected: false
668 tracksRegLiveness: true
671 - { reg: '$a0', virtual-reg: '' }
673 isFrameAddressTaken: false
674 isReturnAddressTaken: false
684 hasOpaqueSPAdjustment: false
686 hasMustTailInVarArgFunc: false
694 ; MM-LABEL: name: expand_BEQZ16_MM
695 ; MM: bb.0 (%ir-block.0):
696 ; MM: successors: %bb.2(0x40000000), %bb.1(0x40000000)
697 ; MM: renamable $v0 = ANDi killed renamable $a0, 1
698 ; MM: BNEZ16_MM $v0, %bb.2, implicit-def $at {
701 ; MM: bb.1 (%ir-block.0):
702 ; MM: successors: %bb.3(0x80000000)
703 ; MM: J %bb.3, implicit-def $at {
707 ; MM: successors: %bb.3(0x80000000)
708 ; MM: INLINEASM &".space 131068", 1
710 ; MM: JRC16_MM undef $ra
711 ; PIC-LABEL: name: expand_BEQZ16_MM
712 ; PIC: bb.0 (%ir-block.0):
713 ; PIC: successors: %bb.3(0x40000000), %bb.1(0x40000000)
714 ; PIC: renamable $v0 = ANDi killed renamable $a0, 1
715 ; PIC: BNEZ16_MM $v0, %bb.3, implicit-def $at {
718 ; PIC: bb.1 (%ir-block.0):
719 ; PIC: successors: %bb.2(0x80000000)
720 ; PIC: $sp = ADDiu $sp, -8
721 ; PIC: SW $ra, $sp, 0
722 ; PIC: $at = LONG_BRANCH_LUi target-flags(mips-abs-hi) %bb.4, %bb.2
723 ; PIC: BAL_BR_MM %bb.2, implicit-def $ra {
724 ; PIC: $at = LONG_BRANCH_ADDiu $at, target-flags(mips-abs-lo) %bb.4, %bb.2
726 ; PIC: bb.2 (%ir-block.0):
727 ; PIC: successors: %bb.4(0x80000000)
728 ; PIC: $at = ADDu $ra, $at
729 ; PIC: $ra = LW $sp, 0
731 ; PIC: $sp = ADDiu $sp, 8
734 ; PIC: successors: %bb.4(0x80000000)
735 ; PIC: INLINEASM &".space 131068", 1
737 ; PIC: JRC16_MM undef $ra
739 successors: %bb.1(0x40000000), %bb.2(0x40000000)
742 renamable $v0 = ANDi killed renamable $a0, 1
743 BEQZ16_MM killed renamable $v0, %bb.2, implicit-def $at
746 successors: %bb.2(0x80000000)
748 INLINEASM &".space 131068", 1
751 PseudoReturn undef $ra
756 name: expand_BNEZ16_MM
758 exposesReturnsTwice: false
760 regBankSelected: false
763 tracksRegLiveness: true
766 - { reg: '$a0', virtual-reg: '' }
768 isFrameAddressTaken: false
769 isReturnAddressTaken: false
779 hasOpaqueSPAdjustment: false
781 hasMustTailInVarArgFunc: false
789 ; MM-LABEL: name: expand_BNEZ16_MM
790 ; MM: bb.0 (%ir-block.0):
791 ; MM: successors: %bb.2(0x40000000), %bb.1(0x40000000)
792 ; MM: renamable $v0 = ANDi killed renamable $a0, 1
793 ; MM: BEQZ16_MM $v0, %bb.2, implicit-def $at {
796 ; MM: bb.1 (%ir-block.0):
797 ; MM: successors: %bb.3(0x80000000)
798 ; MM: J %bb.3, implicit-def $at {
802 ; MM: successors: %bb.3(0x80000000)
803 ; MM: INLINEASM &".space 131068", 1
805 ; MM: JRC16_MM undef $ra
806 ; PIC-LABEL: name: expand_BNEZ16_MM
807 ; PIC: bb.0 (%ir-block.0):
808 ; PIC: successors: %bb.3(0x40000000), %bb.1(0x40000000)
809 ; PIC: renamable $v0 = ANDi killed renamable $a0, 1
810 ; PIC: BEQZ16_MM $v0, %bb.3, implicit-def $at {
813 ; PIC: bb.1 (%ir-block.0):
814 ; PIC: successors: %bb.2(0x80000000)
815 ; PIC: $sp = ADDiu $sp, -8
816 ; PIC: SW $ra, $sp, 0
817 ; PIC: $at = LONG_BRANCH_LUi target-flags(mips-abs-hi) %bb.4, %bb.2
818 ; PIC: BAL_BR_MM %bb.2, implicit-def $ra {
819 ; PIC: $at = LONG_BRANCH_ADDiu $at, target-flags(mips-abs-lo) %bb.4, %bb.2
821 ; PIC: bb.2 (%ir-block.0):
822 ; PIC: successors: %bb.4(0x80000000)
823 ; PIC: $at = ADDu $ra, $at
824 ; PIC: $ra = LW $sp, 0
826 ; PIC: $sp = ADDiu $sp, 8
829 ; PIC: successors: %bb.4(0x80000000)
830 ; PIC: INLINEASM &".space 131068", 1
832 ; PIC: JRC16_MM undef $ra
834 successors: %bb.1(0x40000000), %bb.2(0x40000000)
837 renamable $v0 = ANDi killed renamable $a0, 1
838 BNEZ16_MM killed renamable $v0, %bb.2, implicit-def $at
841 successors: %bb.2(0x80000000)
843 INLINEASM &".space 131068", 1
846 PseudoReturn undef $ra