[ARM] Cortex-M4 schedule additions
[llvm-complete.git] / test / CodeGen / Mips / mips16_32_1.ll
blob211aa2a0f4b07b42eda7fc0e4e7a3273e8c82555
1 ; RUN: llc  -march=mipsel -mattr=mips16 -relocation-model=pic -O3 < %s -mips-mixed-16-32  | FileCheck %s 
2 ; RUN: llc  -march=mipsel -mcpu=mips32 -relocation-model=pic -O3 < %s -mips-mixed-16-32  | FileCheck %s 
4 define void @foo() #0 {
5 entry:
6   ret void
9 ; CHECK:        .set    mips16
10 ; CHECK:        .ent    foo
11 ; CHECK:        jrc $ra
12 ; CHECK:        .end    foo
13 attributes #0 = { nounwind "less-precise-fpmad"="false" "mips16" "no-frame-pointer-elim"="false" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" }