1 ; RUN: llc -march=mips < %s
2 ; RUN: llc -march=mips -mattr=+msa,+fp64,+mips32r2 < %s
3 ; RUN: llc -march=mipsel < %s
4 ; RUN: llc -march=mipsel -mattr=+msa,+fp64,+mips32r2 < %s
6 ; This test originally failed for MSA with a
7 ; `Opc && "Cannot copy registers"' assertion.
8 ; It should at least successfully build.
10 define void @autogen_SD1935737938(i8*, i32*, i64*, i32, i64, i8) {
13 %A3 = alloca <4 x i32>
19 %E = extractelement <2 x i32> zeroinitializer, i32 0
20 %Shuff = shufflevector <2 x i32> zeroinitializer, <2 x i32> zeroinitializer, <2 x i32> <i32 1, i32 3>
21 %I = insertelement <1 x i64> <i64 -1>, i64 286689, i32 0
23 %ZE = fpext float 0xBF2AA5FE80000000 to double
24 %Sl = select i1 true, <1 x i64> <i64 -1>, <1 x i64> <i64 -1>
27 %E6 = extractelement <16 x i64> <i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1>, i32 14
28 %Shuff7 = shufflevector <2 x i32> zeroinitializer, <2 x i32> zeroinitializer, <2 x i32> <i32 1, i32 3>
29 %I8 = insertelement <2 x i32> zeroinitializer, i32 135673, i32 1
31 %FC = uitofp i32 %3 to double
32 %Sl10 = select i1 true, <1 x i1> zeroinitializer, <1 x i1> zeroinitializer
33 %Cmp = icmp ne <1 x i64> %I, <i64 -1>
34 %L11 = load i8, i8* %0
36 %E12 = extractelement <1 x i64> <i64 -1>, i32 0
37 %Shuff13 = shufflevector <1 x i64> %Sl, <1 x i64> <i64 -1>, <1 x i32> <i32 1>
38 %I14 = insertelement <1 x i64> %I, i64 303290, i32 0
39 %B15 = frem float 0.000000e+00, 0.000000e+00
40 %Sl16 = select i1 true, <1 x i1> %Cmp, <1 x i1> zeroinitializer
41 %Cmp17 = fcmp one float 0xBD946F9840000000, %B15
44 CF74: ; preds = %CF74, %CF80, %CF76, %BB
45 %L18 = load i8, i8* %0
47 %E19 = extractelement <1 x i64> %Sl, i32 0
48 %Shuff20 = shufflevector <8 x i8> <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>, <8 x i8> <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>, <8 x i32> <i32 12, i32 14, i32 0, i32 2, i32 4, i32 6, i32 8, i32 10>
49 %I21 = insertelement <2 x i32> %Shuff, i32 135673, i32 0
50 %B22 = urem i32 135673, %3
51 %FC23 = sitofp i8 %L to float
52 %Sl24 = select i1 true, i8 %B, i8 %L18
53 %L25 = load i8, i8* %0
55 %E26 = extractelement <2 x i32> %Shuff, i32 1
56 %Shuff27 = shufflevector <2 x i32> zeroinitializer, <2 x i32> zeroinitializer, <2 x i32> <i32 2, i32 0>
57 %I28 = insertelement <16 x i64> <i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1>, i64 %E12, i32 8
58 %B29 = frem double %ZE, 0x235104F0E94F406E
59 %Tr = trunc i64 286689 to i8
60 %Sl30 = select i1 true, float 0x45B13EA500000000, float %B15
61 %Cmp31 = icmp eq i32 %B22, %B22
62 br i1 %Cmp31, label %CF74, label %CF80
65 %L32 = load i8, i8* %0
67 %E33 = extractelement <2 x i32> zeroinitializer, i32 1
68 %Shuff34 = shufflevector <1 x i64> %Shuff13, <1 x i64> <i64 -1>, <1 x i32> zeroinitializer
69 %I35 = insertelement <8 x i8> <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>, i8 -1, i32 0
70 %FC36 = sitofp <1 x i1> %Cmp to <1 x float>
71 %Sl37 = select i1 true, <8 x i8> %Shuff20, <8 x i8> <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>
72 %Cmp38 = icmp sgt <2 x i32> %I21, %Shuff27
73 %L39 = load i8, i8* %0
74 store i8 %Sl24, i8* %0
75 %E40 = extractelement <8 x i64> zeroinitializer, i32 1
76 %Shuff41 = shufflevector <2 x i1> zeroinitializer, <2 x i1> %Cmp38, <2 x i32> <i32 0, i32 2>
77 %I42 = insertelement <4 x i32> zeroinitializer, i32 414573, i32 2
78 %B43 = srem i8 %L5, %L39
79 %Sl44 = select i1 %Cmp17, i8 %L, i8 %L
80 %Cmp45 = fcmp une float 0x3AFCE1A0C0000000, 0.000000e+00
81 br i1 %Cmp45, label %CF74, label %CF76
84 %L46 = load i8, i8* %0
86 %E47 = extractelement <2 x i32> %Shuff27, i32 0
87 %Shuff48 = shufflevector <1 x i1> %Sl10, <1 x i1> %Sl10, <1 x i32> <i32 1>
88 %I49 = insertelement <1 x i64> <i64 -1>, i64 %E12, i32 0
89 %FC50 = fptosi double 0x235104F0E94F406E to i32
90 %Sl51 = select i1 %Cmp17, <16 x i64> %I28, <16 x i64> %I28
91 %Cmp52 = icmp ne i8 %Tr, %Sl24
92 br i1 %Cmp52, label %CF74, label %CF75
94 CF75: ; preds = %CF75, %CF76
95 %L53 = load i8, i8* %0
97 %E54 = extractelement <8 x i8> %Shuff20, i32 5
98 %Shuff55 = shufflevector <2 x i32> %Shuff, <2 x i32> zeroinitializer, <2 x i32> <i32 0, i32 2>
99 %I56 = insertelement <4 x i32> %I42, i32 %B22, i32 2
100 %B57 = sub i64 %E40, %E6
101 %Sl58 = select i1 true, i64 303290, i64 %E40
102 %Cmp59 = icmp slt i64 %E40, %E6
103 br i1 %Cmp59, label %CF75, label %CF78
105 CF78: ; preds = %CF75
106 %L60 = load i8, i8* %0
108 %E61 = extractelement <2 x i32> zeroinitializer, i32 0
109 %Shuff62 = shufflevector <2 x i32> %Shuff7, <2 x i32> %I21, <2 x i32> <i32 1, i32 3>
110 %I63 = insertelement <1 x i1> %Sl16, i1 %Cmp45, i32 0
111 %B64 = and i8 %Sl44, -69
112 %ZE65 = zext <1 x i1> %Shuff48 to <1 x i64>
113 %Sl66 = select i1 true, <1 x i64> %I, <1 x i64> %I49
114 %Cmp67 = icmp ugt i64 286689, %E40
117 CF: ; preds = %CF, %CF78
118 %L68 = load i8, i8* %0
119 store i64 %B57, i64* %2
120 %E69 = extractelement <2 x i1> %Shuff41, i32 1
121 br i1 %E69, label %CF, label %CF77
123 CF77: ; preds = %CF77, %CF
124 %Shuff70 = shufflevector <1 x i64> %Shuff34, <1 x i64> <i64 -1>, <1 x i32> zeroinitializer
125 %I71 = insertelement <2 x i32> %Shuff, i32 %E26, i32 0
126 %Se = sext i8 %L60 to i32
127 %Sl72 = select i1 %Cmp45, <2 x i32> %Shuff62, <2 x i32> %I71
128 %Cmp73 = fcmp ugt double 0x235104F0E94F406E, 0x235104F0E94F406E
129 br i1 %Cmp73, label %CF77, label %CF79
131 CF79: ; preds = %CF77
132 store i8 %L18, i8* %0
133 store i8 %E54, i8* %0
134 store i8 %L39, i8* %0
135 store i8 %L39, i8* %0