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HEAD
[ARM] Cortex-M4 schedule additions
[llvm-complete.git]
/
test
/
ExecutionEngine
/
OrcMCJIT
/
2003-01-09-SARTest.ll
blob
8f79ff2a683a5ef54dd4435cc5b2ca7a44c9b2e1
1
; RUN: %lli -jit-kind=orc-mcjit %s > /dev/null
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; We were accidentally inverting the signedness of right shifts. Whoops.
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define i32 @main() {
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%X = ashr i32 -1, 16 ; <i32> [#uses=1]
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%Y = ashr i32 %X, 16 ; <i32> [#uses=1]
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%Z = add i32 %Y, 1 ; <i32> [#uses=1]
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ret i32 %Z
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}
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