[Alignment][NFC] Remove unneeded llvm:: scoping on Align types
[llvm-complete.git] / lib / Target / ARM / ARMBasicBlockInfo.h
blobd0f4a02463b7c44f81602206709ce12a63955ef2
1 //===-- ARMBasicBlockInfo.h - Basic Block Information -----------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // Utility functions and data structure for computing block size.
11 //===----------------------------------------------------------------------===//
13 #ifndef LLVM_LIB_TARGET_ARM_ARMBASICBLOCKINFO_H
14 #define LLVM_LIB_TARGET_ARM_ARMBASICBLOCKINFO_H
16 #include "ARMBaseInstrInfo.h"
17 #include "ARMMachineFunctionInfo.h"
18 #include "llvm/Support/MathExtras.h"
19 #include <algorithm>
20 #include <cstdint>
22 namespace llvm {
24 using BBInfoVector = SmallVectorImpl<BasicBlockInfo>;
26 /// UnknownPadding - Return the worst case padding that could result from
27 /// unknown offset bits. This does not include alignment padding caused by
28 /// known offset bits.
29 ///
30 /// @param Alignment alignment
31 /// @param KnownBits Number of known low offset bits.
32 inline unsigned UnknownPadding(Align Alignment, unsigned KnownBits) {
33 if (KnownBits < Log2(Alignment))
34 return Alignment.value() - (1ull << KnownBits);
35 return 0;
38 /// BasicBlockInfo - Information about the offset and size of a single
39 /// basic block.
40 struct BasicBlockInfo {
41 /// Offset - Distance from the beginning of the function to the beginning
42 /// of this basic block.
43 ///
44 /// Offsets are computed assuming worst case padding before an aligned
45 /// block. This means that subtracting basic block offsets always gives a
46 /// conservative estimate of the real distance which may be smaller.
47 ///
48 /// Because worst case padding is used, the computed offset of an aligned
49 /// block may not actually be aligned.
50 unsigned Offset = 0;
52 /// Size - Size of the basic block in bytes. If the block contains
53 /// inline assembly, this is a worst case estimate.
54 ///
55 /// The size does not include any alignment padding whether from the
56 /// beginning of the block, or from an aligned jump table at the end.
57 unsigned Size = 0;
59 /// KnownBits - The number of low bits in Offset that are known to be
60 /// exact. The remaining bits of Offset are an upper bound.
61 uint8_t KnownBits = 0;
63 /// Unalign - When non-zero, the block contains instructions (inline asm)
64 /// of unknown size. The real size may be smaller than Size bytes by a
65 /// multiple of 1 << Unalign.
66 uint8_t Unalign = 0;
68 /// PostAlign - When > 1, the block terminator contains a .align
69 /// directive, so the end of the block is aligned to PostAlign bytes.
70 Align PostAlign;
72 BasicBlockInfo() = default;
74 /// Compute the number of known offset bits internally to this block.
75 /// This number should be used to predict worst case padding when
76 /// splitting the block.
77 unsigned internalKnownBits() const {
78 unsigned Bits = Unalign ? Unalign : KnownBits;
79 // If the block size isn't a multiple of the known bits, assume the
80 // worst case padding.
81 if (Size & ((1u << Bits) - 1))
82 Bits = countTrailingZeros(Size);
83 return Bits;
86 /// Compute the offset immediately following this block. If Align is
87 /// specified, return the offset the successor block will get if it has
88 /// this alignment.
89 unsigned postOffset(Align Alignment = Align::None()) const {
90 unsigned PO = Offset + Size;
91 const Align PA = std::max(PostAlign, Alignment);
92 if (PA == Align::None())
93 return PO;
94 // Add alignment padding from the terminator.
95 return PO + UnknownPadding(PA, internalKnownBits());
98 /// Compute the number of known low bits of postOffset. If this block
99 /// contains inline asm, the number of known bits drops to the
100 /// instruction alignment. An aligned terminator may increase the number
101 /// of know bits.
102 /// If LogAlign is given, also consider the alignment of the next block.
103 unsigned postKnownBits(Align Align = Align::None()) const {
104 return std::max(Log2(std::max(PostAlign, Align)), internalKnownBits());
108 class ARMBasicBlockUtils {
110 private:
111 MachineFunction &MF;
112 bool isThumb = false;
113 const ARMBaseInstrInfo *TII = nullptr;
114 SmallVector<BasicBlockInfo, 8> BBInfo;
116 public:
117 ARMBasicBlockUtils(MachineFunction &MF) : MF(MF) {
118 TII =
119 static_cast<const ARMBaseInstrInfo*>(MF.getSubtarget().getInstrInfo());
120 isThumb = MF.getInfo<ARMFunctionInfo>()->isThumbFunction();
123 void computeAllBlockSizes() {
124 BBInfo.resize(MF.getNumBlockIDs());
125 for (MachineBasicBlock &MBB : MF)
126 computeBlockSize(&MBB);
129 void computeBlockSize(MachineBasicBlock *MBB);
131 unsigned getOffsetOf(MachineInstr *MI) const;
133 unsigned getOffsetOf(MachineBasicBlock *MBB) const {
134 return BBInfo[MBB->getNumber()].Offset;
137 void adjustBBOffsetsAfter(MachineBasicBlock *MBB);
139 void adjustBBSize(MachineBasicBlock *MBB, int Size) {
140 BBInfo[MBB->getNumber()].Size += Size;
143 bool isBBInRange(MachineInstr *MI, MachineBasicBlock *DestBB,
144 unsigned MaxDisp) const;
146 void insert(unsigned BBNum, BasicBlockInfo BBI) {
147 BBInfo.insert(BBInfo.begin() + BBNum, BBI);
150 void clear() { BBInfo.clear(); }
152 BBInfoVector &getBBInfo() { return BBInfo; }
156 } // end namespace llvm
158 #endif // LLVM_LIB_TARGET_ARM_ARMBASICBLOCKINFO_H