include/llvm/CodeGen/Analysis.h

   1 //===- CodeGen/Analysis.h - CodeGen LLVM IR Analysis Utilities --*- C++ -*-===//
   2 //
   3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
   4 // See https://llvm.org/LICENSE.txt for license information.
   5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
   6 //
   7 //===----------------------------------------------------------------------===//
   8 //
   9 // This file declares several CodeGen-specific LLVM IR analysis utilities.
  10 //
  11 //===----------------------------------------------------------------------===//
  12
  13 #ifndef LLVM_CODEGEN_ANALYSIS_H
  14 #define LLVM_CODEGEN_ANALYSIS_H
  15
  16 #include "llvm/ADT/ArrayRef.h"
  17 #include "llvm/ADT/DenseMap.h"
  18 #include "llvm/ADT/SmallVector.h"
  19 #include "llvm/ADT/Triple.h"
  20 #include "llvm/CodeGen/ISDOpcodes.h"
  21 #include "llvm/IR/CallSite.h"
  22 #include "llvm/IR/InlineAsm.h"
  23 #include "llvm/IR/Instructions.h"
  24 #include "llvm/Support/CodeGen.h"
  25
  26 namespace llvm {
  27 class GlobalValue;
  28 class MachineBasicBlock;
  29 class MachineFunction;
  30 class TargetLoweringBase;
  31 class TargetLowering;
  32 class TargetMachine;
  33 class SDNode;
  34 class SDValue;
  35 class SelectionDAG;
  36 struct EVT;
  37
  38 /// Compute the linearized index of a member in a nested
  39 /// aggregate/struct/array.
  40 ///
  41 /// Given an LLVM IR aggregate type and a sequence of insertvalue or
  42 /// extractvalue indices that identify a member, return the linearized index of
  43 /// the start of the member, i.e the number of element in memory before the
  44 /// sought one. This is disconnected from the number of bytes.
  45 ///
  46 /// \param Ty is the type indexed by \p Indices.
  47 /// \param Indices is an optional pointer in the indices list to the current
  48 /// index.
  49 /// \param IndicesEnd is the end of the indices list.
  50 /// \param CurIndex is the current index in the recursion.
  51 ///
  52 /// \returns \p CurIndex plus the linear index in \p Ty  the indices list.
  53 unsigned ComputeLinearIndex(Type *Ty,
  54                             const unsigned *Indices,
  55                             const unsigned *IndicesEnd,
  56                             unsigned CurIndex = 0);
  57
  58 inline unsigned ComputeLinearIndex(Type *Ty,
  59                                    ArrayRef<unsigned> Indices,
  60                                    unsigned CurIndex = 0) {
  61   return ComputeLinearIndex(Ty, Indices.begin(), Indices.end(), CurIndex);
  62 }
  63
  64 /// ComputeValueVTs - Given an LLVM IR type, compute a sequence of
  65 /// EVTs that represent all the individual underlying
  66 /// non-aggregate types that comprise it.
  67 ///
  68 /// If Offsets is non-null, it points to a vector to be filled in
  69 /// with the in-memory offsets of each of the individual values.
  70 ///
  71 void ComputeValueVTs(const TargetLowering &TLI, const DataLayout &DL, Type *Ty,
  72                      SmallVectorImpl<EVT> &ValueVTs,
  73                      SmallVectorImpl<uint64_t> *Offsets = nullptr,
  74                      uint64_t StartingOffset = 0);
  75
  76 /// ExtractTypeInfo - Returns the type info, possibly bitcast, encoded in V.
  77 GlobalValue *ExtractTypeInfo(Value *V);
  78
  79 /// hasInlineAsmMemConstraint - Return true if the inline asm instruction being
  80 /// processed uses a memory 'm' constraint.
  81 bool hasInlineAsmMemConstraint(InlineAsm::ConstraintInfoVector &CInfos,
  82                                const TargetLowering &TLI);
  83
  84 /// getFCmpCondCode - Return the ISD condition code corresponding to
  85 /// the given LLVM IR floating-point condition code.  This includes
  86 /// consideration of global floating-point math flags.
  87 ///
  88 ISD::CondCode getFCmpCondCode(FCmpInst::Predicate Pred);
  89
  90 /// getFCmpCodeWithoutNaN - Given an ISD condition code comparing floats,
  91 /// return the equivalent code if we're allowed to assume that NaNs won't occur.
  92 ISD::CondCode getFCmpCodeWithoutNaN(ISD::CondCode CC);
  93
  94 /// getICmpCondCode - Return the ISD condition code corresponding to
  95 /// the given LLVM IR integer condition code.
  96 ///
  97 ISD::CondCode getICmpCondCode(ICmpInst::Predicate Pred);
  98
  99 /// Test if the given instruction is in a position to be optimized
 100 /// with a tail-call. This roughly means that it's in a block with
 101 /// a return and there's nothing that needs to be scheduled
 102 /// between it and the return.
 103 ///
 104 /// This function only tests target-independent requirements.
 105 bool isInTailCallPosition(ImmutableCallSite CS, const TargetMachine &TM);
 106
 107 /// Test if given that the input instruction is in the tail call position, if
 108 /// there is an attribute mismatch between the caller and the callee that will
 109 /// inhibit tail call optimizations.
 110 /// \p AllowDifferingSizes is an output parameter which, if forming a tail call
 111 /// is permitted, determines whether it's permitted only if the size of the
 112 /// caller's and callee's return types match exactly.
 113 bool attributesPermitTailCall(const Function *F, const Instruction *I,
 114                               const ReturnInst *Ret,
 115                               const TargetLoweringBase &TLI,
 116                               bool *AllowDifferingSizes = nullptr);
 117
 118 /// Test if given that the input instruction is in the tail call position if the
 119 /// return type or any attributes of the function will inhibit tail call
 120 /// optimization.
 121 bool returnTypeIsEligibleForTailCall(const Function *F, const Instruction *I,
 122                                      const ReturnInst *Ret,
 123                                      const TargetLoweringBase &TLI);
 124
 125 DenseMap<const MachineBasicBlock *, int>
 126 getEHScopeMembership(const MachineFunction &MF);
 127
 128 } // End llvm namespace
 129
 130 #endif