lib/CodeGen/LiveRegUnits.cpp

   1 //===- LiveRegUnits.cpp - Register Unit Set -------------------------------===//
   2 //
   3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
   4 // See https://llvm.org/LICENSE.txt for license information.
   5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
   6 //
   7 //===----------------------------------------------------------------------===//
   8 //
   9 /// \file This file imlements the LiveRegUnits set.
  10 //
  11 //===----------------------------------------------------------------------===//
  12
  13 #include "llvm/CodeGen/LiveRegUnits.h"
  14
  15 #include "llvm/CodeGen/MachineBasicBlock.h"
  16 #include "llvm/CodeGen/MachineFrameInfo.h"
  17 #include "llvm/CodeGen/MachineFunction.h"
  18 #include "llvm/CodeGen/MachineInstrBundle.h"
  19 #include "llvm/CodeGen/MachineOperand.h"
  20 #include "llvm/CodeGen/MachineRegisterInfo.h"
  21 #include "llvm/CodeGen/TargetRegisterInfo.h"
  22 #include "llvm/MC/MCRegisterInfo.h"
  23
  24 using namespace llvm;
  25
  26 void LiveRegUnits::removeRegsNotPreserved(const uint32_t *RegMask) {
  27   for (unsigned U = 0, E = TRI->getNumRegUnits(); U != E; ++U) {
  28     for (MCRegUnitRootIterator RootReg(U, TRI); RootReg.isValid(); ++RootReg) {
  29       if (MachineOperand::clobbersPhysReg(RegMask, *RootReg))
  30         Units.reset(U);
  31     }
  32   }
  33 }
  34
  35 void LiveRegUnits::addRegsInMask(const uint32_t *RegMask) {
  36   for (unsigned U = 0, E = TRI->getNumRegUnits(); U != E; ++U) {
  37     for (MCRegUnitRootIterator RootReg(U, TRI); RootReg.isValid(); ++RootReg) {
  38       if (MachineOperand::clobbersPhysReg(RegMask, *RootReg))
  39         Units.set(U);
  40     }
  41   }
  42 }
  43
  44 void LiveRegUnits::stepBackward(const MachineInstr &MI) {
  45   // Remove defined registers and regmask kills from the set.
  46   for (ConstMIBundleOperands O(MI); O.isValid(); ++O) {
  47     if (O->isReg()) {
  48       if (!O->isDef() || O->isDebug())
  49         continue;
  50       Register Reg = O->getReg();
  51       if (!Register::isPhysicalRegister(Reg))
  52         continue;
  53       removeReg(Reg);
  54     } else if (O->isRegMask())
  55       removeRegsNotPreserved(O->getRegMask());
  56   }
  57
  58   // Add uses to the set.
  59   for (ConstMIBundleOperands O(MI); O.isValid(); ++O) {
  60     if (!O->isReg() || !O->readsReg() || O->isDebug())
  61       continue;
  62     Register Reg = O->getReg();
  63     if (!Register::isPhysicalRegister(Reg))
  64       continue;
  65     addReg(Reg);
  66   }
  67 }
  68
  69 void LiveRegUnits::accumulate(const MachineInstr &MI) {
  70   // Add defs, uses and regmask clobbers to the set.
  71   for (ConstMIBundleOperands O(MI); O.isValid(); ++O) {
  72     if (O->isReg()) {
  73       Register Reg = O->getReg();
  74       if (!Register::isPhysicalRegister(Reg))
  75         continue;
  76       if (!O->isDef() && !O->readsReg())
  77         continue;
  78       addReg(Reg);
  79     } else if (O->isRegMask())
  80       addRegsInMask(O->getRegMask());
  81   }
  82 }
  83
  84 /// Add live-in registers of basic block \p MBB to \p LiveUnits.
  85 static void addBlockLiveIns(LiveRegUnits &LiveUnits,
  86                             const MachineBasicBlock &MBB) {
  87   for (const auto &LI : MBB.liveins())
  88     LiveUnits.addRegMasked(LI.PhysReg, LI.LaneMask);
  89 }
  90
  91 /// Adds all callee saved registers to \p LiveUnits.
  92 static void addCalleeSavedRegs(LiveRegUnits &LiveUnits,
  93                                const MachineFunction &MF) {
  94   const MachineRegisterInfo &MRI = MF.getRegInfo();
  95   for (const MCPhysReg *CSR = MRI.getCalleeSavedRegs(); CSR && *CSR; ++CSR)
  96     LiveUnits.addReg(*CSR);
  97 }
  98
  99 void LiveRegUnits::addPristines(const MachineFunction &MF) {
 100   const MachineFrameInfo &MFI = MF.getFrameInfo();
 101   if (!MFI.isCalleeSavedInfoValid())
 102     return;
 103   /// This function will usually be called on an empty object, handle this
 104   /// as a special case.
 105   if (empty()) {
 106     /// Add all callee saved regs, then remove the ones that are saved and
 107     /// restored.
 108     addCalleeSavedRegs(*this, MF);
 109     /// Remove the ones that are not saved/restored; they are pristine.
 110     for (const CalleeSavedInfo &Info : MFI.getCalleeSavedInfo())
 111       removeReg(Info.getReg());
 112     return;
 113   }
 114   /// If a callee-saved register that is not pristine is already present
 115   /// in the set, we should make sure that it stays in it. Precompute the
 116   /// set of pristine registers in a separate object.
 117   /// Add all callee saved regs, then remove the ones that are saved+restored.
 118   LiveRegUnits Pristine(*TRI);
 119   addCalleeSavedRegs(Pristine, MF);
 120   /// Remove the ones that are not saved/restored; they are pristine.
 121   for (const CalleeSavedInfo &Info : MFI.getCalleeSavedInfo())
 122     Pristine.removeReg(Info.getReg());
 123   addUnits(Pristine.getBitVector());
 124 }
 125
 126 void LiveRegUnits::addLiveOuts(const MachineBasicBlock &MBB) {
 127   const MachineFunction &MF = *MBB.getParent();
 128
 129   addPristines(MF);
 130
 131   // To get the live-outs we simply merge the live-ins of all successors.
 132   for (const MachineBasicBlock *Succ : MBB.successors())
 133     addBlockLiveIns(*this, *Succ);
 134
 135   // For the return block: Add all callee saved registers.
 136   if (MBB.isReturnBlock()) {
 137     const MachineFrameInfo &MFI = MF.getFrameInfo();
 138     if (MFI.isCalleeSavedInfoValid())
 139       addCalleeSavedRegs(*this, MF);
 140   }
 141 }
 142
 143 void LiveRegUnits::addLiveIns(const MachineBasicBlock &MBB) {
 144   const MachineFunction &MF = *MBB.getParent();
 145   addPristines(MF);
 146   addBlockLiveIns(*this, MBB);
 147 }