lib/Target/MRegisterInfo.cpp

   1 //===- MRegisterInfo.cpp - Target Register Information Implementation -----===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file implements the MRegisterInfo interface.
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14 #include "llvm/Target/TargetMachine.h"
  15 #include "llvm/Target/MRegisterInfo.h"
  16 #include "llvm/Target/TargetFrameInfo.h"
  17 #include "llvm/CodeGen/MachineFunction.h"
  18 #include "llvm/CodeGen/MachineFrameInfo.h"
  19 #include "llvm/CodeGen/MachineLocation.h"
  20 #include "llvm/ADT/BitVector.h"
  21
  22 using namespace llvm;
  23
  24 MRegisterInfo::MRegisterInfo(const TargetRegisterDesc *D, unsigned NR,
  25                              regclass_iterator RCB, regclass_iterator RCE,
  26                              int CFSO, int CFDO)
  27   : Desc(D), NumRegs(NR), RegClassBegin(RCB), RegClassEnd(RCE) {
  28   assert(NumRegs < FirstVirtualRegister &&
  29          "Target has too many physical registers!");
  30
  31   CallFrameSetupOpcode   = CFSO;
  32   CallFrameDestroyOpcode = CFDO;
  33 }
  34
  35 MRegisterInfo::~MRegisterInfo() {}
  36
  37 /// getPhysicalRegisterRegClass - Returns the Register Class of a physical
  38 /// register.
  39 const TargetRegisterClass *
  40 MRegisterInfo::getPhysicalRegisterRegClass(MVT::ValueType VT,
  41                                            unsigned reg) const {
  42   assert(isPhysicalRegister(reg) && "reg must be a physical register");
  43   // Pick the register class of the right type that contains this physreg.
  44   for (regclass_iterator I = regclass_begin(), E = regclass_end(); I != E; ++I)
  45     if ((*I)->hasType(VT) && (*I)->contains(reg))
  46       return *I;
  47   assert(false && "Couldn't find the register class");
  48   return 0;
  49 }
  50
  51
  52 /// getAllocatableSetForRC - Toggle the bits that represent allocatable
  53 /// registers for the specific register class.
  54 static void getAllocatableSetForRC(MachineFunction &MF,
  55                                    const TargetRegisterClass *RC, BitVector &R){
  56   for (TargetRegisterClass::iterator I = RC->allocation_order_begin(MF),
  57          E = RC->allocation_order_end(MF); I != E; ++I)
  58     R.set(*I);
  59 }
  60
  61 BitVector MRegisterInfo::getAllocatableSet(MachineFunction &MF,
  62                                            const TargetRegisterClass *RC) const {
  63   BitVector Allocatable(NumRegs);
  64   if (RC) {
  65     getAllocatableSetForRC(MF, RC, Allocatable);
  66     return Allocatable;
  67   }
  68
  69   for (MRegisterInfo::regclass_iterator I = regclass_begin(),
  70          E = regclass_end(); I != E; ++I)
  71     getAllocatableSetForRC(MF, *I, Allocatable);
  72   return Allocatable;
  73 }
  74
  75 /// getLocation - This method should return the actual location of a frame
  76 /// variable given the frame index.  The location is returned in ML.
  77 /// Subclasses should override this method for special handling of frame
  78 /// variables and then call MRegisterInfo::getLocation for the default action.
  79 void MRegisterInfo::getLocation(MachineFunction &MF, unsigned Index,
  80                         MachineLocation &ML) const {
  81   const TargetFrameInfo &TFI = *MF.getTarget().getFrameInfo();
  82   MachineFrameInfo *MFI = MF.getFrameInfo();
  83   ML.set(getFrameRegister(MF),
  84          MFI->getObjectOffset(Index) +
  85          MFI->getStackSize() -
  86          TFI.getOffsetOfLocalArea() +
  87          MFI->getOffsetAdjustment());
  88 }
  89
  90 /// getInitialFrameState - Returns a list of machine moves that are assumed
  91 /// on entry to a function.
  92 void
  93 MRegisterInfo::getInitialFrameState(std::vector<MachineMove> &Moves) const {
  94   // Default is to do nothing.
  95 }
  96