utils/TableGen/RegisterInfoEmitter.cpp

   1 //===- RegisterInfoEmitter.cpp - Generate a Register File Desc. -*- C++ -*-===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This tablegen backend is responsible for emitting a description of a target
  11 // register file for a code generator.  It uses instances of the Register,
  12 // RegisterAliases, and RegisterClass classes to gather this information.
  13 //
  14 //===----------------------------------------------------------------------===//
  15
  16 #include "RegisterInfoEmitter.h"
  17 #include "CodeGenTarget.h"
  18 #include "CodeGenRegisters.h"
  19 #include "Record.h"
  20 #include "llvm/ADT/StringExtras.h"
  21 #include "llvm/ADT/STLExtras.h"
  22 #include "llvm/Support/Streams.h"
  23 #include <set>
  24 using namespace llvm;
  25
  26 // runEnums - Print out enum values for all of the registers.
  27 void RegisterInfoEmitter::runEnums(std::ostream &OS) {
  28   CodeGenTarget Target;
  29   const std::vector<CodeGenRegister> &Registers = Target.getRegisters();
  30
  31   std::string Namespace = Registers[0].TheDef->getValueAsString("Namespace");
  32
  33   EmitSourceFileHeader("Target Register Enum Values", OS);
  34   OS << "namespace llvm {\n\n";
  35
  36   if (!Namespace.empty())
  37     OS << "namespace " << Namespace << " {\n";
  38   OS << "  enum {\n    NoRegister,\n";
  39
  40   for (unsigned i = 0, e = Registers.size(); i != e; ++i)
  41     OS << "    " << Registers[i].getName() << ", \t// " << i+1 << "\n";
  42   OS << "    NUM_TARGET_REGS \t// " << Registers.size()+1 << "\n";
  43   OS << "  };\n";
  44   if (!Namespace.empty())
  45     OS << "}\n";
  46   OS << "} // End llvm namespace \n";
  47 }
  48
  49 void RegisterInfoEmitter::runHeader(std::ostream &OS) {
  50   EmitSourceFileHeader("Register Information Header Fragment", OS);
  51   CodeGenTarget Target;
  52   const std::string &TargetName = Target.getName();
  53   std::string ClassName = TargetName + "GenRegisterInfo";
  54
  55   OS << "#include \"llvm/Target/MRegisterInfo.h\"\n";
  56   OS << "#include <string>\n\n";
  57
  58   OS << "namespace llvm {\n\n";
  59
  60   OS << "struct " << ClassName << " : public MRegisterInfo {\n"
  61      << "  " << ClassName
  62      << "(int CallFrameSetupOpcode = -1, int CallFrameDestroyOpcode = -1);\n"
  63      << "  virtual int getDwarfRegNumFull(unsigned RegNum, "
  64      << "unsigned Flavour) const;\n"
  65      << "  virtual int getDwarfRegNum(unsigned RegNum, bool isEH) const = 0;\n"
  66      << "  unsigned getSubReg(unsigned RegNo, unsigned Index) const;\n"
  67      << "};\n\n";
  68
  69   const std::vector<CodeGenRegisterClass> &RegisterClasses =
  70     Target.getRegisterClasses();
  71
  72   if (!RegisterClasses.empty()) {
  73     OS << "namespace " << RegisterClasses[0].Namespace
  74        << " { // Register classes\n";
  75
  76     OS << "  enum {\n";
  77     for (unsigned i = 0, e = RegisterClasses.size(); i != e; ++i) {
  78       if (i) OS << ",\n";
  79       OS << "    " << RegisterClasses[i].getName() << "RegClassID";
  80       if (!i) OS << " = 1";
  81     }
  82     OS << "\n  };\n\n";
  83
  84     for (unsigned i = 0, e = RegisterClasses.size(); i != e; ++i) {
  85       const std::string &Name = RegisterClasses[i].getName();
  86
  87       // Output the register class definition.
  88       OS << "  struct " << Name << "Class : public TargetRegisterClass {\n"
  89          << "    " << Name << "Class();\n"
  90          << RegisterClasses[i].MethodProtos << "  };\n";
  91
  92       // Output the extern for the instance.
  93       OS << "  extern " << Name << "Class\t" << Name << "RegClass;\n";
  94       // Output the extern for the pointer to the instance (should remove).
  95       OS << "  static TargetRegisterClass * const "<< Name <<"RegisterClass = &"
  96          << Name << "RegClass;\n";
  97     }
  98     OS << "} // end of namespace " << TargetName << "\n\n";
  99   }
 100   OS << "} // End llvm namespace \n";
 101 }
 102
 103 bool isSubRegisterClass(const CodeGenRegisterClass &RC,
 104                         std::set<Record*> &RegSet) {
 105   for (unsigned i = 0, e = RC.Elements.size(); i != e; ++i) {
 106     Record *Reg = RC.Elements[i];
 107     if (!RegSet.count(Reg))
 108       return false;
 109   }
 110   return true;
 111 }
 112
 113 static void addSuperReg(Record *R, Record *S,
 114                         std::map<Record*, std::set<Record*> > &SubRegs,
 115                         std::map<Record*, std::set<Record*> > &SuperRegs,
 116                         std::map<Record*, std::set<Record*> > &Aliases) {
 117   if (R == S) {
 118     cerr << "Error: recursive sub-register relationship between"
 119          << " register " << getQualifiedName(R)
 120          << " and its sub-registers?\n";
 121     abort();
 122   }
 123   if (!SuperRegs[R].insert(S).second)
 124     return;
 125   SubRegs[S].insert(R);
 126   Aliases[R].insert(S);
 127   Aliases[S].insert(R);
 128   if (SuperRegs.count(S))
 129     for (std::set<Record*>::iterator I = SuperRegs[S].begin(),
 130            E = SuperRegs[S].end(); I != E; ++I)
 131       addSuperReg(R, *I, SubRegs, SuperRegs, Aliases);
 132 }
 133
 134 static void addSubSuperReg(Record *R, Record *S,
 135                            std::map<Record*, std::set<Record*> > &SubRegs,
 136                            std::map<Record*, std::set<Record*> > &SuperRegs,
 137                            std::map<Record*, std::set<Record*> > &Aliases) {
 138   if (R == S) {
 139     cerr << "Error: recursive sub-register relationship between"
 140          << " register " << getQualifiedName(R)
 141          << " and its sub-registers?\n";
 142     abort();
 143   }
 144
 145   if (!SubRegs[R].insert(S).second)
 146     return;
 147   addSuperReg(S, R, SubRegs, SuperRegs, Aliases);
 148   Aliases[R].insert(S);
 149   Aliases[S].insert(R);
 150   if (SubRegs.count(S))
 151     for (std::set<Record*>::iterator I = SubRegs[S].begin(),
 152            E = SubRegs[S].end(); I != E; ++I)
 153       addSubSuperReg(R, *I, SubRegs, SuperRegs, Aliases);
 154 }
 155
 156 // RegisterInfoEmitter::run - Main register file description emitter.
 157 //
 158 void RegisterInfoEmitter::run(std::ostream &OS) {
 159   CodeGenTarget Target;
 160   EmitSourceFileHeader("Register Information Source Fragment", OS);
 161
 162   OS << "namespace llvm {\n\n";
 163
 164   // Start out by emitting each of the register classes... to do this, we build
 165   // a set of registers which belong to a register class, this is to ensure that
 166   // each register is only in a single register class.
 167   //
 168   const std::vector<CodeGenRegisterClass> &RegisterClasses =
 169     Target.getRegisterClasses();
 170
 171   // Loop over all of the register classes... emitting each one.
 172   OS << "namespace {     // Register classes...\n";
 173
 174   // RegClassesBelongedTo - Keep track of which register classes each reg
 175   // belongs to.
 176   std::multimap<Record*, const CodeGenRegisterClass*> RegClassesBelongedTo;
 177
 178   // Emit the register enum value arrays for each RegisterClass
 179   for (unsigned rc = 0, e = RegisterClasses.size(); rc != e; ++rc) {
 180     const CodeGenRegisterClass &RC = RegisterClasses[rc];
 181
 182     // Give the register class a legal C name if it's anonymous.
 183     std::string Name = RC.TheDef->getName();
 184
 185     // Emit the register list now.
 186     OS << "  // " << Name << " Register Class...\n"
 187        << "  static const unsigned " << Name
 188        << "[] = {\n    ";
 189     for (unsigned i = 0, e = RC.Elements.size(); i != e; ++i) {
 190       Record *Reg = RC.Elements[i];
 191       OS << getQualifiedName(Reg) << ", ";
 192
 193       // Keep track of which regclasses this register is in.
 194       RegClassesBelongedTo.insert(std::make_pair(Reg, &RC));
 195     }
 196     OS << "\n  };\n\n";
 197   }
 198
 199   // Emit the ValueType arrays for each RegisterClass
 200   for (unsigned rc = 0, e = RegisterClasses.size(); rc != e; ++rc) {
 201     const CodeGenRegisterClass &RC = RegisterClasses[rc];
 202
 203     // Give the register class a legal C name if it's anonymous.
 204     std::string Name = RC.TheDef->getName() + "VTs";
 205
 206     // Emit the register list now.
 207     OS << "  // " << Name
 208        << " Register Class Value Types...\n"
 209        << "  static const MVT::ValueType " << Name
 210        << "[] = {\n    ";
 211     for (unsigned i = 0, e = RC.VTs.size(); i != e; ++i)
 212       OS << getEnumName(RC.VTs[i]) << ", ";
 213     OS << "MVT::Other\n  };\n\n";
 214   }
 215   OS << "}  // end anonymous namespace\n\n";
 216
 217   // Now that all of the structs have been emitted, emit the instances.
 218   if (!RegisterClasses.empty()) {
 219     OS << "namespace " << RegisterClasses[0].Namespace
 220        << " {   // Register class instances\n";
 221     for (unsigned i = 0, e = RegisterClasses.size(); i != e; ++i)
 222       OS << "  " << RegisterClasses[i].getName()  << "Class\t"
 223          << RegisterClasses[i].getName() << "RegClass;\n";
 224
 225     std::map<unsigned, std::set<unsigned> > SuperClassMap;
 226     std::map<unsigned, std::set<unsigned> > SuperRegClassMap;
 227     OS << "\n";
 228
 229     // Emit the sub-register classes for each RegisterClass
 230     for (unsigned rc = 0, e = RegisterClasses.size(); rc != e; ++rc) {
 231       const CodeGenRegisterClass &RC = RegisterClasses[rc];
 232
 233       // Give the register class a legal C name if it's anonymous.
 234       std::string Name = RC.TheDef->getName();
 235
 236       OS << "  // " << Name
 237          << " Sub-register Classess...\n"
 238          << "  static const TargetRegisterClass* const "
 239          << Name << "SubRegClasses [] = {\n    ";
 240
 241       bool Empty = true;
 242
 243       for (unsigned subrc = 0, subrcMax = RC.SubRegClasses.size();
 244             subrc != subrcMax; ++subrc) {
 245         unsigned rc2 = 0, e2 = RegisterClasses.size();
 246         for (; rc2 != e2; ++rc2) {
 247           const CodeGenRegisterClass &RC2 =  RegisterClasses[rc2];
 248           if (RC.SubRegClasses[subrc]->getName() == RC2.getName()) {
 249             if (!Empty)
 250               OS << ", ";
 251             OS << "&" << getQualifiedName(RC2.TheDef) << "RegClass";
 252             Empty = false;
 253
 254             std::map<unsigned, std::set<unsigned> >::iterator SCMI =
 255               SuperRegClassMap.find(rc2);
 256             if (SCMI == SuperRegClassMap.end()) {
 257               SuperRegClassMap.insert(std::make_pair(rc2, std::set<unsigned>()));
 258               SCMI = SuperRegClassMap.find(rc2);
 259             }
 260             SCMI->second.insert(rc);
 261             break;
 262           }
 263         }
 264         if (rc2 == e2)
 265           throw "Register Class member '" +
 266             RC.SubRegClasses[subrc]->getName() +
 267             "' is not a valid RegisterClass!";
 268       }
 269
 270       OS << (!Empty ? ", " : "") << "NULL";
 271       OS << "\n  };\n\n";
 272     }
 273
 274     // Emit the super-register classes for each RegisterClass
 275     for (unsigned rc = 0, e = RegisterClasses.size(); rc != e; ++rc) {
 276       const CodeGenRegisterClass &RC = RegisterClasses[rc];
 277
 278       // Give the register class a legal C name if it's anonymous.
 279       std::string Name = RC.TheDef->getName();
 280
 281       OS << "  // " << Name
 282          << " Super-register Classess...\n"
 283          << "  static const TargetRegisterClass* const "
 284          << Name << "SuperRegClasses [] = {\n    ";
 285
 286       bool Empty = true;
 287       std::map<unsigned, std::set<unsigned> >::iterator I =
 288         SuperRegClassMap.find(rc);
 289       if (I != SuperRegClassMap.end()) {
 290         for (std::set<unsigned>::iterator II = I->second.begin(),
 291                EE = I->second.end(); II != EE; ++II) {
 292           const CodeGenRegisterClass &RC2 = RegisterClasses[*II];
 293           if (!Empty)
 294             OS << ", ";
 295           OS << "&" << getQualifiedName(RC2.TheDef) << "RegClass";
 296           Empty = false;
 297         }
 298       }
 299
 300       OS << (!Empty ? ", " : "") << "NULL";
 301       OS << "\n  };\n\n";
 302     }
 303
 304     // Emit the sub-classes array for each RegisterClass
 305     for (unsigned rc = 0, e = RegisterClasses.size(); rc != e; ++rc) {
 306       const CodeGenRegisterClass &RC = RegisterClasses[rc];
 307
 308       // Give the register class a legal C name if it's anonymous.
 309       std::string Name = RC.TheDef->getName();
 310
 311       std::set<Record*> RegSet;
 312       for (unsigned i = 0, e = RC.Elements.size(); i != e; ++i) {
 313         Record *Reg = RC.Elements[i];
 314         RegSet.insert(Reg);
 315       }
 316
 317       OS << "  // " << Name
 318          << " Register Class sub-classes...\n"
 319          << "  static const TargetRegisterClass* const "
 320          << Name << "Subclasses [] = {\n    ";
 321
 322       bool Empty = true;
 323       for (unsigned rc2 = 0, e2 = RegisterClasses.size(); rc2 != e2; ++rc2) {
 324         const CodeGenRegisterClass &RC2 = RegisterClasses[rc2];
 325         if (rc == rc2 || RC2.Elements.size() > RC.Elements.size() ||
 326             RC.SpillSize != RC2.SpillSize || !isSubRegisterClass(RC2, RegSet))
 327           continue;
 328
 329         if (!Empty) OS << ", ";
 330         OS << "&" << getQualifiedName(RC2.TheDef) << "RegClass";
 331         Empty = false;
 332
 333         std::map<unsigned, std::set<unsigned> >::iterator SCMI =
 334           SuperClassMap.find(rc2);
 335         if (SCMI == SuperClassMap.end()) {
 336           SuperClassMap.insert(std::make_pair(rc2, std::set<unsigned>()));
 337           SCMI = SuperClassMap.find(rc2);
 338         }
 339         SCMI->second.insert(rc);
 340       }
 341
 342       OS << (!Empty ? ", " : "") << "NULL";
 343       OS << "\n  };\n\n";
 344     }
 345
 346     for (unsigned rc = 0, e = RegisterClasses.size(); rc != e; ++rc) {
 347       const CodeGenRegisterClass &RC = RegisterClasses[rc];
 348
 349       // Give the register class a legal C name if it's anonymous.
 350       std::string Name = RC.TheDef->getName();
 351
 352       OS << "  // " << Name
 353          << " Register Class super-classes...\n"
 354          << "  static const TargetRegisterClass* const "
 355          << Name << "Superclasses [] = {\n    ";
 356
 357       bool Empty = true;
 358       std::map<unsigned, std::set<unsigned> >::iterator I =
 359         SuperClassMap.find(rc);
 360       if (I != SuperClassMap.end()) {
 361         for (std::set<unsigned>::iterator II = I->second.begin(),
 362                EE = I->second.end(); II != EE; ++II) {
 363           const CodeGenRegisterClass &RC2 = RegisterClasses[*II];
 364           if (!Empty) OS << ", ";
 365           OS << "&" << getQualifiedName(RC2.TheDef) << "RegClass";
 366           Empty = false;
 367         }
 368       }
 369
 370       OS << (!Empty ? ", " : "") << "NULL";
 371       OS << "\n  };\n\n";
 372     }
 373
 374
 375     for (unsigned i = 0, e = RegisterClasses.size(); i != e; ++i) {
 376       const CodeGenRegisterClass &RC = RegisterClasses[i];
 377       OS << RC.MethodBodies << "\n";
 378       OS << RC.getName() << "Class::" << RC.getName()
 379          << "Class()  : TargetRegisterClass("
 380          << RC.getName() + "RegClassID" << ", "
 381          << RC.getName() + "VTs" << ", "
 382          << RC.getName() + "Subclasses" << ", "
 383          << RC.getName() + "Superclasses" << ", "
 384          << RC.getName() + "SubRegClasses" << ", "
 385          << RC.getName() + "SuperRegClasses" << ", "
 386          << RC.SpillSize/8 << ", "
 387          << RC.SpillAlignment/8 << ", "
 388          << RC.CopyCost << ", "
 389          << RC.getName() << ", " << RC.getName() << " + " << RC.Elements.size()
 390          << ") {}\n";
 391     }
 392
 393     OS << "}\n";
 394   }
 395
 396   OS << "\nnamespace {\n";
 397   OS << "  const TargetRegisterClass* const RegisterClasses[] = {\n";
 398   for (unsigned i = 0, e = RegisterClasses.size(); i != e; ++i)
 399     OS << "    &" << getQualifiedName(RegisterClasses[i].TheDef)
 400        << "RegClass,\n";
 401   OS << "  };\n";
 402
 403   // Emit register sub-registers / super-registers, aliases...
 404   std::map<Record*, std::set<Record*> > RegisterImmSubRegs;
 405   std::map<Record*, std::set<Record*> > RegisterSubRegs;
 406   std::map<Record*, std::set<Record*> > RegisterSuperRegs;
 407   std::map<Record*, std::set<Record*> > RegisterAliases;
 408   std::map<Record*, std::vector<std::pair<int, Record*> > > SubRegVectors;
 409   std::map<Record*, std::vector<int> > DwarfRegNums;
 410
 411   const std::vector<CodeGenRegister> &Regs = Target.getRegisters();
 412
 413   for (unsigned i = 0, e = Regs.size(); i != e; ++i) {
 414     Record *R = Regs[i].TheDef;
 415     std::vector<Record*> LI = Regs[i].TheDef->getValueAsListOfDefs("Aliases");
 416     // Add information that R aliases all of the elements in the list... and
 417     // that everything in the list aliases R.
 418     for (unsigned j = 0, e = LI.size(); j != e; ++j) {
 419       Record *Reg = LI[j];
 420       if (RegisterAliases[R].count(Reg))
 421         cerr << "Warning: register alias between " << getQualifiedName(R)
 422              << " and " << getQualifiedName(Reg)
 423              << " specified multiple times!\n";
 424       RegisterAliases[R].insert(Reg);
 425
 426       if (RegisterAliases[Reg].count(R))
 427         cerr << "Warning: register alias between " << getQualifiedName(R)
 428              << " and " << getQualifiedName(Reg)
 429              << " specified multiple times!\n";
 430       RegisterAliases[Reg].insert(R);
 431     }
 432   }
 433
 434   // Process sub-register sets.
 435   for (unsigned i = 0, e = Regs.size(); i != e; ++i) {
 436     Record *R = Regs[i].TheDef;
 437     std::vector<Record*> LI = Regs[i].TheDef->getValueAsListOfDefs("SubRegs");
 438     // Process sub-register set and add aliases information.
 439     for (unsigned j = 0, e = LI.size(); j != e; ++j) {
 440       Record *SubReg = LI[j];
 441       if (RegisterSubRegs[R].count(SubReg))
 442         cerr << "Warning: register " << getQualifiedName(SubReg)
 443              << " specified as a sub-register of " << getQualifiedName(R)
 444              << " multiple times!\n";
 445       RegisterImmSubRegs[R].insert(SubReg);
 446       addSubSuperReg(R, SubReg, RegisterSubRegs, RegisterSuperRegs,
 447                      RegisterAliases);
 448     }
 449   }
 450
 451   if (!RegisterAliases.empty())
 452     OS << "\n\n  // Register Alias Sets...\n";
 453
 454   // Emit the empty alias list
 455   OS << "  const unsigned Empty_AliasSet[] = { 0 };\n";
 456   // Loop over all of the registers which have aliases, emitting the alias list
 457   // to memory.
 458   for (std::map<Record*, std::set<Record*> >::iterator
 459          I = RegisterAliases.begin(), E = RegisterAliases.end(); I != E; ++I) {
 460     OS << "  const unsigned " << I->first->getName() << "_AliasSet[] = { ";
 461     for (std::set<Record*>::iterator ASI = I->second.begin(),
 462            E = I->second.end(); ASI != E; ++ASI)
 463       OS << getQualifiedName(*ASI) << ", ";
 464     OS << "0 };\n";
 465   }
 466
 467   if (!RegisterSubRegs.empty())
 468     OS << "\n\n  // Register Sub-registers Sets...\n";
 469
 470   // Emit the empty sub-registers list
 471   OS << "  const unsigned Empty_SubRegsSet[] = { 0 };\n";
 472   // Loop over all of the registers which have sub-registers, emitting the
 473   // sub-registers list to memory.
 474   for (std::map<Record*, std::set<Record*> >::iterator
 475          I = RegisterSubRegs.begin(), E = RegisterSubRegs.end(); I != E; ++I) {
 476     OS << "  const unsigned " << I->first->getName() << "_SubRegsSet[] = { ";
 477     for (std::set<Record*>::iterator ASI = I->second.begin(),
 478            E = I->second.end(); ASI != E; ++ASI)
 479       OS << getQualifiedName(*ASI) << ", ";
 480     OS << "0 };\n";
 481   }
 482
 483   if (!RegisterImmSubRegs.empty())
 484     OS << "\n\n  // Register Immediate Sub-registers Sets...\n";
 485
 486   // Loop over all of the registers which have sub-registers, emitting the
 487   // sub-registers list to memory.
 488   for (std::map<Record*, std::set<Record*> >::iterator
 489          I = RegisterImmSubRegs.begin(), E = RegisterImmSubRegs.end();
 490        I != E; ++I) {
 491     OS << "  const unsigned " << I->first->getName() << "_ImmSubRegsSet[] = { ";
 492     for (std::set<Record*>::iterator ASI = I->second.begin(),
 493            E = I->second.end(); ASI != E; ++ASI)
 494       OS << getQualifiedName(*ASI) << ", ";
 495     OS << "0 };\n";
 496   }
 497
 498   if (!RegisterSuperRegs.empty())
 499     OS << "\n\n  // Register Super-registers Sets...\n";
 500
 501   // Emit the empty super-registers list
 502   OS << "  const unsigned Empty_SuperRegsSet[] = { 0 };\n";
 503   // Loop over all of the registers which have super-registers, emitting the
 504   // super-registers list to memory.
 505   for (std::map<Record*, std::set<Record*> >::iterator
 506          I = RegisterSuperRegs.begin(), E = RegisterSuperRegs.end(); I != E; ++I) {
 507     OS << "  const unsigned " << I->first->getName() << "_SuperRegsSet[] = { ";
 508     for (std::set<Record*>::iterator ASI = I->second.begin(),
 509            E = I->second.end(); ASI != E; ++ASI)
 510       OS << getQualifiedName(*ASI) << ", ";
 511     OS << "0 };\n";
 512   }
 513
 514   OS<<"\n  const TargetRegisterDesc RegisterDescriptors[] = { // Descriptors\n";
 515   OS << "    { \"NOREG\",\t0,\t0,\t0,\t0 },\n";
 516
 517   // Now that register alias and sub-registers sets have been emitted, emit the
 518   // register descriptors now.
 519   const std::vector<CodeGenRegister> &Registers = Target.getRegisters();
 520   for (unsigned i = 0, e = Registers.size(); i != e; ++i) {
 521     const CodeGenRegister &Reg = Registers[i];
 522     OS << "    { \"";
 523     if (!Reg.TheDef->getValueAsString("Name").empty())
 524       OS << Reg.TheDef->getValueAsString("Name");
 525     else
 526       OS << Reg.getName();
 527     OS << "\",\t";
 528     if (RegisterAliases.count(Reg.TheDef))
 529       OS << Reg.getName() << "_AliasSet,\t";
 530     else
 531       OS << "Empty_AliasSet,\t";
 532     if (RegisterSubRegs.count(Reg.TheDef))
 533       OS << Reg.getName() << "_SubRegsSet,\t";
 534     else
 535       OS << "Empty_SubRegsSet,\t";
 536     if (RegisterImmSubRegs.count(Reg.TheDef))
 537       OS << Reg.getName() << "_ImmSubRegsSet,\t";
 538     else
 539       OS << "Empty_SubRegsSet,\t";
 540     if (RegisterSuperRegs.count(Reg.TheDef))
 541       OS << Reg.getName() << "_SuperRegsSet },\n";
 542     else
 543       OS << "Empty_SuperRegsSet },\n";
 544   }
 545   OS << "  };\n";      // End of register descriptors...
 546   OS << "}\n\n";       // End of anonymous namespace...
 547
 548   std::string ClassName = Target.getName() + "GenRegisterInfo";
 549
 550   // Calculate the mapping of subregister+index pairs to physical registers.
 551   std::vector<Record*> SubRegs = Records.getAllDerivedDefinitions("SubRegSet");
 552   for (unsigned i = 0, e = SubRegs.size(); i != e; ++i) {
 553     int subRegIndex = SubRegs[i]->getValueAsInt("index");
 554     std::vector<Record*> From = SubRegs[i]->getValueAsListOfDefs("From");
 555     std::vector<Record*> To   = SubRegs[i]->getValueAsListOfDefs("To");
 556
 557     if (From.size() != To.size()) {
 558       cerr << "Error: register list and sub-register list not of equal length"
 559            << " in SubRegSet\n";
 560       exit(1);
 561     }
 562
 563     // For each entry in from/to vectors, insert the to register at index
 564     for (unsigned ii = 0, ee = From.size(); ii != ee; ++ii)
 565       SubRegVectors[From[ii]].push_back(std::make_pair(subRegIndex, To[ii]));
 566   }
 567
 568   // Emit the subregister + index mapping function based on the information
 569   // calculated above.
 570   OS << "unsigned " << ClassName
 571      << "::getSubReg(unsigned RegNo, unsigned Index) const {\n"
 572      << "  switch (RegNo) {\n"
 573      << "  default: abort(); break;\n";
 574   for (std::map<Record*, std::vector<std::pair<int, Record*> > >::iterator
 575         I = SubRegVectors.begin(), E = SubRegVectors.end(); I != E; ++I) {
 576     OS << "  case " << getQualifiedName(I->first) << ":\n";
 577     OS << "    switch (Index) {\n";
 578     OS << "    default: abort(); break;\n";
 579     for (unsigned i = 0, e = I->second.size(); i != e; ++i)
 580       OS << "    case " << (I->second)[i].first << ": return "
 581          << getQualifiedName((I->second)[i].second) << ";\n";
 582     OS << "    }; break;\n";
 583   }
 584   OS << "  };\n";
 585   OS << "  return 0;\n";
 586   OS << "}\n\n";
 587
 588   // Emit the constructor of the class...
 589   OS << ClassName << "::" << ClassName
 590      << "(int CallFrameSetupOpcode, int CallFrameDestroyOpcode)\n"
 591      << "  : MRegisterInfo(RegisterDescriptors, " << Registers.size()+1
 592      << ", RegisterClasses, RegisterClasses+" << RegisterClasses.size() <<",\n "
 593      << "                 CallFrameSetupOpcode, CallFrameDestroyOpcode) {}\n\n";
 594
 595   // Collect all information about dwarf register numbers
 596
 597   // First, just pull all provided information to the map
 598   unsigned maxLength = 0;
 599   for (unsigned i = 0, e = Registers.size(); i != e; ++i) {
 600     Record *Reg = Registers[i].TheDef;
 601     std::vector<int> RegNums = Reg->getValueAsListOfInts("DwarfNumbers");
 602     maxLength = std::max((size_t)maxLength, RegNums.size());
 603     if (DwarfRegNums.count(Reg))
 604       cerr << "Warning: DWARF numbers for register " << getQualifiedName(Reg)
 605            << "specified multiple times\n";
 606     DwarfRegNums[Reg] = RegNums;
 607   }
 608
 609   // Now we know maximal length of number list. Append -1's, where needed
 610   for (std::map<Record*, std::vector<int> >::iterator
 611         I = DwarfRegNums.begin(), E = DwarfRegNums.end(); I != E; ++I)
 612     for (unsigned i = I->second.size(), e = maxLength; i != e; ++i)
 613       I->second.push_back(-1);
 614
 615   // Emit information about the dwarf register numbers.
 616   OS << "int " << ClassName << "::getDwarfRegNumFull(unsigned RegNum, "
 617      << "unsigned Flavour) const {\n"
 618      << "  switch (Flavour) {\n"
 619      << "  default:\n"
 620      << "    assert(0 && \"Unknown DWARF flavour\");\n"
 621      << "    return -1;\n";
 622
 623   for (unsigned i = 0, e = maxLength; i != e; ++i) {
 624     OS << "  case " << i << ":\n"
 625        << "    switch (RegNum) {\n"
 626        << "    default:\n"
 627        << "      assert(0 && \"Invalid RegNum\");\n"
 628        << "      return -1;\n";
 629
 630     for (std::map<Record*, std::vector<int> >::iterator
 631            I = DwarfRegNums.begin(), E = DwarfRegNums.end(); I != E; ++I) {
 632       int RegNo = I->second[i];
 633       if (RegNo != -2)
 634         OS << "    case " << getQualifiedName(I->first) << ":\n"
 635            << "      return " << RegNo << ";\n";
 636       else
 637         OS << "    case " << getQualifiedName(I->first) << ":\n"
 638            << "      assert(0 && \"Invalid register for this mode\");\n"
 639            << "      return -1;\n";
 640     }
 641     OS << "    };\n";
 642   }
 643
 644   OS << "  };\n}\n\n";
 645
 646   OS << "} // End llvm namespace \n";
 647 }