Fix bugs section.
[llvm-complete.git] / utils / TableGen / SubtargetEmitter.cpp
blob1f34bcc2177ad9aa7628bb1f9b3733c45b3bb7ca
1 //===- SubtargetEmitter.cpp - Generate subtarget enumerations -------------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This tablegen backend emits subtarget enumerations.
12 //===----------------------------------------------------------------------===//
14 #include "SubtargetEmitter.h"
15 #include "CodeGenTarget.h"
16 #include "Record.h"
17 #include "llvm/ADT/StringExtras.h"
18 #include "llvm/Support/Debug.h"
19 #include <algorithm>
20 using namespace llvm;
23 // Record sort by name function.
25 struct LessRecord {
26 bool operator()(const Record *Rec1, const Record *Rec2) const {
27 return Rec1->getName() < Rec2->getName();
32 // Record sort by field "Name" function.
34 struct LessRecordFieldName {
35 bool operator()(const Record *Rec1, const Record *Rec2) const {
36 return Rec1->getValueAsString("Name") < Rec2->getValueAsString("Name");
41 // Enumeration - Emit the specified class as an enumeration.
43 void SubtargetEmitter::Enumeration(std::ostream &OS,
44 const char *ClassName,
45 bool isBits) {
46 // Get all records of class and sort
47 std::vector<Record*> DefList = Records.getAllDerivedDefinitions(ClassName);
48 std::sort(DefList.begin(), DefList.end(), LessRecord());
50 // Open enumeration
51 OS << "enum {\n";
53 // For each record
54 for (unsigned i = 0, N = DefList.size(); i < N;) {
55 // Next record
56 Record *Def = DefList[i];
58 // Get and emit name
59 OS << " " << Def->getName();
61 // If bit flags then emit expression (1 << i)
62 if (isBits) OS << " = " << " 1 << " << i;
64 // Depending on 'if more in the list' emit comma
65 if (++i < N) OS << ",";
67 OS << "\n";
70 // Close enumeration
71 OS << "};\n";
75 // FeatureKeyValues - Emit data of all the subtarget features. Used by the
76 // command line.
78 void SubtargetEmitter::FeatureKeyValues(std::ostream &OS) {
79 // Gather and sort all the features
80 std::vector<Record*> FeatureList =
81 Records.getAllDerivedDefinitions("SubtargetFeature");
82 std::sort(FeatureList.begin(), FeatureList.end(), LessRecord());
84 // Begin feature table
85 OS << "// Sorted (by key) array of values for CPU features.\n"
86 << "static llvm::SubtargetFeatureKV FeatureKV[] = {\n";
88 // For each feature
89 for (unsigned i = 0, N = FeatureList.size(); i < N; ++i) {
90 // Next feature
91 Record *Feature = FeatureList[i];
93 const std::string &Name = Feature->getName();
94 const std::string &CommandLineName = Feature->getValueAsString("Name");
95 const std::string &Desc = Feature->getValueAsString("Desc");
97 if (CommandLineName.empty()) continue;
99 // Emit as { "feature", "decription", feactureEnum, i1 | i2 | ... | in }
100 OS << " { "
101 << "\"" << CommandLineName << "\", "
102 << "\"" << Desc << "\", "
103 << Name << ", ";
105 const std::vector<Record*> &ImpliesList =
106 Feature->getValueAsListOfDefs("Implies");
108 if (ImpliesList.empty()) {
109 OS << "0";
110 } else {
111 for (unsigned j = 0, M = ImpliesList.size(); j < M;) {
112 OS << ImpliesList[j]->getName();
113 if (++j < M) OS << " | ";
117 OS << " }";
119 // Depending on 'if more in the list' emit comma
120 if ((i + 1) < N) OS << ",";
122 OS << "\n";
125 // End feature table
126 OS << "};\n";
128 // Emit size of table
129 OS<<"\nenum {\n";
130 OS<<" FeatureKVSize = sizeof(FeatureKV)/sizeof(llvm::SubtargetFeatureKV)\n";
131 OS<<"};\n";
135 // CPUKeyValues - Emit data of all the subtarget processors. Used by command
136 // line.
138 void SubtargetEmitter::CPUKeyValues(std::ostream &OS) {
139 // Gather and sort processor information
140 std::vector<Record*> ProcessorList =
141 Records.getAllDerivedDefinitions("Processor");
142 std::sort(ProcessorList.begin(), ProcessorList.end(), LessRecordFieldName());
144 // Begin processor table
145 OS << "// Sorted (by key) array of values for CPU subtype.\n"
146 << "static const llvm::SubtargetFeatureKV SubTypeKV[] = {\n";
148 // For each processor
149 for (unsigned i = 0, N = ProcessorList.size(); i < N;) {
150 // Next processor
151 Record *Processor = ProcessorList[i];
153 const std::string &Name = Processor->getValueAsString("Name");
154 const std::vector<Record*> &FeatureList =
155 Processor->getValueAsListOfDefs("Features");
157 // Emit as { "cpu", "description", f1 | f2 | ... fn },
158 OS << " { "
159 << "\"" << Name << "\", "
160 << "\"Select the " << Name << " processor\", ";
162 if (FeatureList.empty()) {
163 OS << "0";
164 } else {
165 for (unsigned j = 0, M = FeatureList.size(); j < M;) {
166 OS << FeatureList[j]->getName();
167 if (++j < M) OS << " | ";
171 // The "0" is for the "implies" section of this data structure.
172 OS << ", 0 }";
174 // Depending on 'if more in the list' emit comma
175 if (++i < N) OS << ",";
177 OS << "\n";
180 // End processor table
181 OS << "};\n";
183 // Emit size of table
184 OS<<"\nenum {\n";
185 OS<<" SubTypeKVSize = sizeof(SubTypeKV)/sizeof(llvm::SubtargetFeatureKV)\n";
186 OS<<"};\n";
190 // CollectAllItinClasses - Gathers and enumerates all the itinerary classes.
191 // Returns itinerary class count.
193 unsigned SubtargetEmitter::CollectAllItinClasses(std::ostream &OS,
194 std::map<std::string, unsigned> &ItinClassesMap) {
195 // Gather and sort all itinerary classes
196 std::vector<Record*> ItinClassList =
197 Records.getAllDerivedDefinitions("InstrItinClass");
198 std::sort(ItinClassList.begin(), ItinClassList.end(), LessRecord());
200 // For each itinerary class
201 unsigned N = ItinClassList.size();
202 for (unsigned i = 0; i < N; i++) {
203 // Next itinerary class
204 const Record *ItinClass = ItinClassList[i];
205 // Get name of itinerary class
206 // Assign itinerary class a unique number
207 ItinClassesMap[ItinClass->getName()] = i;
210 // Emit size of table
211 OS<<"\nenum {\n";
212 OS<<" ItinClassesSize = " << N << "\n";
213 OS<<"};\n";
215 // Return itinerary class count
216 return N;
220 // FormItineraryString - Compose a string containing the data initialization
221 // for the specified itinerary. N is the number of stages.
223 void SubtargetEmitter::FormItineraryString(Record *ItinData,
224 std::string &ItinString,
225 unsigned &NStages) {
226 // Get states list
227 const std::vector<Record*> &StageList =
228 ItinData->getValueAsListOfDefs("Stages");
230 // For each stage
231 unsigned N = NStages = StageList.size();
232 for (unsigned i = 0; i < N;) {
233 // Next stage
234 const Record *Stage = StageList[i];
236 // Form string as ,{ cycles, u1 | u2 | ... | un }
237 int Cycles = Stage->getValueAsInt("Cycles");
238 ItinString += " { " + itostr(Cycles) + ", ";
240 // Get unit list
241 const std::vector<Record*> &UnitList = Stage->getValueAsListOfDefs("Units");
243 // For each unit
244 for (unsigned j = 0, M = UnitList.size(); j < M;) {
245 // Add name and bitwise or
246 ItinString += UnitList[j]->getName();
247 if (++j < M) ItinString += " | ";
250 // Close off stage
251 ItinString += " }";
252 if (++i < N) ItinString += ", ";
257 // EmitStageData - Generate unique itinerary stages. Record itineraries for
258 // processors.
260 void SubtargetEmitter::EmitStageData(std::ostream &OS,
261 unsigned NItinClasses,
262 std::map<std::string, unsigned> &ItinClassesMap,
263 std::vector<std::vector<InstrItinerary> > &ProcList) {
264 // Gather processor iteraries
265 std::vector<Record*> ProcItinList =
266 Records.getAllDerivedDefinitions("ProcessorItineraries");
268 // If just no itinerary then don't bother
269 if (ProcItinList.size() < 2) return;
271 // Begin stages table
272 OS << "static llvm::InstrStage Stages[] = {\n"
273 " { 0, 0 }, // No itinerary\n";
275 unsigned ItinEnum = 1;
276 std::map<std::string, unsigned> ItinMap;
277 for (unsigned i = 0, N = ProcItinList.size(); i < N; i++) {
278 // Next record
279 Record *Proc = ProcItinList[i];
281 // Get processor itinerary name
282 const std::string &Name = Proc->getName();
284 // Skip default
285 if (Name == "NoItineraries") continue;
287 // Create and expand processor itinerary to cover all itinerary classes
288 std::vector<InstrItinerary> ItinList;
289 ItinList.resize(NItinClasses);
291 // Get itinerary data list
292 std::vector<Record*> ItinDataList = Proc->getValueAsListOfDefs("IID");
294 // For each itinerary data
295 for (unsigned j = 0, M = ItinDataList.size(); j < M; j++) {
296 // Next itinerary data
297 Record *ItinData = ItinDataList[j];
299 // Get string and stage count
300 std::string ItinString;
301 unsigned NStages;
302 FormItineraryString(ItinData, ItinString, NStages);
304 // Check to see if it already exists
305 unsigned Find = ItinMap[ItinString];
307 // If new itinerary
308 if (Find == 0) {
309 // Emit as { cycles, u1 | u2 | ... | un }, // index
310 OS << ItinString << ", // " << ItinEnum << "\n";
311 // Record Itin class number
312 ItinMap[ItinString] = Find = ItinEnum++;
315 // Set up itinerary as location and location + stage count
316 InstrItinerary Intinerary = { Find, Find + NStages };
318 // Locate where to inject into processor itinerary table
319 const std::string &Name = ItinData->getValueAsDef("TheClass")->getName();
320 Find = ItinClassesMap[Name];
322 // Inject - empty slots will be 0, 0
323 ItinList[Find] = Intinerary;
326 // Add process itinerary to list
327 ProcList.push_back(ItinList);
330 // Closing stage
331 OS << " { 0, 0 } // End itinerary\n";
332 // End stages table
333 OS << "};\n";
335 // Emit size of table
336 OS<<"\nenum {\n";
337 OS<<" StagesSize = sizeof(Stages)/sizeof(llvm::InstrStage)\n";
338 OS<<"};\n";
342 // EmitProcessorData - Generate data for processor itineraries.
344 void SubtargetEmitter::EmitProcessorData(std::ostream &OS,
345 std::vector<std::vector<InstrItinerary> > &ProcList) {
346 // Get an iterator for processor itinerary stages
347 std::vector<std::vector<InstrItinerary> >::iterator
348 ProcListIter = ProcList.begin();
350 // For each processor itinerary
351 std::vector<Record*> Itins =
352 Records.getAllDerivedDefinitions("ProcessorItineraries");
353 for (unsigned i = 0, N = Itins.size(); i < N; i++) {
354 // Next record
355 Record *Itin = Itins[i];
357 // Get processor itinerary name
358 const std::string &Name = Itin->getName();
360 // Skip default
361 if (Name == "NoItineraries") continue;
363 // Begin processor itinerary table
364 OS << "\n";
365 OS << "static llvm::InstrItinerary " << Name << "[] = {\n";
367 // For each itinerary class
368 std::vector<InstrItinerary> &ItinList = *ProcListIter++;
369 for (unsigned j = 0, M = ItinList.size(); j < M;) {
370 InstrItinerary &Intinerary = ItinList[j];
372 // Emit in the form of { first, last } // index
373 if (Intinerary.First == 0) {
374 OS << " { 0, 0 }";
375 } else {
376 OS << " { " << Intinerary.First << ", " << Intinerary.Last << " }";
379 // If more in list add comma
380 if (++j < M) OS << ",";
382 OS << " // " << (j - 1) << "\n";
385 // End processor itinerary table
386 OS << "};\n";
391 // EmitProcessorLookup - generate cpu name to itinerary lookup table.
393 void SubtargetEmitter::EmitProcessorLookup(std::ostream &OS) {
394 // Gather and sort processor information
395 std::vector<Record*> ProcessorList =
396 Records.getAllDerivedDefinitions("Processor");
397 std::sort(ProcessorList.begin(), ProcessorList.end(), LessRecordFieldName());
399 // Begin processor table
400 OS << "\n";
401 OS << "// Sorted (by key) array of itineraries for CPU subtype.\n"
402 << "static const llvm::SubtargetInfoKV ProcItinKV[] = {\n";
404 // For each processor
405 for (unsigned i = 0, N = ProcessorList.size(); i < N;) {
406 // Next processor
407 Record *Processor = ProcessorList[i];
409 const std::string &Name = Processor->getValueAsString("Name");
410 const std::string &ProcItin =
411 Processor->getValueAsDef("ProcItin")->getName();
413 // Emit as { "cpu", procinit },
414 OS << " { "
415 << "\"" << Name << "\", "
416 << "(void *)&" << ProcItin;
418 OS << " }";
420 // Depending on ''if more in the list'' emit comma
421 if (++i < N) OS << ",";
423 OS << "\n";
426 // End processor table
427 OS << "};\n";
429 // Emit size of table
430 OS<<"\nenum {\n";
431 OS<<" ProcItinKVSize = sizeof(ProcItinKV)/"
432 "sizeof(llvm::SubtargetInfoKV)\n";
433 OS<<"};\n";
437 // EmitData - Emits all stages and itineries, folding common patterns.
439 void SubtargetEmitter::EmitData(std::ostream &OS) {
440 std::map<std::string, unsigned> ItinClassesMap;
441 std::vector<std::vector<InstrItinerary> > ProcList;
443 // Enumerate all the itinerary classes
444 unsigned NItinClasses = CollectAllItinClasses(OS, ItinClassesMap);
445 // Make sure the rest is worth the effort
446 HasItineraries = NItinClasses != 1; // Ignore NoItinerary.
448 if (HasItineraries) {
449 // Emit the stage data
450 EmitStageData(OS, NItinClasses, ItinClassesMap, ProcList);
451 // Emit the processor itinerary data
452 EmitProcessorData(OS, ProcList);
453 // Emit the processor lookup data
454 EmitProcessorLookup(OS);
459 // ParseFeaturesFunction - Produces a subtarget specific function for parsing
460 // the subtarget features string.
462 void SubtargetEmitter::ParseFeaturesFunction(std::ostream &OS) {
463 std::vector<Record*> Features =
464 Records.getAllDerivedDefinitions("SubtargetFeature");
465 std::sort(Features.begin(), Features.end(), LessRecord());
467 OS << "// ParseSubtargetFeatures - Parses features string setting specified\n"
468 << "// subtarget options.\n"
469 << "void llvm::";
470 OS << Target;
471 OS << "Subtarget::ParseSubtargetFeatures(const std::string &FS,\n"
472 << " const std::string &CPU) {\n"
473 << " SubtargetFeatures Features(FS);\n"
474 << " Features.setCPUIfNone(CPU);\n"
475 << " uint32_t Bits = Features.getBits(SubTypeKV, SubTypeKVSize,\n"
476 << " FeatureKV, FeatureKVSize);\n";
478 for (unsigned i = 0; i < Features.size(); i++) {
479 // Next record
480 Record *R = Features[i];
481 const std::string &Instance = R->getName();
482 const std::string &Value = R->getValueAsString("Value");
483 const std::string &Attribute = R->getValueAsString("Attribute");
485 OS << " if ((Bits & " << Instance << ") != 0) "
486 << Attribute << " = " << Value << ";\n";
489 if (HasItineraries) {
490 OS << "\n"
491 << " InstrItinerary *Itinerary = (InstrItinerary *)"
492 << "Features.getInfo(ProcItinKV, ProcItinKVSize);\n"
493 << " InstrItins = InstrItineraryData(Stages, Itinerary);\n";
496 OS << "}\n";
500 // SubtargetEmitter::run - Main subtarget enumeration emitter.
502 void SubtargetEmitter::run(std::ostream &OS) {
503 Target = CodeGenTarget().getName();
505 EmitSourceFileHeader("Subtarget Enumeration Source Fragment", OS);
507 OS << "#include \"llvm/Target/SubtargetFeature.h\"\n";
508 OS << "#include \"llvm/Target/TargetInstrItineraries.h\"\n\n";
510 Enumeration(OS, "FuncUnit", true);
511 OS<<"\n";
512 // Enumeration(OS, "InstrItinClass", false);
513 // OS<<"\n";
514 Enumeration(OS, "SubtargetFeature", true);
515 OS<<"\n";
516 FeatureKeyValues(OS);
517 OS<<"\n";
518 CPUKeyValues(OS);
519 OS<<"\n";
520 EmitData(OS);
521 OS<<"\n";
522 ParseFeaturesFunction(OS);