1 //===- TableGen.cpp - Top-Level TableGen implementation -------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // TableGen is a tool which can be used to build up a description of something,
11 // then invoke one or more "tablegen backends" to emit information about the
12 // description in some predefined format. In practice, this is used by the LLVM
13 // code generators to automate generation of a code generator through a
14 // high-level description of the target.
16 //===----------------------------------------------------------------------===//
20 #include "llvm/Support/CommandLine.h"
21 #include "llvm/Support/Streams.h"
22 #include "llvm/System/Signals.h"
23 #include "llvm/Support/FileUtilities.h"
24 #include "llvm/Support/MemoryBuffer.h"
25 #include "CallingConvEmitter.h"
26 #include "CodeEmitterGen.h"
27 #include "RegisterInfoEmitter.h"
28 #include "InstrInfoEmitter.h"
29 #include "InstrEnumEmitter.h"
30 #include "AsmWriterEmitter.h"
31 #include "DAGISelEmitter.h"
32 #include "SubtargetEmitter.h"
33 #include "IntrinsicEmitter.h"
43 GenRegisterEnums
, GenRegister
, GenRegisterHeader
,
44 GenInstrEnums
, GenInstrs
, GenAsmWriter
,
54 Action(cl::desc("Action to perform:"),
55 cl::values(clEnumValN(PrintRecords
, "print-records",
56 "Print all records to stdout (default)"),
57 clEnumValN(GenEmitter
, "gen-emitter",
58 "Generate machine code emitter"),
59 clEnumValN(GenRegisterEnums
, "gen-register-enums",
60 "Generate enum values for registers"),
61 clEnumValN(GenRegister
, "gen-register-desc",
62 "Generate a register info description"),
63 clEnumValN(GenRegisterHeader
, "gen-register-desc-header",
64 "Generate a register info description header"),
65 clEnumValN(GenInstrEnums
, "gen-instr-enums",
66 "Generate enum values for instructions"),
67 clEnumValN(GenInstrs
, "gen-instr-desc",
68 "Generate instruction descriptions"),
69 clEnumValN(GenCallingConv
, "gen-callingconv",
70 "Generate calling convention descriptions"),
71 clEnumValN(GenAsmWriter
, "gen-asm-writer",
72 "Generate assembly writer"),
73 clEnumValN(GenDAGISel
, "gen-dag-isel",
74 "Generate a DAG instruction selector"),
75 clEnumValN(GenSubtarget
, "gen-subtarget",
76 "Generate subtarget enumerations"),
77 clEnumValN(GenIntrinsic
, "gen-intrinsic",
78 "Generate intrinsic information"),
79 clEnumValN(PrintEnums
, "print-enums",
80 "Print enum values for a class"),
84 Class("class", cl::desc("Print Enum list for this class"),
85 cl::value_desc("class name"));
88 OutputFilename("o", cl::desc("Output filename"), cl::value_desc("filename"),
92 InputFilename(cl::Positional
, cl::desc("<input file>"), cl::init("-"));
95 IncludeDirs("I", cl::desc("Directory of include files"),
96 cl::value_desc("directory"), cl::Prefix
);
99 RecordKeeper
llvm::Records
;
101 /// ParseFile - this function begins the parsing of the specified tablegen
103 static bool ParseFile(const std::string
&Filename
,
104 const std::vector
<std::string
> &IncludeDirs
) {
105 std::string ErrorStr
;
106 MemoryBuffer
*F
= MemoryBuffer::getFileOrSTDIN(&Filename
[0], Filename
.size(),
109 cerr
<< "Could not open input file '" + Filename
+ "': " << ErrorStr
<<"\n";
115 // Record the location of the include directory so that the lexer can find
117 Parser
.setIncludeDirs(IncludeDirs
);
119 return Parser
.ParseFile();
122 int main(int argc
, char **argv
) {
123 cl::ParseCommandLineOptions(argc
, argv
);
125 // Parse the input file.
126 if (ParseFile(InputFilename
, IncludeDirs
))
129 std::ostream
*Out
= cout
.stream();
130 if (OutputFilename
!= "-") {
131 Out
= new std::ofstream(OutputFilename
.c_str());
134 cerr
<< argv
[0] << ": error opening " << OutputFilename
<< "!\n";
138 // Make sure the file gets removed if *gasp* tablegen crashes...
139 sys::RemoveFileOnSignal(sys::Path(OutputFilename
));
145 *Out
<< Records
; // No argument, dump all contents
148 CodeEmitterGen(Records
).run(*Out
);
151 case GenRegisterEnums
:
152 RegisterInfoEmitter(Records
).runEnums(*Out
);
155 RegisterInfoEmitter(Records
).run(*Out
);
157 case GenRegisterHeader
:
158 RegisterInfoEmitter(Records
).runHeader(*Out
);
162 InstrEnumEmitter(Records
).run(*Out
);
165 InstrInfoEmitter(Records
).run(*Out
);
168 CallingConvEmitter(Records
).run(*Out
);
171 AsmWriterEmitter(Records
).run(*Out
);
175 DAGISelEmitter(Records
).run(*Out
);
178 SubtargetEmitter(Records
).run(*Out
);
181 IntrinsicEmitter(Records
).run(*Out
);
185 std::vector
<Record
*> Recs
= Records
.getAllDerivedDefinitions(Class
);
186 for (unsigned i
= 0, e
= Recs
.size(); i
!= e
; ++i
)
187 *Out
<< Recs
[i
]->getName() << ", ";
192 assert(1 && "Invalid Action");
195 } catch (const std::string
&Error
) {
196 cerr
<< argv
[0] << ": " << Error
<< "\n";
197 if (Out
!= cout
.stream()) {
198 delete Out
; // Close the file
199 std::remove(OutputFilename
.c_str()); // Remove the file, it's broken
203 cerr
<< argv
[0] << ": Unknown unexpected exception occurred.\n";
204 if (Out
!= cout
.stream()) {
205 delete Out
; // Close the file
206 std::remove(OutputFilename
.c_str()); // Remove the file, it's broken
211 if (Out
!= cout
.stream()) {
212 delete Out
; // Close the file