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[Alignment] fix dubious min function alignment
[llvm-complete.git] / lib / CodeGen / SelectionDAG / LegalizeFloatTypes.cpp
blobb6455ab51bd4f7d37506434d396573cab80f35f0
1 //===-------- LegalizeFloatTypes.cpp - Legalization of float types --------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file implements float type expansion and softening for LegalizeTypes.
10 // Softening is the act of turning a computation in an illegal floating point
11 // type into a computation in an integer type of the same size; also known as
12 // "soft float". For example, turning f32 arithmetic into operations using i32.
13 // The resulting integer value is the same as what you would get by performing
14 // the floating point operation and bitcasting the result to the integer type.
15 // Expansion is the act of changing a computation in an illegal type to be a
16 // computation in two identical registers of a smaller type. For example,
17 // implementing ppcf128 arithmetic in two f64 registers.
18 //
19 //===----------------------------------------------------------------------===//
20
21 #include "LegalizeTypes.h"
22 #include "llvm/Support/ErrorHandling.h"
23 #include "llvm/Support/raw_ostream.h"
24 using namespace llvm;
25
26 #define DEBUG_TYPE "legalize-types"
27
28 /// GetFPLibCall - Return the right libcall for the given floating point type.
29 static RTLIB::Libcall GetFPLibCall(EVT VT,
30 RTLIB::Libcall Call_F32,
31 RTLIB::Libcall Call_F64,
32 RTLIB::Libcall Call_F80,
33 RTLIB::Libcall Call_F128,
34 RTLIB::Libcall Call_PPCF128) {
35 return
36 VT == MVT::f32 ? Call_F32 :
37 VT == MVT::f64 ? Call_F64 :
38 VT == MVT::f80 ? Call_F80 :
39 VT == MVT::f128 ? Call_F128 :
40 VT == MVT::ppcf128 ? Call_PPCF128 :
41 RTLIB::UNKNOWN_LIBCALL;
42 }
43
44 //===----------------------------------------------------------------------===//
45 // Convert Float Results to Integer for Non-HW-supported Operations.
46 //===----------------------------------------------------------------------===//
47
48 bool DAGTypeLegalizer::SoftenFloatResult(SDNode *N, unsigned ResNo) {
49 LLVM_DEBUG(dbgs() << "Soften float result " << ResNo << ": "; N->dump(&DAG);
50 dbgs() << "\n");
51 SDValue R = SDValue();
52
53 switch (N->getOpcode()) {
54 default:
55 #ifndef NDEBUG
56 dbgs() << "SoftenFloatResult #" << ResNo << ": ";
57 N->dump(&DAG); dbgs() << "\n";
58 #endif
59 llvm_unreachable("Do not know how to soften the result of this operator!");
60
61 case ISD::Register:
62 case ISD::CopyFromReg:
63 case ISD::CopyToReg:
64 assert(isLegalInHWReg(N->getValueType(ResNo)) &&
65 "Unsupported SoftenFloatRes opcode!");
66 // Only when isLegalInHWReg, we can skip check of the operands.
67 R = SDValue(N, ResNo);
68 break;
69 case ISD::MERGE_VALUES:R = SoftenFloatRes_MERGE_VALUES(N, ResNo); break;
70 case ISD::BITCAST: R = SoftenFloatRes_BITCAST(N, ResNo); break;
71 case ISD::BUILD_PAIR: R = SoftenFloatRes_BUILD_PAIR(N); break;
72 case ISD::ConstantFP: R = SoftenFloatRes_ConstantFP(N, ResNo); break;
73 case ISD::EXTRACT_VECTOR_ELT:
74 R = SoftenFloatRes_EXTRACT_VECTOR_ELT(N, ResNo); break;
75 case ISD::FABS: R = SoftenFloatRes_FABS(N, ResNo); break;
76 case ISD::FMINNUM: R = SoftenFloatRes_FMINNUM(N); break;
77 case ISD::FMAXNUM: R = SoftenFloatRes_FMAXNUM(N); break;
78 case ISD::FADD: R = SoftenFloatRes_FADD(N); break;
79 case ISD::FCEIL: R = SoftenFloatRes_FCEIL(N); break;
80 case ISD::FCOPYSIGN: R = SoftenFloatRes_FCOPYSIGN(N, ResNo); break;
81 case ISD::FCOS: R = SoftenFloatRes_FCOS(N); break;
82 case ISD::FDIV: R = SoftenFloatRes_FDIV(N); break;
83 case ISD::FEXP: R = SoftenFloatRes_FEXP(N); break;
84 case ISD::FEXP2: R = SoftenFloatRes_FEXP2(N); break;
85 case ISD::FFLOOR: R = SoftenFloatRes_FFLOOR(N); break;
86 case ISD::FLOG: R = SoftenFloatRes_FLOG(N); break;
87 case ISD::FLOG2: R = SoftenFloatRes_FLOG2(N); break;
88 case ISD::FLOG10: R = SoftenFloatRes_FLOG10(N); break;
89 case ISD::FMA: R = SoftenFloatRes_FMA(N); break;
90 case ISD::FMUL: R = SoftenFloatRes_FMUL(N); break;
91 case ISD::FNEARBYINT: R = SoftenFloatRes_FNEARBYINT(N); break;
92 case ISD::FNEG: R = SoftenFloatRes_FNEG(N, ResNo); break;
93 case ISD::FP_EXTEND: R = SoftenFloatRes_FP_EXTEND(N); break;
94 case ISD::FP_ROUND: R = SoftenFloatRes_FP_ROUND(N); break;
95 case ISD::FP16_TO_FP: R = SoftenFloatRes_FP16_TO_FP(N); break;
96 case ISD::FPOW: R = SoftenFloatRes_FPOW(N); break;
97 case ISD::FPOWI: R = SoftenFloatRes_FPOWI(N); break;
98 case ISD::FREM: R = SoftenFloatRes_FREM(N); break;
99 case ISD::FRINT: R = SoftenFloatRes_FRINT(N); break;
100 case ISD::FROUND: R = SoftenFloatRes_FROUND(N); break;
101 case ISD::FSIN: R = SoftenFloatRes_FSIN(N); break;
102 case ISD::FSQRT: R = SoftenFloatRes_FSQRT(N); break;
103 case ISD::FSUB: R = SoftenFloatRes_FSUB(N); break;
104 case ISD::FTRUNC: R = SoftenFloatRes_FTRUNC(N); break;
105 case ISD::LOAD: R = SoftenFloatRes_LOAD(N, ResNo); break;
106 case ISD::ATOMIC_SWAP: R = BitcastToInt_ATOMIC_SWAP(N); break;
107 case ISD::SELECT: R = SoftenFloatRes_SELECT(N, ResNo); break;
108 case ISD::SELECT_CC: R = SoftenFloatRes_SELECT_CC(N, ResNo); break;
109 case ISD::SINT_TO_FP:
110 case ISD::UINT_TO_FP: R = SoftenFloatRes_XINT_TO_FP(N); break;
111 case ISD::UNDEF: R = SoftenFloatRes_UNDEF(N); break;
112 case ISD::VAARG: R = SoftenFloatRes_VAARG(N); break;
113 }
114
115 if (R.getNode() && R.getNode() != N) {
116 SetSoftenedFloat(SDValue(N, ResNo), R);
117 // Return true only if the node is changed, assuming that the operands
118 // are also converted when necessary.
119 return true;
120 }
121
122 // Otherwise, return false to tell caller to scan operands.
123 return false;
124 }
125
126 SDValue DAGTypeLegalizer::SoftenFloatRes_BITCAST(SDNode *N, unsigned ResNo) {
127 if (isLegalInHWReg(N->getValueType(ResNo)))
128 return SDValue(N, ResNo);
129 return BitConvertToInteger(N->getOperand(0));
130 }
131
132 SDValue DAGTypeLegalizer::SoftenFloatRes_MERGE_VALUES(SDNode *N,
133 unsigned ResNo) {
134 SDValue Op = DisintegrateMERGE_VALUES(N, ResNo);
135 return BitConvertToInteger(Op);
136 }
137
138 SDValue DAGTypeLegalizer::SoftenFloatRes_BUILD_PAIR(SDNode *N) {
139 // Convert the inputs to integers, and build a new pair out of them.
140 return DAG.getNode(ISD::BUILD_PAIR, SDLoc(N),
141 TLI.getTypeToTransformTo(*DAG.getContext(),
142 N->getValueType(0)),
143 BitConvertToInteger(N->getOperand(0)),
144 BitConvertToInteger(N->getOperand(1)));
145 }
146
147 SDValue DAGTypeLegalizer::SoftenFloatRes_ConstantFP(SDNode *N, unsigned ResNo) {
148 // When LegalInHWReg, we can load better from the constant pool.
149 if (isLegalInHWReg(N->getValueType(ResNo)))
150 return SDValue(N, ResNo);
151 ConstantFPSDNode *CN = cast<ConstantFPSDNode>(N);
152 // In ppcf128, the high 64 bits are always first in memory regardless
153 // of Endianness. LLVM's APFloat representation is not Endian sensitive,
154 // and so always converts into a 128-bit APInt in a non-Endian-sensitive
155 // way. However, APInt's are serialized in an Endian-sensitive fashion,
156 // so on big-Endian targets, the two doubles are output in the wrong
157 // order. Fix this by manually flipping the order of the high 64 bits
158 // and the low 64 bits here.
159 if (DAG.getDataLayout().isBigEndian() &&
160 CN->getValueType(0).getSimpleVT() == llvm::MVT::ppcf128) {
161 uint64_t words[2] = { CN->getValueAPF().bitcastToAPInt().getRawData()[1],
162 CN->getValueAPF().bitcastToAPInt().getRawData()[0] };
163 APInt Val(128, words);
164 return DAG.getConstant(Val, SDLoc(CN),
165 TLI.getTypeToTransformTo(*DAG.getContext(),
166 CN->getValueType(0)));
167 } else {
168 return DAG.getConstant(CN->getValueAPF().bitcastToAPInt(), SDLoc(CN),
169 TLI.getTypeToTransformTo(*DAG.getContext(),
170 CN->getValueType(0)));
171 }
172 }
173
174 SDValue DAGTypeLegalizer::SoftenFloatRes_EXTRACT_VECTOR_ELT(SDNode *N, unsigned ResNo) {
175 // When LegalInHWReg, keep the extracted value in register.
176 if (isLegalInHWReg(N->getValueType(ResNo)))
177 return SDValue(N, ResNo);
178 SDValue NewOp = BitConvertVectorToIntegerVector(N->getOperand(0));
179 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SDLoc(N),
180 NewOp.getValueType().getVectorElementType(),
181 NewOp, N->getOperand(1));
182 }
183
184 SDValue DAGTypeLegalizer::SoftenFloatRes_FABS(SDNode *N, unsigned ResNo) {
185 // When LegalInHWReg, FABS can be implemented as native bitwise operations.
186 if (isLegalInHWReg(N->getValueType(ResNo)))
187 return SDValue(N, ResNo);
188 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
189 unsigned Size = NVT.getSizeInBits();
190
191 // Mask = ~(1 << (Size-1))
192 APInt API = APInt::getAllOnesValue(Size);
193 API.clearBit(Size - 1);
194 SDValue Mask = DAG.getConstant(API, SDLoc(N), NVT);
195 SDValue Op = GetSoftenedFloat(N->getOperand(0));
196 return DAG.getNode(ISD::AND, SDLoc(N), NVT, Op, Mask);
197 }
198
199 SDValue DAGTypeLegalizer::SoftenFloatRes_FMINNUM(SDNode *N) {
200 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
201 SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
202 GetSoftenedFloat(N->getOperand(1)) };
203 TargetLowering::MakeLibCallOptions CallOptions;
204 EVT OpsVT[2] = { N->getOperand(0).getValueType(),
205 N->getOperand(1).getValueType() };
206 CallOptions.setTypeListBeforeSoften(OpsVT, N->getValueType(0), true);
207 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
208 RTLIB::FMIN_F32,
209 RTLIB::FMIN_F64,
210 RTLIB::FMIN_F80,
211 RTLIB::FMIN_F128,
212 RTLIB::FMIN_PPCF128),
213 NVT, Ops, CallOptions, SDLoc(N)).first;
214 }
215
216 SDValue DAGTypeLegalizer::SoftenFloatRes_FMAXNUM(SDNode *N) {
217 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
218 SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
219 GetSoftenedFloat(N->getOperand(1)) };
220 TargetLowering::MakeLibCallOptions CallOptions;
221 EVT OpsVT[2] = { N->getOperand(0).getValueType(),
222 N->getOperand(1).getValueType() };
223 CallOptions.setTypeListBeforeSoften(OpsVT, N->getValueType(0), true);
224 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
225 RTLIB::FMAX_F32,
226 RTLIB::FMAX_F64,
227 RTLIB::FMAX_F80,
228 RTLIB::FMAX_F128,
229 RTLIB::FMAX_PPCF128),
230 NVT, Ops, CallOptions, SDLoc(N)).first;
231 }
232
233 SDValue DAGTypeLegalizer::SoftenFloatRes_FADD(SDNode *N) {
234 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
235 SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
236 GetSoftenedFloat(N->getOperand(1)) };
237 TargetLowering::MakeLibCallOptions CallOptions;
238 EVT OpsVT[2] = { N->getOperand(0).getValueType(),
239 N->getOperand(1).getValueType() };
240 CallOptions.setTypeListBeforeSoften(OpsVT, N->getValueType(0), true);
241 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
242 RTLIB::ADD_F32,
243 RTLIB::ADD_F64,
244 RTLIB::ADD_F80,
245 RTLIB::ADD_F128,
246 RTLIB::ADD_PPCF128),
247 NVT, Ops, CallOptions, SDLoc(N)).first;
248 }
249
250 SDValue DAGTypeLegalizer::SoftenFloatRes_FCEIL(SDNode *N) {
251 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
252 SDValue Op = GetSoftenedFloat(N->getOperand(0));
253 TargetLowering::MakeLibCallOptions CallOptions;
254 EVT OpsVT[1] = { N->getOperand(0).getValueType() };
255 CallOptions.setTypeListBeforeSoften(OpsVT, N->getValueType(0), true);
256 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
257 RTLIB::CEIL_F32,
258 RTLIB::CEIL_F64,
259 RTLIB::CEIL_F80,
260 RTLIB::CEIL_F128,
261 RTLIB::CEIL_PPCF128),
262 NVT, Op, CallOptions, SDLoc(N)).first;
263 }
264
265 SDValue DAGTypeLegalizer::SoftenFloatRes_FCOPYSIGN(SDNode *N, unsigned ResNo) {
266 // When LegalInHWReg, FCOPYSIGN can be implemented as native bitwise operations.
267 if (isLegalInHWReg(N->getValueType(ResNo)))
268 return SDValue(N, ResNo);
269 SDValue LHS = GetSoftenedFloat(N->getOperand(0));
270 SDValue RHS = BitConvertToInteger(N->getOperand(1));
271 SDLoc dl(N);
272
273 EVT LVT = LHS.getValueType();
274 EVT RVT = RHS.getValueType();
275
276 unsigned LSize = LVT.getSizeInBits();
277 unsigned RSize = RVT.getSizeInBits();
278
279 // First get the sign bit of second operand.
280 SDValue SignBit = DAG.getNode(
281 ISD::SHL, dl, RVT, DAG.getConstant(1, dl, RVT),
282 DAG.getConstant(RSize - 1, dl,
283 TLI.getShiftAmountTy(RVT, DAG.getDataLayout())));
284 SignBit = DAG.getNode(ISD::AND, dl, RVT, RHS, SignBit);
285
286 // Shift right or sign-extend it if the two operands have different types.
287 int SizeDiff = RVT.getSizeInBits() - LVT.getSizeInBits();
288 if (SizeDiff > 0) {
289 SignBit =
290 DAG.getNode(ISD::SRL, dl, RVT, SignBit,
291 DAG.getConstant(SizeDiff, dl,
292 TLI.getShiftAmountTy(SignBit.getValueType(),
293 DAG.getDataLayout())));
294 SignBit = DAG.getNode(ISD::TRUNCATE, dl, LVT, SignBit);
295 } else if (SizeDiff < 0) {
296 SignBit = DAG.getNode(ISD::ANY_EXTEND, dl, LVT, SignBit);
297 SignBit =
298 DAG.getNode(ISD::SHL, dl, LVT, SignBit,
299 DAG.getConstant(-SizeDiff, dl,
300 TLI.getShiftAmountTy(SignBit.getValueType(),
301 DAG.getDataLayout())));
302 }
303
304 // Clear the sign bit of the first operand.
305 SDValue Mask = DAG.getNode(
306 ISD::SHL, dl, LVT, DAG.getConstant(1, dl, LVT),
307 DAG.getConstant(LSize - 1, dl,
308 TLI.getShiftAmountTy(LVT, DAG.getDataLayout())));
309 Mask = DAG.getNode(ISD::SUB, dl, LVT, Mask, DAG.getConstant(1, dl, LVT));
310 LHS = DAG.getNode(ISD::AND, dl, LVT, LHS, Mask);
311
312 // Or the value with the sign bit.
313 return DAG.getNode(ISD::OR, dl, LVT, LHS, SignBit);
314 }
315
316 SDValue DAGTypeLegalizer::SoftenFloatRes_FCOS(SDNode *N) {
317 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
318 SDValue Op = GetSoftenedFloat(N->getOperand(0));
319 TargetLowering::MakeLibCallOptions CallOptions;
320 EVT OpsVT[1] = { N->getOperand(0).getValueType() };
321 CallOptions.setTypeListBeforeSoften(OpsVT, N->getValueType(0), true);
322 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
323 RTLIB::COS_F32,
324 RTLIB::COS_F64,
325 RTLIB::COS_F80,
326 RTLIB::COS_F128,
327 RTLIB::COS_PPCF128),
328 NVT, Op, CallOptions, SDLoc(N)).first;
329 }
330
331 SDValue DAGTypeLegalizer::SoftenFloatRes_FDIV(SDNode *N) {
332 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
333 SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
334 GetSoftenedFloat(N->getOperand(1)) };
335 TargetLowering::MakeLibCallOptions CallOptions;
336 EVT OpsVT[2] = { N->getOperand(0).getValueType(),
337 N->getOperand(1).getValueType() };
338 CallOptions.setTypeListBeforeSoften(OpsVT, N->getValueType(0), true);
339 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
340 RTLIB::DIV_F32,
341 RTLIB::DIV_F64,
342 RTLIB::DIV_F80,
343 RTLIB::DIV_F128,
344 RTLIB::DIV_PPCF128),
345 NVT, Ops, CallOptions, SDLoc(N)).first;
346 }
347
348 SDValue DAGTypeLegalizer::SoftenFloatRes_FEXP(SDNode *N) {
349 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
350 SDValue Op = GetSoftenedFloat(N->getOperand(0));
351 TargetLowering::MakeLibCallOptions CallOptions;
352 EVT OpsVT[1] = { N->getOperand(0).getValueType() };
353 CallOptions.setTypeListBeforeSoften(OpsVT, N->getValueType(0), true);
354 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
355 RTLIB::EXP_F32,
356 RTLIB::EXP_F64,
357 RTLIB::EXP_F80,
358 RTLIB::EXP_F128,
359 RTLIB::EXP_PPCF128),
360 NVT, Op, CallOptions, SDLoc(N)).first;
361 }
362
363 SDValue DAGTypeLegalizer::SoftenFloatRes_FEXP2(SDNode *N) {
364 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
365 SDValue Op = GetSoftenedFloat(N->getOperand(0));
366 TargetLowering::MakeLibCallOptions CallOptions;
367 EVT OpsVT[1] = { N->getOperand(0).getValueType() };
368 CallOptions.setTypeListBeforeSoften(OpsVT, N->getValueType(0), true);
369 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
370 RTLIB::EXP2_F32,
371 RTLIB::EXP2_F64,
372 RTLIB::EXP2_F80,
373 RTLIB::EXP2_F128,
374 RTLIB::EXP2_PPCF128),
375 NVT, Op, CallOptions, SDLoc(N)).first;
376 }
377
378 SDValue DAGTypeLegalizer::SoftenFloatRes_FFLOOR(SDNode *N) {
379 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
380 SDValue Op = GetSoftenedFloat(N->getOperand(0));
381 TargetLowering::MakeLibCallOptions CallOptions;
382 EVT OpsVT[1] = { N->getOperand(0).getValueType() };
383 CallOptions.setTypeListBeforeSoften(OpsVT, N->getValueType(0), true);
384 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
385 RTLIB::FLOOR_F32,
386 RTLIB::FLOOR_F64,
387 RTLIB::FLOOR_F80,
388 RTLIB::FLOOR_F128,
389 RTLIB::FLOOR_PPCF128),
390 NVT, Op, CallOptions, SDLoc(N)).first;
391 }
392
393 SDValue DAGTypeLegalizer::SoftenFloatRes_FLOG(SDNode *N) {
394 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
395 SDValue Op = GetSoftenedFloat(N->getOperand(0));
396 TargetLowering::MakeLibCallOptions CallOptions;
397 EVT OpsVT[1] = { N->getOperand(0).getValueType() };
398 CallOptions.setTypeListBeforeSoften(OpsVT, N->getValueType(0), true);
399 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
400 RTLIB::LOG_F32,
401 RTLIB::LOG_F64,
402 RTLIB::LOG_F80,
403 RTLIB::LOG_F128,
404 RTLIB::LOG_PPCF128),
405 NVT, Op, CallOptions, SDLoc(N)).first;
406 }
407
408 SDValue DAGTypeLegalizer::SoftenFloatRes_FLOG2(SDNode *N) {
409 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
410 SDValue Op = GetSoftenedFloat(N->getOperand(0));
411 TargetLowering::MakeLibCallOptions CallOptions;
412 EVT OpsVT[1] = { N->getOperand(0).getValueType() };
413 CallOptions.setTypeListBeforeSoften(OpsVT, N->getValueType(0), true);
414 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
415 RTLIB::LOG2_F32,
416 RTLIB::LOG2_F64,
417 RTLIB::LOG2_F80,
418 RTLIB::LOG2_F128,
419 RTLIB::LOG2_PPCF128),
420 NVT, Op, CallOptions, SDLoc(N)).first;
421 }
422
423 SDValue DAGTypeLegalizer::SoftenFloatRes_FLOG10(SDNode *N) {
424 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
425 SDValue Op = GetSoftenedFloat(N->getOperand(0));
426 TargetLowering::MakeLibCallOptions CallOptions;
427 EVT OpsVT[1] = { N->getOperand(0).getValueType() };
428 CallOptions.setTypeListBeforeSoften(OpsVT, N->getValueType(0), true);
429 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
430 RTLIB::LOG10_F32,
431 RTLIB::LOG10_F64,
432 RTLIB::LOG10_F80,
433 RTLIB::LOG10_F128,
434 RTLIB::LOG10_PPCF128),
435 NVT, Op, CallOptions, SDLoc(N)).first;
436 }
437
438 SDValue DAGTypeLegalizer::SoftenFloatRes_FMA(SDNode *N) {
439 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
440 SDValue Ops[3] = { GetSoftenedFloat(N->getOperand(0)),
441 GetSoftenedFloat(N->getOperand(1)),
442 GetSoftenedFloat(N->getOperand(2)) };
443 TargetLowering::MakeLibCallOptions CallOptions;
444 EVT OpsVT[3] = { N->getOperand(0).getValueType(),
445 N->getOperand(1).getValueType(),
446 N->getOperand(2).getValueType() };
447 CallOptions.setTypeListBeforeSoften(OpsVT, N->getValueType(0), true);
448 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
449 RTLIB::FMA_F32,
450 RTLIB::FMA_F64,
451 RTLIB::FMA_F80,
452 RTLIB::FMA_F128,
453 RTLIB::FMA_PPCF128),
454 NVT, Ops, CallOptions, SDLoc(N)).first;
455 }
456
457 SDValue DAGTypeLegalizer::SoftenFloatRes_FMUL(SDNode *N) {
458 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
459 SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
460 GetSoftenedFloat(N->getOperand(1)) };
461 TargetLowering::MakeLibCallOptions CallOptions;
462 EVT OpsVT[2] = { N->getOperand(0).getValueType(),
463 N->getOperand(1).getValueType() };
464 CallOptions.setTypeListBeforeSoften(OpsVT, N->getValueType(0), true);
465 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
466 RTLIB::MUL_F32,
467 RTLIB::MUL_F64,
468 RTLIB::MUL_F80,
469 RTLIB::MUL_F128,
470 RTLIB::MUL_PPCF128),
471 NVT, Ops, CallOptions, SDLoc(N)).first;
472 }
473
474 SDValue DAGTypeLegalizer::SoftenFloatRes_FNEARBYINT(SDNode *N) {
475 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
476 SDValue Op = GetSoftenedFloat(N->getOperand(0));
477 TargetLowering::MakeLibCallOptions CallOptions;
478 EVT OpsVT[1] = { N->getOperand(0).getValueType() };
479 CallOptions.setTypeListBeforeSoften(OpsVT, N->getValueType(0), true);
480 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
481 RTLIB::NEARBYINT_F32,
482 RTLIB::NEARBYINT_F64,
483 RTLIB::NEARBYINT_F80,
484 RTLIB::NEARBYINT_F128,
485 RTLIB::NEARBYINT_PPCF128),
486 NVT, Op, CallOptions, SDLoc(N)).first;
487 }
488
489 SDValue DAGTypeLegalizer::SoftenFloatRes_FNEG(SDNode *N, unsigned ResNo) {
490 // When LegalInHWReg, FNEG can be implemented as native bitwise operations.
491 if (isLegalInHWReg(N->getValueType(ResNo)))
492 return SDValue(N, ResNo);
493 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
494 SDLoc dl(N);
495
496 EVT FloatVT = N->getValueType(ResNo);
497 if (FloatVT == MVT::f32 || FloatVT == MVT::f64 || FloatVT == MVT::f128) {
498 // Expand Y = FNEG(X) -> Y = X ^ sign mask
499 APInt SignMask = APInt::getSignMask(NVT.getSizeInBits());
500 return DAG.getNode(ISD::XOR, dl, NVT, GetSoftenedFloat(N->getOperand(0)),
501 DAG.getConstant(SignMask, dl, NVT));
502 }
503
504 // Expand Y = FNEG(X) -> Y = SUB -0.0, X
505 SDValue Ops[2] = { DAG.getConstantFP(-0.0, dl, N->getValueType(0)),
506 GetSoftenedFloat(N->getOperand(0)) };
507 TargetLowering::MakeLibCallOptions CallOptions;
508 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
509 RTLIB::SUB_F32,
510 RTLIB::SUB_F64,
511 RTLIB::SUB_F80,
512 RTLIB::SUB_F128,
513 RTLIB::SUB_PPCF128),
514 NVT, Ops, CallOptions, dl).first;
515 }
516
517 SDValue DAGTypeLegalizer::SoftenFloatRes_FP_EXTEND(SDNode *N) {
518 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
519 SDValue Op = N->getOperand(0);
520
521 // There's only a libcall for f16 -> f32, so proceed in two stages. Also, it's
522 // entirely possible for both f16 and f32 to be legal, so use the fully
523 // hard-float FP_EXTEND rather than FP16_TO_FP.
524 if (Op.getValueType() == MVT::f16 && N->getValueType(0) != MVT::f32) {
525 Op = DAG.getNode(ISD::FP_EXTEND, SDLoc(N), MVT::f32, Op);
526 if (getTypeAction(MVT::f32) == TargetLowering::TypeSoftenFloat)
527 AddToWorklist(Op.getNode());
528 }
529
530 if (getTypeAction(Op.getValueType()) == TargetLowering::TypePromoteFloat) {
531 Op = GetPromotedFloat(Op);
532 // If the promotion did the FP_EXTEND to the destination type for us,
533 // there's nothing left to do here.
534 if (Op.getValueType() == N->getValueType(0)) {
535 return BitConvertToInteger(Op);
536 }
537 }
538
539 RTLIB::Libcall LC = RTLIB::getFPEXT(Op.getValueType(), N->getValueType(0));
540 assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_EXTEND!");
541 TargetLowering::MakeLibCallOptions CallOptions;
542 EVT OpsVT[1] = { N->getOperand(0).getValueType() };
543 CallOptions.setTypeListBeforeSoften(OpsVT, N->getValueType(0), true);
544 return TLI.makeLibCall(DAG, LC, NVT, Op, CallOptions, SDLoc(N)).first;
545 }
546
547 // FIXME: Should we just use 'normal' FP_EXTEND / FP_TRUNC instead of special
548 // nodes?
549 SDValue DAGTypeLegalizer::SoftenFloatRes_FP16_TO_FP(SDNode *N) {
550 EVT MidVT = TLI.getTypeToTransformTo(*DAG.getContext(), MVT::f32);
551 SDValue Op = N->getOperand(0);
552 TargetLowering::MakeLibCallOptions CallOptions;
553 EVT OpsVT[1] = { N->getOperand(0).getValueType() };
554 CallOptions.setTypeListBeforeSoften(OpsVT, N->getValueType(0), true);
555 SDValue Res32 = TLI.makeLibCall(DAG, RTLIB::FPEXT_F16_F32, MidVT, Op,
556 CallOptions, SDLoc(N)).first;
557 if (N->getValueType(0) == MVT::f32)
558 return Res32;
559
560 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
561 RTLIB::Libcall LC = RTLIB::getFPEXT(MVT::f32, N->getValueType(0));
562 assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_EXTEND!");
563 return TLI.makeLibCall(DAG, LC, NVT, Res32, CallOptions, SDLoc(N)).first;
564 }
565
566 SDValue DAGTypeLegalizer::SoftenFloatRes_FP_ROUND(SDNode *N) {
567 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
568 SDValue Op = N->getOperand(0);
569 if (N->getValueType(0) == MVT::f16) {
570 // Semi-soften first, to FP_TO_FP16, so that targets which support f16 as a
571 // storage-only type get a chance to select things.
572 return DAG.getNode(ISD::FP_TO_FP16, SDLoc(N), NVT, Op);
573 }
574
575 RTLIB::Libcall LC = RTLIB::getFPROUND(Op.getValueType(), N->getValueType(0));
576 assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_ROUND!");
577 TargetLowering::MakeLibCallOptions CallOptions;
578 EVT OpsVT[1] = { N->getOperand(0).getValueType() };
579 CallOptions.setTypeListBeforeSoften(OpsVT, N->getValueType(0), true);
580 return TLI.makeLibCall(DAG, LC, NVT, Op, CallOptions, SDLoc(N)).first;
581 }
582
583 SDValue DAGTypeLegalizer::SoftenFloatRes_FPOW(SDNode *N) {
584 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
585 SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
586 GetSoftenedFloat(N->getOperand(1)) };
587 TargetLowering::MakeLibCallOptions CallOptions;
588 EVT OpsVT[2] = { N->getOperand(0).getValueType(),
589 N->getOperand(1).getValueType() };
590 CallOptions.setTypeListBeforeSoften(OpsVT, N->getValueType(0), true);
591 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
592 RTLIB::POW_F32,
593 RTLIB::POW_F64,
594 RTLIB::POW_F80,
595 RTLIB::POW_F128,
596 RTLIB::POW_PPCF128),
597 NVT, Ops, CallOptions, SDLoc(N)).first;
598 }
599
600 SDValue DAGTypeLegalizer::SoftenFloatRes_FPOWI(SDNode *N) {
601 assert(N->getOperand(1).getValueType() == MVT::i32 &&
602 "Unsupported power type!");
603 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
604 SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)), N->getOperand(1) };
605 TargetLowering::MakeLibCallOptions CallOptions;
606 EVT OpsVT[2] = { N->getOperand(0).getValueType(),
607 N->getOperand(1).getValueType() };
608 CallOptions.setTypeListBeforeSoften(OpsVT, N->getValueType(0), true);
609 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
610 RTLIB::POWI_F32,
611 RTLIB::POWI_F64,
612 RTLIB::POWI_F80,
613 RTLIB::POWI_F128,
614 RTLIB::POWI_PPCF128),
615 NVT, Ops, CallOptions, SDLoc(N)).first;
616 }
617
618 SDValue DAGTypeLegalizer::SoftenFloatRes_FREM(SDNode *N) {
619 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
620 SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
621 GetSoftenedFloat(N->getOperand(1)) };
622 TargetLowering::MakeLibCallOptions CallOptions;
623 EVT OpsVT[2] = { N->getOperand(0).getValueType(),
624 N->getOperand(1).getValueType() };
625 CallOptions.setTypeListBeforeSoften(OpsVT, N->getValueType(0), true);
626 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
627 RTLIB::REM_F32,
628 RTLIB::REM_F64,
629 RTLIB::REM_F80,
630 RTLIB::REM_F128,
631 RTLIB::REM_PPCF128),
632 NVT, Ops, CallOptions, SDLoc(N)).first;
633 }
634
635 SDValue DAGTypeLegalizer::SoftenFloatRes_FRINT(SDNode *N) {
636 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
637 SDValue Op = GetSoftenedFloat(N->getOperand(0));
638 TargetLowering::MakeLibCallOptions CallOptions;
639 EVT OpsVT[1] = { N->getOperand(0).getValueType() };
640 CallOptions.setTypeListBeforeSoften(OpsVT, N->getValueType(0), true);
641 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
642 RTLIB::RINT_F32,
643 RTLIB::RINT_F64,
644 RTLIB::RINT_F80,
645 RTLIB::RINT_F128,
646 RTLIB::RINT_PPCF128),
647 NVT, Op, CallOptions, SDLoc(N)).first;
648 }
649
650 SDValue DAGTypeLegalizer::SoftenFloatRes_FROUND(SDNode *N) {
651 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
652 SDValue Op = GetSoftenedFloat(N->getOperand(0));
653 TargetLowering::MakeLibCallOptions CallOptions;
654 EVT OpsVT[1] = { N->getOperand(0).getValueType() };
655 CallOptions.setTypeListBeforeSoften(OpsVT, N->getValueType(0), true);
656 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
657 RTLIB::ROUND_F32,
658 RTLIB::ROUND_F64,
659 RTLIB::ROUND_F80,
660 RTLIB::ROUND_F128,
661 RTLIB::ROUND_PPCF128),
662 NVT, Op, CallOptions, SDLoc(N)).first;
663 }
664
665 SDValue DAGTypeLegalizer::SoftenFloatRes_FSIN(SDNode *N) {
666 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
667 SDValue Op = GetSoftenedFloat(N->getOperand(0));
668 TargetLowering::MakeLibCallOptions CallOptions;
669 EVT OpsVT[1] = { N->getOperand(0).getValueType() };
670 CallOptions.setTypeListBeforeSoften(OpsVT, N->getValueType(0), true);
671 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
672 RTLIB::SIN_F32,
673 RTLIB::SIN_F64,
674 RTLIB::SIN_F80,
675 RTLIB::SIN_F128,
676 RTLIB::SIN_PPCF128),
677 NVT, Op, CallOptions, SDLoc(N)).first;
678 }
679
680 SDValue DAGTypeLegalizer::SoftenFloatRes_FSQRT(SDNode *N) {
681 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
682 SDValue Op = GetSoftenedFloat(N->getOperand(0));
683 TargetLowering::MakeLibCallOptions CallOptions;
684 EVT OpsVT[1] = { N->getOperand(0).getValueType() };
685 CallOptions.setTypeListBeforeSoften(OpsVT, N->getValueType(0), true);
686 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
687 RTLIB::SQRT_F32,
688 RTLIB::SQRT_F64,
689 RTLIB::SQRT_F80,
690 RTLIB::SQRT_F128,
691 RTLIB::SQRT_PPCF128),
692 NVT, Op, CallOptions, SDLoc(N)).first;
693 }
694
695 SDValue DAGTypeLegalizer::SoftenFloatRes_FSUB(SDNode *N) {
696 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
697 SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
698 GetSoftenedFloat(N->getOperand(1)) };
699 TargetLowering::MakeLibCallOptions CallOptions;
700 EVT OpsVT[2] = { N->getOperand(0).getValueType(),
701 N->getOperand(1).getValueType() };
702 CallOptions.setTypeListBeforeSoften(OpsVT, N->getValueType(0), true);
703 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
704 RTLIB::SUB_F32,
705 RTLIB::SUB_F64,
706 RTLIB::SUB_F80,
707 RTLIB::SUB_F128,
708 RTLIB::SUB_PPCF128),
709 NVT, Ops, CallOptions, SDLoc(N)).first;
710 }
711
712 SDValue DAGTypeLegalizer::SoftenFloatRes_FTRUNC(SDNode *N) {
713 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
714 if (N->getValueType(0) == MVT::f16)
715 return DAG.getNode(ISD::FP_TO_FP16, SDLoc(N), NVT, N->getOperand(0));
716
717 SDValue Op = GetSoftenedFloat(N->getOperand(0));
718 TargetLowering::MakeLibCallOptions CallOptions;
719 EVT OpsVT[1] = { N->getOperand(0).getValueType() };
720 CallOptions.setTypeListBeforeSoften(OpsVT, N->getValueType(0), true);
721 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
722 RTLIB::TRUNC_F32,
723 RTLIB::TRUNC_F64,
724 RTLIB::TRUNC_F80,
725 RTLIB::TRUNC_F128,
726 RTLIB::TRUNC_PPCF128),
727 NVT, Op, CallOptions, SDLoc(N)).first;
728 }
729
730 SDValue DAGTypeLegalizer::SoftenFloatRes_LOAD(SDNode *N, unsigned ResNo) {
731 bool LegalInHWReg = isLegalInHWReg(N->getValueType(ResNo));
732 LoadSDNode *L = cast<LoadSDNode>(N);
733 EVT VT = N->getValueType(0);
734 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
735 SDLoc dl(N);
736
737 auto MMOFlags =
738 L->getMemOperand()->getFlags() &
739 ~(MachineMemOperand::MOInvariant | MachineMemOperand::MODereferenceable);
740 SDValue NewL;
741 if (L->getExtensionType() == ISD::NON_EXTLOAD) {
742 NewL = DAG.getLoad(L->getAddressingMode(), L->getExtensionType(), NVT, dl,
743 L->getChain(), L->getBasePtr(), L->getOffset(),
744 L->getPointerInfo(), NVT, L->getAlignment(), MMOFlags,
745 L->getAAInfo());
746 // Legalized the chain result - switch anything that used the old chain to
747 // use the new one.
748 if (N != NewL.getValue(1).getNode())
749 ReplaceValueWith(SDValue(N, 1), NewL.getValue(1));
750 return NewL;
751 }
752
753 // Do a non-extending load followed by FP_EXTEND.
754 NewL = DAG.getLoad(L->getAddressingMode(), ISD::NON_EXTLOAD, L->getMemoryVT(),
755 dl, L->getChain(), L->getBasePtr(), L->getOffset(),
756 L->getPointerInfo(), L->getMemoryVT(), L->getAlignment(),
757 MMOFlags, L->getAAInfo());
758 // Legalized the chain result - switch anything that used the old chain to
759 // use the new one.
760 ReplaceValueWith(SDValue(N, 1), NewL.getValue(1));
761 auto ExtendNode = DAG.getNode(ISD::FP_EXTEND, dl, VT, NewL);
762 if (LegalInHWReg)
763 return ExtendNode;
764 return BitConvertToInteger(ExtendNode);
765 }
766
767 SDValue DAGTypeLegalizer::SoftenFloatRes_SELECT(SDNode *N, unsigned ResNo) {
768 if (isLegalInHWReg(N->getValueType(ResNo)))
769 return SDValue(N, ResNo);
770 SDValue LHS = GetSoftenedFloat(N->getOperand(1));
771 SDValue RHS = GetSoftenedFloat(N->getOperand(2));
772 return DAG.getSelect(SDLoc(N),
773 LHS.getValueType(), N->getOperand(0), LHS, RHS);
774 }
775
776 SDValue DAGTypeLegalizer::SoftenFloatRes_SELECT_CC(SDNode *N, unsigned ResNo) {
777 if (isLegalInHWReg(N->getValueType(ResNo)))
778 return SDValue(N, ResNo);
779 SDValue LHS = GetSoftenedFloat(N->getOperand(2));
780 SDValue RHS = GetSoftenedFloat(N->getOperand(3));
781 return DAG.getNode(ISD::SELECT_CC, SDLoc(N),
782 LHS.getValueType(), N->getOperand(0),
783 N->getOperand(1), LHS, RHS, N->getOperand(4));
784 }
785
786 SDValue DAGTypeLegalizer::SoftenFloatRes_UNDEF(SDNode *N) {
787 return DAG.getUNDEF(TLI.getTypeToTransformTo(*DAG.getContext(),
788 N->getValueType(0)));
789 }
790
791 SDValue DAGTypeLegalizer::SoftenFloatRes_VAARG(SDNode *N) {
792 SDValue Chain = N->getOperand(0); // Get the chain.
793 SDValue Ptr = N->getOperand(1); // Get the pointer.
794 EVT VT = N->getValueType(0);
795 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
796 SDLoc dl(N);
797
798 SDValue NewVAARG;
799 NewVAARG = DAG.getVAArg(NVT, dl, Chain, Ptr, N->getOperand(2),
800 N->getConstantOperandVal(3));
801
802 // Legalized the chain result - switch anything that used the old chain to
803 // use the new one.
804 if (N != NewVAARG.getValue(1).getNode())
805 ReplaceValueWith(SDValue(N, 1), NewVAARG.getValue(1));
806 return NewVAARG;
807 }
808
809 SDValue DAGTypeLegalizer::SoftenFloatRes_XINT_TO_FP(SDNode *N) {
810 bool Signed = N->getOpcode() == ISD::SINT_TO_FP;
811 EVT SVT = N->getOperand(0).getValueType();
812 EVT RVT = N->getValueType(0);
813 EVT NVT = EVT();
814 SDLoc dl(N);
815
816 // If the input is not legal, eg: i1 -> fp, then it needs to be promoted to
817 // a larger type, eg: i8 -> fp. Even if it is legal, no libcall may exactly
818 // match. Look for an appropriate libcall.
819 RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
820 for (unsigned t = MVT::FIRST_INTEGER_VALUETYPE;
821 t <= MVT::LAST_INTEGER_VALUETYPE && LC == RTLIB::UNKNOWN_LIBCALL; ++t) {
822 NVT = (MVT::SimpleValueType)t;
823 // The source needs to big enough to hold the operand.
824 if (NVT.bitsGE(SVT))
825 LC = Signed ? RTLIB::getSINTTOFP(NVT, RVT):RTLIB::getUINTTOFP (NVT, RVT);
826 }
827 assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported XINT_TO_FP!");
828
829 // Sign/zero extend the argument if the libcall takes a larger type.
830 SDValue Op = DAG.getNode(Signed ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND, dl,
831 NVT, N->getOperand(0));
832 TargetLowering::MakeLibCallOptions CallOptions;
833 CallOptions.setSExt(Signed);
834 EVT OpsVT[1] = { N->getOperand(0).getValueType() };
835 CallOptions.setTypeListBeforeSoften(OpsVT, N->getValueType(0), true);
836 return TLI.makeLibCall(DAG, LC,
837 TLI.getTypeToTransformTo(*DAG.getContext(), RVT),
838 Op, CallOptions, dl).first;
839 }
840
841
842 //===----------------------------------------------------------------------===//
843 // Convert Float Operand to Integer for Non-HW-supported Operations.
844 //===----------------------------------------------------------------------===//
845
846 bool DAGTypeLegalizer::SoftenFloatOperand(SDNode *N, unsigned OpNo) {
847 LLVM_DEBUG(dbgs() << "Soften float operand " << OpNo << ": "; N->dump(&DAG);
848 dbgs() << "\n");
849 SDValue Res = SDValue();
850
851 switch (N->getOpcode()) {
852 default:
853 if (CanSkipSoftenFloatOperand(N, OpNo))
854 return false;
855 #ifndef NDEBUG
856 dbgs() << "SoftenFloatOperand Op #" << OpNo << ": ";
857 N->dump(&DAG); dbgs() << "\n";
858 #endif
859 llvm_unreachable("Do not know how to soften this operator's operand!");
860
861 case ISD::BITCAST: Res = SoftenFloatOp_BITCAST(N); break;
862 case ISD::CopyToReg: Res = SoftenFloatOp_COPY_TO_REG(N); break;
863 case ISD::BR_CC: Res = SoftenFloatOp_BR_CC(N); break;
864 case ISD::FABS: Res = SoftenFloatOp_FABS(N); break;
865 case ISD::FCOPYSIGN: Res = SoftenFloatOp_FCOPYSIGN(N); break;
866 case ISD::FNEG: Res = SoftenFloatOp_FNEG(N); break;
867 case ISD::FP_EXTEND: Res = SoftenFloatOp_FP_EXTEND(N); break;
868 case ISD::FP_TO_FP16: // Same as FP_ROUND for softening purposes
869 case ISD::FP_ROUND: Res = SoftenFloatOp_FP_ROUND(N); break;
870 case ISD::FP_TO_SINT:
871 case ISD::FP_TO_UINT: Res = SoftenFloatOp_FP_TO_XINT(N); break;
872 case ISD::LROUND: Res = SoftenFloatOp_LROUND(N); break;
873 case ISD::LLROUND: Res = SoftenFloatOp_LLROUND(N); break;
874 case ISD::LRINT: Res = SoftenFloatOp_LRINT(N); break;
875 case ISD::LLRINT: Res = SoftenFloatOp_LLRINT(N); break;
876 case ISD::SELECT: Res = SoftenFloatOp_SELECT(N); break;
877 case ISD::SELECT_CC: Res = SoftenFloatOp_SELECT_CC(N); break;
878 case ISD::SETCC: Res = SoftenFloatOp_SETCC(N); break;
879 case ISD::STORE:
880 Res = SoftenFloatOp_STORE(N, OpNo);
881 // Do not try to analyze or soften this node again if the value is
882 // or can be held in a register. In that case, Res.getNode() should
883 // be equal to N.
884 if (Res.getNode() == N &&
885 isLegalInHWReg(N->getOperand(OpNo).getValueType()))
886 return false;
887 // Otherwise, we need to reanalyze and lower the new Res nodes.
888 break;
889 }
890
891 // If the result is null, the sub-method took care of registering results etc.
892 if (!Res.getNode()) return false;
893
894 // If the result is N, the sub-method updated N in place. Tell the legalizer
895 // core about this to re-analyze.
896 if (Res.getNode() == N)
897 return true;
898
899 assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 &&
900 "Invalid operand expansion");
901
902 ReplaceValueWith(SDValue(N, 0), Res);
903 return false;
904 }
905
906 bool DAGTypeLegalizer::CanSkipSoftenFloatOperand(SDNode *N, unsigned OpNo) {
907 if (!isLegalInHWReg(N->getOperand(OpNo).getValueType()))
908 return false;
909
910 // When the operand type can be kept in registers there is nothing to do for
911 // the following opcodes.
912 switch (N->getOperand(OpNo).getOpcode()) {
913 case ISD::BITCAST:
914 case ISD::ConstantFP:
915 case ISD::CopyFromReg:
916 case ISD::CopyToReg:
917 case ISD::FABS:
918 case ISD::FCOPYSIGN:
919 case ISD::FNEG:
920 case ISD::Register:
921 case ISD::SELECT:
922 case ISD::SELECT_CC:
923 return true;
924 }
925
926 switch (N->getOpcode()) {
927 case ISD::ConstantFP: // Leaf node.
928 case ISD::CopyFromReg: // Operand is a register that we know to be left
929 // unchanged by SoftenFloatResult().
930 case ISD::Register: // Leaf node.
931 return true;
932 }
933 return false;
934 }
935
936 SDValue DAGTypeLegalizer::SoftenFloatOp_BITCAST(SDNode *N) {
937 SDValue Op0 = GetSoftenedFloat(N->getOperand(0));
938
939 if (Op0 == N->getOperand(0))
940 return SDValue();
941
942 return DAG.getNode(ISD::BITCAST, SDLoc(N), N->getValueType(0), Op0);
943 }
944
945 SDValue DAGTypeLegalizer::SoftenFloatOp_COPY_TO_REG(SDNode *N) {
946 SDValue Op1 = GetSoftenedFloat(N->getOperand(1));
947 SDValue Op2 = GetSoftenedFloat(N->getOperand(2));
948
949 if (Op1 == N->getOperand(1) && Op2 == N->getOperand(2))
950 return SDValue();
951
952 if (N->getNumOperands() == 3)
953 return SDValue(DAG.UpdateNodeOperands(N, N->getOperand(0), Op1, Op2), 0);
954
955 return SDValue(DAG.UpdateNodeOperands(N, N->getOperand(0), Op1, Op2,
956 N->getOperand(3)),
957 0);
958 }
959
960 SDValue DAGTypeLegalizer::SoftenFloatOp_FP_EXTEND(SDNode *N) {
961 // If we get here, the result must be legal but the source illegal.
962 EVT SVT = N->getOperand(0).getValueType();
963 EVT RVT = N->getValueType(0);
964 SDValue Op = GetSoftenedFloat(N->getOperand(0));
965
966 if (SVT == MVT::f16)
967 return DAG.getNode(ISD::FP16_TO_FP, SDLoc(N), RVT, Op);
968
969 RTLIB::Libcall LC = RTLIB::getFPEXT(SVT, RVT);
970 assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_EXTEND libcall");
971
972 TargetLowering::MakeLibCallOptions CallOptions;
973 EVT OpsVT[1] = { N->getOperand(0).getValueType() };
974 CallOptions.setTypeListBeforeSoften(OpsVT, N->getValueType(0), true);
975 return TLI.makeLibCall(DAG, LC, RVT, Op, CallOptions, SDLoc(N)).first;
976 }
977
978
979 SDValue DAGTypeLegalizer::SoftenFloatOp_FP_ROUND(SDNode *N) {
980 // We actually deal with the partially-softened FP_TO_FP16 node too, which
981 // returns an i16 so doesn't meet the constraints necessary for FP_ROUND.
982 assert(N->getOpcode() == ISD::FP_ROUND || N->getOpcode() == ISD::FP_TO_FP16);
983
984 EVT SVT = N->getOperand(0).getValueType();
985 EVT RVT = N->getValueType(0);
986 EVT FloatRVT = N->getOpcode() == ISD::FP_TO_FP16 ? MVT::f16 : RVT;
987
988 RTLIB::Libcall LC = RTLIB::getFPROUND(SVT, FloatRVT);
989 assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_ROUND libcall");
990
991 SDValue Op = GetSoftenedFloat(N->getOperand(0));
992 TargetLowering::MakeLibCallOptions CallOptions;
993 EVT OpsVT[1] = { N->getOperand(0).getValueType() };
994 CallOptions.setTypeListBeforeSoften(OpsVT, N->getValueType(0), true);
995 return TLI.makeLibCall(DAG, LC, RVT, Op, CallOptions, SDLoc(N)).first;
996 }
997
998 SDValue DAGTypeLegalizer::SoftenFloatOp_BR_CC(SDNode *N) {
999 SDValue NewLHS = N->getOperand(2), NewRHS = N->getOperand(3);
1000 ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(1))->get();
1001
1002 EVT VT = NewLHS.getValueType();
1003 NewLHS = GetSoftenedFloat(NewLHS);
1004 NewRHS = GetSoftenedFloat(NewRHS);
1005 TLI.softenSetCCOperands(DAG, VT, NewLHS, NewRHS, CCCode, SDLoc(N),
1006 N->getOperand(2), N->getOperand(3));
1007
1008 // If softenSetCCOperands returned a scalar, we need to compare the result
1009 // against zero to select between true and false values.
1010 if (!NewRHS.getNode()) {
1011 NewRHS = DAG.getConstant(0, SDLoc(N), NewLHS.getValueType());
1012 CCCode = ISD::SETNE;
1013 }
1014
1015 // Update N to have the operands specified.
1016 return SDValue(DAG.UpdateNodeOperands(N, N->getOperand(0),
1017 DAG.getCondCode(CCCode), NewLHS, NewRHS,
1018 N->getOperand(4)),
1019 0);
1020 }
1021
1022 SDValue DAGTypeLegalizer::SoftenFloatOp_FABS(SDNode *N) {
1023 SDValue Op = GetSoftenedFloat(N->getOperand(0));
1024
1025 if (Op == N->getOperand(0))
1026 return SDValue();
1027
1028 return SDValue(DAG.UpdateNodeOperands(N, Op), 0);
1029 }
1030
1031 SDValue DAGTypeLegalizer::SoftenFloatOp_FCOPYSIGN(SDNode *N) {
1032 SDValue Op0 = GetSoftenedFloat(N->getOperand(0));
1033 SDValue Op1 = GetSoftenedFloat(N->getOperand(1));
1034
1035 if (Op0 == N->getOperand(0) && Op1 == N->getOperand(1))
1036 return SDValue();
1037
1038 return SDValue(DAG.UpdateNodeOperands(N, Op0, Op1), 0);
1039 }
1040
1041 SDValue DAGTypeLegalizer::SoftenFloatOp_FNEG(SDNode *N) {
1042 SDValue Op = GetSoftenedFloat(N->getOperand(0));
1043
1044 if (Op == N->getOperand(0))
1045 return SDValue();
1046
1047 return SDValue(DAG.UpdateNodeOperands(N, Op), 0);
1048 }
1049
1050 SDValue DAGTypeLegalizer::SoftenFloatOp_FP_TO_XINT(SDNode *N) {
1051 bool Signed = N->getOpcode() == ISD::FP_TO_SINT;
1052 EVT SVT = N->getOperand(0).getValueType();
1053 EVT RVT = N->getValueType(0);
1054 EVT NVT = EVT();
1055 SDLoc dl(N);
1056
1057 // If the result is not legal, eg: fp -> i1, then it needs to be promoted to
1058 // a larger type, eg: fp -> i32. Even if it is legal, no libcall may exactly
1059 // match, eg. we don't have fp -> i8 conversions.
1060 // Look for an appropriate libcall.
1061 RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
1062 for (unsigned IntVT = MVT::FIRST_INTEGER_VALUETYPE;
1063 IntVT <= MVT::LAST_INTEGER_VALUETYPE && LC == RTLIB::UNKNOWN_LIBCALL;
1064 ++IntVT) {
1065 NVT = (MVT::SimpleValueType)IntVT;
1066 // The type needs to big enough to hold the result.
1067 if (NVT.bitsGE(RVT))
1068 LC = Signed ? RTLIB::getFPTOSINT(SVT, NVT):RTLIB::getFPTOUINT(SVT, NVT);
1069 }
1070 assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_TO_XINT!");
1071
1072 SDValue Op = GetSoftenedFloat(N->getOperand(0));
1073 TargetLowering::MakeLibCallOptions CallOptions;
1074 EVT OpsVT[1] = { N->getOperand(0).getValueType() };
1075 CallOptions.setTypeListBeforeSoften(OpsVT, N->getValueType(0), true);
1076 SDValue Res = TLI.makeLibCall(DAG, LC, NVT, Op, CallOptions, dl).first;
1077
1078 // Truncate the result if the libcall returns a larger type.
1079 return DAG.getNode(ISD::TRUNCATE, dl, RVT, Res);
1080 }
1081
1082 SDValue DAGTypeLegalizer::SoftenFloatOp_SELECT(SDNode *N) {
1083 SDValue Op1 = GetSoftenedFloat(N->getOperand(1));
1084 SDValue Op2 = GetSoftenedFloat(N->getOperand(2));
1085
1086 if (Op1 == N->getOperand(1) && Op2 == N->getOperand(2))
1087 return SDValue();
1088
1089 return SDValue(DAG.UpdateNodeOperands(N, N->getOperand(0), Op1, Op2),
1090 0);
1091 }
1092
1093 SDValue DAGTypeLegalizer::SoftenFloatOp_SELECT_CC(SDNode *N) {
1094 SDValue NewLHS = N->getOperand(0), NewRHS = N->getOperand(1);
1095 ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(4))->get();
1096
1097 EVT VT = NewLHS.getValueType();
1098 NewLHS = GetSoftenedFloat(NewLHS);
1099 NewRHS = GetSoftenedFloat(NewRHS);
1100 TLI.softenSetCCOperands(DAG, VT, NewLHS, NewRHS, CCCode, SDLoc(N),
1101 N->getOperand(0), N->getOperand(1));
1102
1103 // If softenSetCCOperands returned a scalar, we need to compare the result
1104 // against zero to select between true and false values.
1105 if (!NewRHS.getNode()) {
1106 NewRHS = DAG.getConstant(0, SDLoc(N), NewLHS.getValueType());
1107 CCCode = ISD::SETNE;
1108 }
1109
1110 // Update N to have the operands specified.
1111 return SDValue(DAG.UpdateNodeOperands(N, NewLHS, NewRHS,
1112 N->getOperand(2), N->getOperand(3),
1113 DAG.getCondCode(CCCode)),
1114 0);
1115 }
1116
1117 SDValue DAGTypeLegalizer::SoftenFloatOp_SETCC(SDNode *N) {
1118 SDValue NewLHS = N->getOperand(0), NewRHS = N->getOperand(1);
1119 ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(2))->get();
1120
1121 EVT VT = NewLHS.getValueType();
1122 NewLHS = GetSoftenedFloat(NewLHS);
1123 NewRHS = GetSoftenedFloat(NewRHS);
1124 TLI.softenSetCCOperands(DAG, VT, NewLHS, NewRHS, CCCode, SDLoc(N),
1125 N->getOperand(0), N->getOperand(1));
1126
1127 // If softenSetCCOperands returned a scalar, use it.
1128 if (!NewRHS.getNode()) {
1129 assert(NewLHS.getValueType() == N->getValueType(0) &&
1130 "Unexpected setcc expansion!");
1131 return NewLHS;
1132 }
1133
1134 // Otherwise, update N to have the operands specified.
1135 return SDValue(DAG.UpdateNodeOperands(N, NewLHS, NewRHS,
1136 DAG.getCondCode(CCCode)),
1137 0);
1138 }
1139
1140 SDValue DAGTypeLegalizer::SoftenFloatOp_STORE(SDNode *N, unsigned OpNo) {
1141 assert(ISD::isUNINDEXEDStore(N) && "Indexed store during type legalization!");
1142 assert(OpNo == 1 && "Can only soften the stored value!");
1143 StoreSDNode *ST = cast<StoreSDNode>(N);
1144 SDValue Val = ST->getValue();
1145 SDLoc dl(N);
1146
1147 if (ST->isTruncatingStore())
1148 // Do an FP_ROUND followed by a non-truncating store.
1149 Val = BitConvertToInteger(DAG.getNode(ISD::FP_ROUND, dl, ST->getMemoryVT(),
1150 Val, DAG.getIntPtrConstant(0, dl)));
1151 else
1152 Val = GetSoftenedFloat(Val);
1153
1154 return DAG.getStore(ST->getChain(), dl, Val, ST->getBasePtr(),
1155 ST->getMemOperand());
1156 }
1157
1158 SDValue DAGTypeLegalizer::SoftenFloatOp_LROUND(SDNode *N) {
1159 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1160
1161 SDValue Op = GetSoftenedFloat(N->getOperand(0));
1162 EVT RetVT = N->getOperand(0).getValueType().getSimpleVT().SimpleTy;
1163 TargetLowering::MakeLibCallOptions CallOptions;
1164 EVT OpsVT[1] = { N->getOperand(0).getValueType() };
1165 CallOptions.setTypeListBeforeSoften(OpsVT, N->getValueType(0), true);
1166 return TLI.makeLibCall(DAG, GetFPLibCall(RetVT,
1167 RTLIB::LROUND_F32,
1168 RTLIB::LROUND_F64,
1169 RTLIB::LROUND_F80,
1170 RTLIB::LROUND_F128,
1171 RTLIB::LROUND_PPCF128),
1172 NVT, Op, CallOptions, SDLoc(N)).first;
1173 }
1174
1175 SDValue DAGTypeLegalizer::SoftenFloatOp_LLROUND(SDNode *N) {
1176 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1177
1178 SDValue Op = GetSoftenedFloat(N->getOperand(0));
1179 EVT RetVT = N->getOperand(0).getValueType().getSimpleVT().SimpleTy;
1180 TargetLowering::MakeLibCallOptions CallOptions;
1181 EVT OpsVT[1] = { N->getOperand(0).getValueType() };
1182 CallOptions.setTypeListBeforeSoften(OpsVT, N->getValueType(0), true);
1183 return TLI.makeLibCall(DAG, GetFPLibCall(RetVT,
1184 RTLIB::LLROUND_F32,
1185 RTLIB::LLROUND_F64,
1186 RTLIB::LLROUND_F80,
1187 RTLIB::LLROUND_F128,
1188 RTLIB::LLROUND_PPCF128),
1189 NVT, Op, CallOptions, SDLoc(N)).first;
1190 }
1191
1192 SDValue DAGTypeLegalizer::SoftenFloatOp_LRINT(SDNode *N) {
1193 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1194
1195 SDValue Op = GetSoftenedFloat(N->getOperand(0));
1196 EVT RetVT = N->getOperand(0).getValueType().getSimpleVT().SimpleTy;
1197 TargetLowering::MakeLibCallOptions CallOptions;
1198 EVT OpsVT[1] = { N->getOperand(0).getValueType() };
1199 CallOptions.setTypeListBeforeSoften(OpsVT, N->getValueType(0), true);
1200 return TLI.makeLibCall(DAG, GetFPLibCall(RetVT,
1201 RTLIB::LRINT_F32,
1202 RTLIB::LRINT_F64,
1203 RTLIB::LRINT_F80,
1204 RTLIB::LRINT_F128,
1205 RTLIB::LRINT_PPCF128),
1206 NVT, Op, CallOptions, SDLoc(N)).first;
1207 }
1208
1209 SDValue DAGTypeLegalizer::SoftenFloatOp_LLRINT(SDNode *N) {
1210 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1211
1212 SDValue Op = GetSoftenedFloat(N->getOperand(0));
1213 EVT RetVT = N->getOperand(0).getValueType().getSimpleVT().SimpleTy;
1214 TargetLowering::MakeLibCallOptions CallOptions;
1215 EVT OpsVT[1] = { N->getOperand(0).getValueType() };
1216 CallOptions.setTypeListBeforeSoften(OpsVT, N->getValueType(0), true);
1217 return TLI.makeLibCall(DAG, GetFPLibCall(RetVT,
1218 RTLIB::LLRINT_F32,
1219 RTLIB::LLRINT_F64,
1220 RTLIB::LLRINT_F80,
1221 RTLIB::LLRINT_F128,
1222 RTLIB::LLRINT_PPCF128),
1223 NVT, Op, CallOptions, SDLoc(N)).first;
1224 }
1225
1226 //===----------------------------------------------------------------------===//
1227 // Float Result Expansion
1228 //===----------------------------------------------------------------------===//
1229
1230 /// ExpandFloatResult - This method is called when the specified result of the
1231 /// specified node is found to need expansion. At this point, the node may also
1232 /// have invalid operands or may have other results that need promotion, we just
1233 /// know that (at least) one result needs expansion.
1234 void DAGTypeLegalizer::ExpandFloatResult(SDNode *N, unsigned ResNo) {
1235 LLVM_DEBUG(dbgs() << "Expand float result: "; N->dump(&DAG); dbgs() << "\n");
1236 SDValue Lo, Hi;
1237 Lo = Hi = SDValue();
1238
1239 // See if the target wants to custom expand this node.
1240 if (CustomLowerNode(N, N->getValueType(ResNo), true))
1241 return;
1242
1243 switch (N->getOpcode()) {
1244 default:
1245 #ifndef NDEBUG
1246 dbgs() << "ExpandFloatResult #" << ResNo << ": ";
1247 N->dump(&DAG); dbgs() << "\n";
1248 #endif
1249 llvm_unreachable("Do not know how to expand the result of this operator!");
1250
1251 case ISD::UNDEF: SplitRes_UNDEF(N, Lo, Hi); break;
1252 case ISD::SELECT: SplitRes_SELECT(N, Lo, Hi); break;
1253 case ISD::SELECT_CC: SplitRes_SELECT_CC(N, Lo, Hi); break;
1254
1255 case ISD::MERGE_VALUES: ExpandRes_MERGE_VALUES(N, ResNo, Lo, Hi); break;
1256 case ISD::BITCAST: ExpandRes_BITCAST(N, Lo, Hi); break;
1257 case ISD::BUILD_PAIR: ExpandRes_BUILD_PAIR(N, Lo, Hi); break;
1258 case ISD::EXTRACT_ELEMENT: ExpandRes_EXTRACT_ELEMENT(N, Lo, Hi); break;
1259 case ISD::EXTRACT_VECTOR_ELT: ExpandRes_EXTRACT_VECTOR_ELT(N, Lo, Hi); break;
1260 case ISD::VAARG: ExpandRes_VAARG(N, Lo, Hi); break;
1261
1262 case ISD::ConstantFP: ExpandFloatRes_ConstantFP(N, Lo, Hi); break;
1263 case ISD::FABS: ExpandFloatRes_FABS(N, Lo, Hi); break;
1264 case ISD::FMINNUM: ExpandFloatRes_FMINNUM(N, Lo, Hi); break;
1265 case ISD::FMAXNUM: ExpandFloatRes_FMAXNUM(N, Lo, Hi); break;
1266 case ISD::FADD: ExpandFloatRes_FADD(N, Lo, Hi); break;
1267 case ISD::FCEIL: ExpandFloatRes_FCEIL(N, Lo, Hi); break;
1268 case ISD::FCOPYSIGN: ExpandFloatRes_FCOPYSIGN(N, Lo, Hi); break;
1269 case ISD::FCOS: ExpandFloatRes_FCOS(N, Lo, Hi); break;
1270 case ISD::FDIV: ExpandFloatRes_FDIV(N, Lo, Hi); break;
1271 case ISD::FEXP: ExpandFloatRes_FEXP(N, Lo, Hi); break;
1272 case ISD::FEXP2: ExpandFloatRes_FEXP2(N, Lo, Hi); break;
1273 case ISD::FFLOOR: ExpandFloatRes_FFLOOR(N, Lo, Hi); break;
1274 case ISD::FLOG: ExpandFloatRes_FLOG(N, Lo, Hi); break;
1275 case ISD::FLOG2: ExpandFloatRes_FLOG2(N, Lo, Hi); break;
1276 case ISD::FLOG10: ExpandFloatRes_FLOG10(N, Lo, Hi); break;
1277 case ISD::FMA: ExpandFloatRes_FMA(N, Lo, Hi); break;
1278 case ISD::FMUL: ExpandFloatRes_FMUL(N, Lo, Hi); break;
1279 case ISD::FNEARBYINT: ExpandFloatRes_FNEARBYINT(N, Lo, Hi); break;
1280 case ISD::FNEG: ExpandFloatRes_FNEG(N, Lo, Hi); break;
1281 case ISD::FP_EXTEND: ExpandFloatRes_FP_EXTEND(N, Lo, Hi); break;
1282 case ISD::FPOW: ExpandFloatRes_FPOW(N, Lo, Hi); break;
1283 case ISD::FPOWI: ExpandFloatRes_FPOWI(N, Lo, Hi); break;
1284 case ISD::FRINT: ExpandFloatRes_FRINT(N, Lo, Hi); break;
1285 case ISD::FROUND: ExpandFloatRes_FROUND(N, Lo, Hi); break;
1286 case ISD::FSIN: ExpandFloatRes_FSIN(N, Lo, Hi); break;
1287 case ISD::FSQRT: ExpandFloatRes_FSQRT(N, Lo, Hi); break;
1288 case ISD::FSUB: ExpandFloatRes_FSUB(N, Lo, Hi); break;
1289 case ISD::FTRUNC: ExpandFloatRes_FTRUNC(N, Lo, Hi); break;
1290 case ISD::LOAD: ExpandFloatRes_LOAD(N, Lo, Hi); break;
1291 case ISD::SINT_TO_FP:
1292 case ISD::UINT_TO_FP: ExpandFloatRes_XINT_TO_FP(N, Lo, Hi); break;
1293 case ISD::FREM: ExpandFloatRes_FREM(N, Lo, Hi); break;
1294 }
1295
1296 // If Lo/Hi is null, the sub-method took care of registering results etc.
1297 if (Lo.getNode())
1298 SetExpandedFloat(SDValue(N, ResNo), Lo, Hi);
1299 }
1300
1301 void DAGTypeLegalizer::ExpandFloatRes_ConstantFP(SDNode *N, SDValue &Lo,
1302 SDValue &Hi) {
1303 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1304 assert(NVT.getSizeInBits() == 64 &&
1305 "Do not know how to expand this float constant!");
1306 APInt C = cast<ConstantFPSDNode>(N)->getValueAPF().bitcastToAPInt();
1307 SDLoc dl(N);
1308 Lo = DAG.getConstantFP(APFloat(DAG.EVTToAPFloatSemantics(NVT),
1309 APInt(64, C.getRawData()[1])),
1310 dl, NVT);
1311 Hi = DAG.getConstantFP(APFloat(DAG.EVTToAPFloatSemantics(NVT),
1312 APInt(64, C.getRawData()[0])),
1313 dl, NVT);
1314 }
1315
1316 void DAGTypeLegalizer::ExpandFloatRes_FABS(SDNode *N, SDValue &Lo,
1317 SDValue &Hi) {
1318 assert(N->getValueType(0) == MVT::ppcf128 &&
1319 "Logic only correct for ppcf128!");
1320 SDLoc dl(N);
1321 SDValue Tmp;
1322 GetExpandedFloat(N->getOperand(0), Lo, Tmp);
1323 Hi = DAG.getNode(ISD::FABS, dl, Tmp.getValueType(), Tmp);
1324 // Lo = Hi==fabs(Hi) ? Lo : -Lo;
1325 Lo = DAG.getSelectCC(dl, Tmp, Hi, Lo,
1326 DAG.getNode(ISD::FNEG, dl, Lo.getValueType(), Lo),
1327 ISD::SETEQ);
1328 }
1329
1330 void DAGTypeLegalizer::ExpandFloatRes_FMINNUM(SDNode *N, SDValue &Lo,
1331 SDValue &Hi) {
1332 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1333 RTLIB::FMIN_F32, RTLIB::FMIN_F64,
1334 RTLIB::FMIN_F80, RTLIB::FMIN_F128,
1335 RTLIB::FMIN_PPCF128),
1336 N, false);
1337 GetPairElements(Call, Lo, Hi);
1338 }
1339
1340 void DAGTypeLegalizer::ExpandFloatRes_FMAXNUM(SDNode *N, SDValue &Lo,
1341 SDValue &Hi) {
1342 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1343 RTLIB::FMAX_F32, RTLIB::FMAX_F64,
1344 RTLIB::FMAX_F80, RTLIB::FMAX_F128,
1345 RTLIB::FMAX_PPCF128),
1346 N, false);
1347 GetPairElements(Call, Lo, Hi);
1348 }
1349
1350 void DAGTypeLegalizer::ExpandFloatRes_FADD(SDNode *N, SDValue &Lo,
1351 SDValue &Hi) {
1352 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1353 RTLIB::ADD_F32, RTLIB::ADD_F64,
1354 RTLIB::ADD_F80, RTLIB::ADD_F128,
1355 RTLIB::ADD_PPCF128),
1356 N, false);
1357 GetPairElements(Call, Lo, Hi);
1358 }
1359
1360 void DAGTypeLegalizer::ExpandFloatRes_FCEIL(SDNode *N,
1361 SDValue &Lo, SDValue &Hi) {
1362 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1363 RTLIB::CEIL_F32, RTLIB::CEIL_F64,
1364 RTLIB::CEIL_F80, RTLIB::CEIL_F128,
1365 RTLIB::CEIL_PPCF128),
1366 N, false);
1367 GetPairElements(Call, Lo, Hi);
1368 }
1369
1370 void DAGTypeLegalizer::ExpandFloatRes_FCOPYSIGN(SDNode *N,
1371 SDValue &Lo, SDValue &Hi) {
1372 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1373 RTLIB::COPYSIGN_F32,
1374 RTLIB::COPYSIGN_F64,
1375 RTLIB::COPYSIGN_F80,
1376 RTLIB::COPYSIGN_F128,
1377 RTLIB::COPYSIGN_PPCF128),
1378 N, false);
1379 GetPairElements(Call, Lo, Hi);
1380 }
1381
1382 void DAGTypeLegalizer::ExpandFloatRes_FCOS(SDNode *N,
1383 SDValue &Lo, SDValue &Hi) {
1384 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1385 RTLIB::COS_F32, RTLIB::COS_F64,
1386 RTLIB::COS_F80, RTLIB::COS_F128,
1387 RTLIB::COS_PPCF128),
1388 N, false);
1389 GetPairElements(Call, Lo, Hi);
1390 }
1391
1392 void DAGTypeLegalizer::ExpandFloatRes_FDIV(SDNode *N, SDValue &Lo,
1393 SDValue &Hi) {
1394 SDValue Ops[2] = { N->getOperand(0), N->getOperand(1) };
1395 TargetLowering::MakeLibCallOptions CallOptions;
1396 SDValue Call = TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
1397 RTLIB::DIV_F32,
1398 RTLIB::DIV_F64,
1399 RTLIB::DIV_F80,
1400 RTLIB::DIV_F128,
1401 RTLIB::DIV_PPCF128),
1402 N->getValueType(0), Ops, CallOptions,
1403 SDLoc(N)).first;
1404 GetPairElements(Call, Lo, Hi);
1405 }
1406
1407 void DAGTypeLegalizer::ExpandFloatRes_FEXP(SDNode *N,
1408 SDValue &Lo, SDValue &Hi) {
1409 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1410 RTLIB::EXP_F32, RTLIB::EXP_F64,
1411 RTLIB::EXP_F80, RTLIB::EXP_F128,
1412 RTLIB::EXP_PPCF128),
1413 N, false);
1414 GetPairElements(Call, Lo, Hi);
1415 }
1416
1417 void DAGTypeLegalizer::ExpandFloatRes_FEXP2(SDNode *N,
1418 SDValue &Lo, SDValue &Hi) {
1419 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1420 RTLIB::EXP2_F32, RTLIB::EXP2_F64,
1421 RTLIB::EXP2_F80, RTLIB::EXP2_F128,
1422 RTLIB::EXP2_PPCF128),
1423 N, false);
1424 GetPairElements(Call, Lo, Hi);
1425 }
1426
1427 void DAGTypeLegalizer::ExpandFloatRes_FFLOOR(SDNode *N,
1428 SDValue &Lo, SDValue &Hi) {
1429 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1430 RTLIB::FLOOR_F32, RTLIB::FLOOR_F64,
1431 RTLIB::FLOOR_F80, RTLIB::FLOOR_F128,
1432 RTLIB::FLOOR_PPCF128),
1433 N, false);
1434 GetPairElements(Call, Lo, Hi);
1435 }
1436
1437 void DAGTypeLegalizer::ExpandFloatRes_FLOG(SDNode *N,
1438 SDValue &Lo, SDValue &Hi) {
1439 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1440 RTLIB::LOG_F32, RTLIB::LOG_F64,
1441 RTLIB::LOG_F80, RTLIB::LOG_F128,
1442 RTLIB::LOG_PPCF128),
1443 N, false);
1444 GetPairElements(Call, Lo, Hi);
1445 }
1446
1447 void DAGTypeLegalizer::ExpandFloatRes_FLOG2(SDNode *N,
1448 SDValue &Lo, SDValue &Hi) {
1449 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1450 RTLIB::LOG2_F32, RTLIB::LOG2_F64,
1451 RTLIB::LOG2_F80, RTLIB::LOG2_F128,
1452 RTLIB::LOG2_PPCF128),
1453 N, false);
1454 GetPairElements(Call, Lo, Hi);
1455 }
1456
1457 void DAGTypeLegalizer::ExpandFloatRes_FLOG10(SDNode *N,
1458 SDValue &Lo, SDValue &Hi) {
1459 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1460 RTLIB::LOG10_F32, RTLIB::LOG10_F64,
1461 RTLIB::LOG10_F80, RTLIB::LOG10_F128,
1462 RTLIB::LOG10_PPCF128),
1463 N, false);
1464 GetPairElements(Call, Lo, Hi);
1465 }
1466
1467 void DAGTypeLegalizer::ExpandFloatRes_FMA(SDNode *N, SDValue &Lo,
1468 SDValue &Hi) {
1469 SDValue Ops[3] = { N->getOperand(0), N->getOperand(1), N->getOperand(2) };
1470 TargetLowering::MakeLibCallOptions CallOptions;
1471 SDValue Call = TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
1472 RTLIB::FMA_F32,
1473 RTLIB::FMA_F64,
1474 RTLIB::FMA_F80,
1475 RTLIB::FMA_F128,
1476 RTLIB::FMA_PPCF128),
1477 N->getValueType(0), Ops, CallOptions,
1478 SDLoc(N)).first;
1479 GetPairElements(Call, Lo, Hi);
1480 }
1481
1482 void DAGTypeLegalizer::ExpandFloatRes_FMUL(SDNode *N, SDValue &Lo,
1483 SDValue &Hi) {
1484 SDValue Ops[2] = { N->getOperand(0), N->getOperand(1) };
1485 TargetLowering::MakeLibCallOptions CallOptions;
1486 SDValue Call = TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
1487 RTLIB::MUL_F32,
1488 RTLIB::MUL_F64,
1489 RTLIB::MUL_F80,
1490 RTLIB::MUL_F128,
1491 RTLIB::MUL_PPCF128),
1492 N->getValueType(0), Ops, CallOptions,
1493 SDLoc(N)).first;
1494 GetPairElements(Call, Lo, Hi);
1495 }
1496
1497 void DAGTypeLegalizer::ExpandFloatRes_FNEARBYINT(SDNode *N,
1498 SDValue &Lo, SDValue &Hi) {
1499 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1500 RTLIB::NEARBYINT_F32,
1501 RTLIB::NEARBYINT_F64,
1502 RTLIB::NEARBYINT_F80,
1503 RTLIB::NEARBYINT_F128,
1504 RTLIB::NEARBYINT_PPCF128),
1505 N, false);
1506 GetPairElements(Call, Lo, Hi);
1507 }
1508
1509 void DAGTypeLegalizer::ExpandFloatRes_FNEG(SDNode *N, SDValue &Lo,
1510 SDValue &Hi) {
1511 SDLoc dl(N);
1512 GetExpandedFloat(N->getOperand(0), Lo, Hi);
1513 Lo = DAG.getNode(ISD::FNEG, dl, Lo.getValueType(), Lo);
1514 Hi = DAG.getNode(ISD::FNEG, dl, Hi.getValueType(), Hi);
1515 }
1516
1517 void DAGTypeLegalizer::ExpandFloatRes_FP_EXTEND(SDNode *N, SDValue &Lo,
1518 SDValue &Hi) {
1519 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1520 SDLoc dl(N);
1521 Hi = DAG.getNode(ISD::FP_EXTEND, dl, NVT, N->getOperand(0));
1522 Lo = DAG.getConstantFP(APFloat(DAG.EVTToAPFloatSemantics(NVT),
1523 APInt(NVT.getSizeInBits(), 0)), dl, NVT);
1524 }
1525
1526 void DAGTypeLegalizer::ExpandFloatRes_FPOW(SDNode *N,
1527 SDValue &Lo, SDValue &Hi) {
1528 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1529 RTLIB::POW_F32, RTLIB::POW_F64,
1530 RTLIB::POW_F80, RTLIB::POW_F128,
1531 RTLIB::POW_PPCF128),
1532 N, false);
1533 GetPairElements(Call, Lo, Hi);
1534 }
1535
1536 void DAGTypeLegalizer::ExpandFloatRes_FPOWI(SDNode *N,
1537 SDValue &Lo, SDValue &Hi) {
1538 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1539 RTLIB::POWI_F32, RTLIB::POWI_F64,
1540 RTLIB::POWI_F80, RTLIB::POWI_F128,
1541 RTLIB::POWI_PPCF128),
1542 N, false);
1543 GetPairElements(Call, Lo, Hi);
1544 }
1545
1546 void DAGTypeLegalizer::ExpandFloatRes_FREM(SDNode *N,
1547 SDValue &Lo, SDValue &Hi) {
1548 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1549 RTLIB::REM_F32, RTLIB::REM_F64,
1550 RTLIB::REM_F80, RTLIB::REM_F128,
1551 RTLIB::REM_PPCF128),
1552 N, false);
1553 GetPairElements(Call, Lo, Hi);
1554 }
1555
1556 void DAGTypeLegalizer::ExpandFloatRes_FRINT(SDNode *N,
1557 SDValue &Lo, SDValue &Hi) {
1558 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1559 RTLIB::RINT_F32, RTLIB::RINT_F64,
1560 RTLIB::RINT_F80, RTLIB::RINT_F128,
1561 RTLIB::RINT_PPCF128),
1562 N, false);
1563 GetPairElements(Call, Lo, Hi);
1564 }
1565
1566 void DAGTypeLegalizer::ExpandFloatRes_FROUND(SDNode *N,
1567 SDValue &Lo, SDValue &Hi) {
1568 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1569 RTLIB::ROUND_F32,
1570 RTLIB::ROUND_F64,
1571 RTLIB::ROUND_F80,
1572 RTLIB::ROUND_F128,
1573 RTLIB::ROUND_PPCF128),
1574 N, false);
1575 GetPairElements(Call, Lo, Hi);
1576 }
1577
1578 void DAGTypeLegalizer::ExpandFloatRes_FSIN(SDNode *N,
1579 SDValue &Lo, SDValue &Hi) {
1580 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1581 RTLIB::SIN_F32, RTLIB::SIN_F64,
1582 RTLIB::SIN_F80, RTLIB::SIN_F128,
1583 RTLIB::SIN_PPCF128),
1584 N, false);
1585 GetPairElements(Call, Lo, Hi);
1586 }
1587
1588 void DAGTypeLegalizer::ExpandFloatRes_FSQRT(SDNode *N,
1589 SDValue &Lo, SDValue &Hi) {
1590 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1591 RTLIB::SQRT_F32, RTLIB::SQRT_F64,
1592 RTLIB::SQRT_F80, RTLIB::SQRT_F128,
1593 RTLIB::SQRT_PPCF128),
1594 N, false);
1595 GetPairElements(Call, Lo, Hi);
1596 }
1597
1598 void DAGTypeLegalizer::ExpandFloatRes_FSUB(SDNode *N, SDValue &Lo,
1599 SDValue &Hi) {
1600 SDValue Ops[2] = { N->getOperand(0), N->getOperand(1) };
1601 TargetLowering::MakeLibCallOptions CallOptions;
1602 SDValue Call = TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
1603 RTLIB::SUB_F32,
1604 RTLIB::SUB_F64,
1605 RTLIB::SUB_F80,
1606 RTLIB::SUB_F128,
1607 RTLIB::SUB_PPCF128),
1608 N->getValueType(0), Ops, CallOptions,
1609 SDLoc(N)).first;
1610 GetPairElements(Call, Lo, Hi);
1611 }
1612
1613 void DAGTypeLegalizer::ExpandFloatRes_FTRUNC(SDNode *N,
1614 SDValue &Lo, SDValue &Hi) {
1615 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1616 RTLIB::TRUNC_F32, RTLIB::TRUNC_F64,
1617 RTLIB::TRUNC_F80, RTLIB::TRUNC_F128,
1618 RTLIB::TRUNC_PPCF128),
1619 N, false);
1620 GetPairElements(Call, Lo, Hi);
1621 }
1622
1623 void DAGTypeLegalizer::ExpandFloatRes_LOAD(SDNode *N, SDValue &Lo,
1624 SDValue &Hi) {
1625 if (ISD::isNormalLoad(N)) {
1626 ExpandRes_NormalLoad(N, Lo, Hi);
1627 return;
1628 }
1629
1630 assert(ISD::isUNINDEXEDLoad(N) && "Indexed load during type legalization!");
1631 LoadSDNode *LD = cast<LoadSDNode>(N);
1632 SDValue Chain = LD->getChain();
1633 SDValue Ptr = LD->getBasePtr();
1634 SDLoc dl(N);
1635
1636 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), LD->getValueType(0));
1637 assert(NVT.isByteSized() && "Expanded type not byte sized!");
1638 assert(LD->getMemoryVT().bitsLE(NVT) && "Float type not round?");
1639
1640 Hi = DAG.getExtLoad(LD->getExtensionType(), dl, NVT, Chain, Ptr,
1641 LD->getMemoryVT(), LD->getMemOperand());
1642
1643 // Remember the chain.
1644 Chain = Hi.getValue(1);
1645
1646 // The low part is zero.
1647 Lo = DAG.getConstantFP(APFloat(DAG.EVTToAPFloatSemantics(NVT),
1648 APInt(NVT.getSizeInBits(), 0)), dl, NVT);
1649
1650 // Modified the chain - switch anything that used the old chain to use the
1651 // new one.
1652 ReplaceValueWith(SDValue(LD, 1), Chain);
1653 }
1654
1655 void DAGTypeLegalizer::ExpandFloatRes_XINT_TO_FP(SDNode *N, SDValue &Lo,
1656 SDValue &Hi) {
1657 assert(N->getValueType(0) == MVT::ppcf128 && "Unsupported XINT_TO_FP!");
1658 EVT VT = N->getValueType(0);
1659 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
1660 SDValue Src = N->getOperand(0);
1661 EVT SrcVT = Src.getValueType();
1662 bool isSigned = N->getOpcode() == ISD::SINT_TO_FP;
1663 SDLoc dl(N);
1664
1665 // First do an SINT_TO_FP, whether the original was signed or unsigned.
1666 // When promoting partial word types to i32 we must honor the signedness,
1667 // though.
1668 if (SrcVT.bitsLE(MVT::i32)) {
1669 // The integer can be represented exactly in an f64.
1670 Src = DAG.getNode(isSigned ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND, dl,
1671 MVT::i32, Src);
1672 Lo = DAG.getConstantFP(APFloat(DAG.EVTToAPFloatSemantics(NVT),
1673 APInt(NVT.getSizeInBits(), 0)), dl, NVT);
1674 Hi = DAG.getNode(ISD::SINT_TO_FP, dl, NVT, Src);
1675 } else {
1676 RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
1677 if (SrcVT.bitsLE(MVT::i64)) {
1678 Src = DAG.getNode(isSigned ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND, dl,
1679 MVT::i64, Src);
1680 LC = RTLIB::SINTTOFP_I64_PPCF128;
1681 } else if (SrcVT.bitsLE(MVT::i128)) {
1682 Src = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::i128, Src);
1683 LC = RTLIB::SINTTOFP_I128_PPCF128;
1684 }
1685 assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported XINT_TO_FP!");
1686
1687 TargetLowering::MakeLibCallOptions CallOptions;
1688 CallOptions.setSExt(true);
1689 Hi = TLI.makeLibCall(DAG, LC, VT, Src, CallOptions, dl).first;
1690 GetPairElements(Hi, Lo, Hi);
1691 }
1692
1693 if (isSigned)
1694 return;
1695
1696 // Unsigned - fix up the SINT_TO_FP value just calculated.
1697 Hi = DAG.getNode(ISD::BUILD_PAIR, dl, VT, Lo, Hi);
1698 SrcVT = Src.getValueType();
1699
1700 // x>=0 ? (ppcf128)(iN)x : (ppcf128)(iN)x + 2^N; N=32,64,128.
1701 static const uint64_t TwoE32[] = { 0x41f0000000000000LL, 0 };
1702 static const uint64_t TwoE64[] = { 0x43f0000000000000LL, 0 };
1703 static const uint64_t TwoE128[] = { 0x47f0000000000000LL, 0 };
1704 ArrayRef<uint64_t> Parts;
1705
1706 switch (SrcVT.getSimpleVT().SimpleTy) {
1707 default:
1708 llvm_unreachable("Unsupported UINT_TO_FP!");
1709 case MVT::i32:
1710 Parts = TwoE32;
1711 break;
1712 case MVT::i64:
1713 Parts = TwoE64;
1714 break;
1715 case MVT::i128:
1716 Parts = TwoE128;
1717 break;
1718 }
1719
1720 // TODO: Are there fast-math-flags to propagate to this FADD?
1721 Lo = DAG.getNode(ISD::FADD, dl, VT, Hi,
1722 DAG.getConstantFP(APFloat(APFloat::PPCDoubleDouble(),
1723 APInt(128, Parts)),
1724 dl, MVT::ppcf128));
1725 Lo = DAG.getSelectCC(dl, Src, DAG.getConstant(0, dl, SrcVT),
1726 Lo, Hi, ISD::SETLT);
1727 GetPairElements(Lo, Lo, Hi);
1728 }
1729
1730
1731 //===----------------------------------------------------------------------===//
1732 // Float Operand Expansion
1733 //===----------------------------------------------------------------------===//
1734
1735 /// ExpandFloatOperand - This method is called when the specified operand of the
1736 /// specified node is found to need expansion. At this point, all of the result
1737 /// types of the node are known to be legal, but other operands of the node may
1738 /// need promotion or expansion as well as the specified one.
1739 bool DAGTypeLegalizer::ExpandFloatOperand(SDNode *N, unsigned OpNo) {
1740 LLVM_DEBUG(dbgs() << "Expand float operand: "; N->dump(&DAG); dbgs() << "\n");
1741 SDValue Res = SDValue();
1742
1743 // See if the target wants to custom expand this node.
1744 if (CustomLowerNode(N, N->getOperand(OpNo).getValueType(), false))
1745 return false;
1746
1747 switch (N->getOpcode()) {
1748 default:
1749 #ifndef NDEBUG
1750 dbgs() << "ExpandFloatOperand Op #" << OpNo << ": ";
1751 N->dump(&DAG); dbgs() << "\n";
1752 #endif
1753 llvm_unreachable("Do not know how to expand this operator's operand!");
1754
1755 case ISD::BITCAST: Res = ExpandOp_BITCAST(N); break;
1756 case ISD::BUILD_VECTOR: Res = ExpandOp_BUILD_VECTOR(N); break;
1757 case ISD::EXTRACT_ELEMENT: Res = ExpandOp_EXTRACT_ELEMENT(N); break;
1758
1759 case ISD::BR_CC: Res = ExpandFloatOp_BR_CC(N); break;
1760 case ISD::FCOPYSIGN: Res = ExpandFloatOp_FCOPYSIGN(N); break;
1761 case ISD::FP_ROUND: Res = ExpandFloatOp_FP_ROUND(N); break;
1762 case ISD::FP_TO_SINT: Res = ExpandFloatOp_FP_TO_SINT(N); break;
1763 case ISD::FP_TO_UINT: Res = ExpandFloatOp_FP_TO_UINT(N); break;
1764 case ISD::LROUND: Res = ExpandFloatOp_LROUND(N); break;
1765 case ISD::LLROUND: Res = ExpandFloatOp_LLROUND(N); break;
1766 case ISD::LRINT: Res = ExpandFloatOp_LRINT(N); break;
1767 case ISD::LLRINT: Res = ExpandFloatOp_LLRINT(N); break;
1768 case ISD::SELECT_CC: Res = ExpandFloatOp_SELECT_CC(N); break;
1769 case ISD::SETCC: Res = ExpandFloatOp_SETCC(N); break;
1770 case ISD::STORE: Res = ExpandFloatOp_STORE(cast<StoreSDNode>(N),
1771 OpNo); break;
1772 }
1773
1774 // If the result is null, the sub-method took care of registering results etc.
1775 if (!Res.getNode()) return false;
1776
1777 // If the result is N, the sub-method updated N in place. Tell the legalizer
1778 // core about this.
1779 if (Res.getNode() == N)
1780 return true;
1781
1782 assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 &&
1783 "Invalid operand expansion");
1784
1785 ReplaceValueWith(SDValue(N, 0), Res);
1786 return false;
1787 }
1788
1789 /// FloatExpandSetCCOperands - Expand the operands of a comparison. This code
1790 /// is shared among BR_CC, SELECT_CC, and SETCC handlers.
1791 void DAGTypeLegalizer::FloatExpandSetCCOperands(SDValue &NewLHS,
1792 SDValue &NewRHS,
1793 ISD::CondCode &CCCode,
1794 const SDLoc &dl) {
1795 SDValue LHSLo, LHSHi, RHSLo, RHSHi;
1796 GetExpandedFloat(NewLHS, LHSLo, LHSHi);
1797 GetExpandedFloat(NewRHS, RHSLo, RHSHi);
1798
1799 assert(NewLHS.getValueType() == MVT::ppcf128 && "Unsupported setcc type!");
1800
1801 // FIXME: This generated code sucks. We want to generate
1802 // FCMPU crN, hi1, hi2
1803 // BNE crN, L:
1804 // FCMPU crN, lo1, lo2
1805 // The following can be improved, but not that much.
1806 SDValue Tmp1, Tmp2, Tmp3;
1807 Tmp1 = DAG.getSetCC(dl, getSetCCResultType(LHSHi.getValueType()),
1808 LHSHi, RHSHi, ISD::SETOEQ);
1809 Tmp2 = DAG.getSetCC(dl, getSetCCResultType(LHSLo.getValueType()),
1810 LHSLo, RHSLo, CCCode);
1811 Tmp3 = DAG.getNode(ISD::AND, dl, Tmp1.getValueType(), Tmp1, Tmp2);
1812 Tmp1 = DAG.getSetCC(dl, getSetCCResultType(LHSHi.getValueType()),
1813 LHSHi, RHSHi, ISD::SETUNE);
1814 Tmp2 = DAG.getSetCC(dl, getSetCCResultType(LHSHi.getValueType()),
1815 LHSHi, RHSHi, CCCode);
1816 Tmp1 = DAG.getNode(ISD::AND, dl, Tmp1.getValueType(), Tmp1, Tmp2);
1817 NewLHS = DAG.getNode(ISD::OR, dl, Tmp1.getValueType(), Tmp1, Tmp3);
1818 NewRHS = SDValue(); // LHS is the result, not a compare.
1819 }
1820
1821 SDValue DAGTypeLegalizer::ExpandFloatOp_BR_CC(SDNode *N) {
1822 SDValue NewLHS = N->getOperand(2), NewRHS = N->getOperand(3);
1823 ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(1))->get();
1824 FloatExpandSetCCOperands(NewLHS, NewRHS, CCCode, SDLoc(N));
1825
1826 // If ExpandSetCCOperands returned a scalar, we need to compare the result
1827 // against zero to select between true and false values.
1828 if (!NewRHS.getNode()) {
1829 NewRHS = DAG.getConstant(0, SDLoc(N), NewLHS.getValueType());
1830 CCCode = ISD::SETNE;
1831 }
1832
1833 // Update N to have the operands specified.
1834 return SDValue(DAG.UpdateNodeOperands(N, N->getOperand(0),
1835 DAG.getCondCode(CCCode), NewLHS, NewRHS,
1836 N->getOperand(4)), 0);
1837 }
1838
1839 SDValue DAGTypeLegalizer::ExpandFloatOp_FCOPYSIGN(SDNode *N) {
1840 assert(N->getOperand(1).getValueType() == MVT::ppcf128 &&
1841 "Logic only correct for ppcf128!");
1842 SDValue Lo, Hi;
1843 GetExpandedFloat(N->getOperand(1), Lo, Hi);
1844 // The ppcf128 value is providing only the sign; take it from the
1845 // higher-order double (which must have the larger magnitude).
1846 return DAG.getNode(ISD::FCOPYSIGN, SDLoc(N),
1847 N->getValueType(0), N->getOperand(0), Hi);
1848 }
1849
1850 SDValue DAGTypeLegalizer::ExpandFloatOp_FP_ROUND(SDNode *N) {
1851 assert(N->getOperand(0).getValueType() == MVT::ppcf128 &&
1852 "Logic only correct for ppcf128!");
1853 SDValue Lo, Hi;
1854 GetExpandedFloat(N->getOperand(0), Lo, Hi);
1855 // Round it the rest of the way (e.g. to f32) if needed.
1856 return DAG.getNode(ISD::FP_ROUND, SDLoc(N),
1857 N->getValueType(0), Hi, N->getOperand(1));
1858 }
1859
1860 SDValue DAGTypeLegalizer::ExpandFloatOp_FP_TO_SINT(SDNode *N) {
1861 EVT RVT = N->getValueType(0);
1862 SDLoc dl(N);
1863
1864 RTLIB::Libcall LC = RTLIB::getFPTOSINT(N->getOperand(0).getValueType(), RVT);
1865 assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_TO_SINT!");
1866 TargetLowering::MakeLibCallOptions CallOptions;
1867 return TLI.makeLibCall(DAG, LC, RVT, N->getOperand(0), CallOptions, dl).first;
1868 }
1869
1870 SDValue DAGTypeLegalizer::ExpandFloatOp_FP_TO_UINT(SDNode *N) {
1871 EVT RVT = N->getValueType(0);
1872 SDLoc dl(N);
1873
1874 RTLIB::Libcall LC = RTLIB::getFPTOUINT(N->getOperand(0).getValueType(), RVT);
1875 assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_TO_UINT!");
1876 TargetLowering::MakeLibCallOptions CallOptions;
1877 return TLI.makeLibCall(DAG, LC, N->getValueType(0), N->getOperand(0),
1878 CallOptions, dl).first;
1879 }
1880
1881 SDValue DAGTypeLegalizer::ExpandFloatOp_SELECT_CC(SDNode *N) {
1882 SDValue NewLHS = N->getOperand(0), NewRHS = N->getOperand(1);
1883 ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(4))->get();
1884 FloatExpandSetCCOperands(NewLHS, NewRHS, CCCode, SDLoc(N));
1885
1886 // If ExpandSetCCOperands returned a scalar, we need to compare the result
1887 // against zero to select between true and false values.
1888 if (!NewRHS.getNode()) {
1889 NewRHS = DAG.getConstant(0, SDLoc(N), NewLHS.getValueType());
1890 CCCode = ISD::SETNE;
1891 }
1892
1893 // Update N to have the operands specified.
1894 return SDValue(DAG.UpdateNodeOperands(N, NewLHS, NewRHS,
1895 N->getOperand(2), N->getOperand(3),
1896 DAG.getCondCode(CCCode)), 0);
1897 }
1898
1899 SDValue DAGTypeLegalizer::ExpandFloatOp_SETCC(SDNode *N) {
1900 SDValue NewLHS = N->getOperand(0), NewRHS = N->getOperand(1);
1901 ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(2))->get();
1902 FloatExpandSetCCOperands(NewLHS, NewRHS, CCCode, SDLoc(N));
1903
1904 // If ExpandSetCCOperands returned a scalar, use it.
1905 if (!NewRHS.getNode()) {
1906 assert(NewLHS.getValueType() == N->getValueType(0) &&
1907 "Unexpected setcc expansion!");
1908 return NewLHS;
1909 }
1910
1911 // Otherwise, update N to have the operands specified.
1912 return SDValue(DAG.UpdateNodeOperands(N, NewLHS, NewRHS,
1913 DAG.getCondCode(CCCode)), 0);
1914 }
1915
1916 SDValue DAGTypeLegalizer::ExpandFloatOp_STORE(SDNode *N, unsigned OpNo) {
1917 if (ISD::isNormalStore(N))
1918 return ExpandOp_NormalStore(N, OpNo);
1919
1920 assert(ISD::isUNINDEXEDStore(N) && "Indexed store during type legalization!");
1921 assert(OpNo == 1 && "Can only expand the stored value so far");
1922 StoreSDNode *ST = cast<StoreSDNode>(N);
1923
1924 SDValue Chain = ST->getChain();
1925 SDValue Ptr = ST->getBasePtr();
1926
1927 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(),
1928 ST->getValue().getValueType());
1929 assert(NVT.isByteSized() && "Expanded type not byte sized!");
1930 assert(ST->getMemoryVT().bitsLE(NVT) && "Float type not round?");
1931 (void)NVT;
1932
1933 SDValue Lo, Hi;
1934 GetExpandedOp(ST->getValue(), Lo, Hi);
1935
1936 return DAG.getTruncStore(Chain, SDLoc(N), Hi, Ptr,
1937 ST->getMemoryVT(), ST->getMemOperand());
1938 }
1939
1940 SDValue DAGTypeLegalizer::ExpandFloatOp_LROUND(SDNode *N) {
1941 EVT RVT = N->getValueType(0);
1942 EVT RetVT = N->getOperand(0).getValueType().getSimpleVT().SimpleTy;
1943 TargetLowering::MakeLibCallOptions CallOptions;
1944 return TLI.makeLibCall(DAG, GetFPLibCall(RetVT,
1945 RTLIB::LROUND_F32,
1946 RTLIB::LROUND_F64,
1947 RTLIB::LROUND_F80,
1948 RTLIB::LROUND_F128,
1949 RTLIB::LROUND_PPCF128),
1950 RVT, N->getOperand(0), CallOptions, SDLoc(N)).first;
1951 }
1952
1953 SDValue DAGTypeLegalizer::ExpandFloatOp_LLROUND(SDNode *N) {
1954 EVT RVT = N->getValueType(0);
1955 EVT RetVT = N->getOperand(0).getValueType().getSimpleVT().SimpleTy;
1956 TargetLowering::MakeLibCallOptions CallOptions;
1957 return TLI.makeLibCall(DAG, GetFPLibCall(RetVT,
1958 RTLIB::LLROUND_F32,
1959 RTLIB::LLROUND_F64,
1960 RTLIB::LLROUND_F80,
1961 RTLIB::LLROUND_F128,
1962 RTLIB::LLROUND_PPCF128),
1963 RVT, N->getOperand(0), CallOptions, SDLoc(N)).first;
1964 }
1965
1966 SDValue DAGTypeLegalizer::ExpandFloatOp_LRINT(SDNode *N) {
1967 EVT RVT = N->getValueType(0);
1968 EVT RetVT = N->getOperand(0).getValueType().getSimpleVT().SimpleTy;
1969 TargetLowering::MakeLibCallOptions CallOptions;
1970 return TLI.makeLibCall(DAG, GetFPLibCall(RetVT,
1971 RTLIB::LRINT_F32,
1972 RTLIB::LRINT_F64,
1973 RTLIB::LRINT_F80,
1974 RTLIB::LRINT_F128,
1975 RTLIB::LRINT_PPCF128),
1976 RVT, N->getOperand(0), CallOptions, SDLoc(N)).first;
1977 }
1978
1979 SDValue DAGTypeLegalizer::ExpandFloatOp_LLRINT(SDNode *N) {
1980 EVT RVT = N->getValueType(0);
1981 EVT RetVT = N->getOperand(0).getValueType().getSimpleVT().SimpleTy;
1982 TargetLowering::MakeLibCallOptions CallOptions;
1983 return TLI.makeLibCall(DAG, GetFPLibCall(RetVT,
1984 RTLIB::LLRINT_F32,
1985 RTLIB::LLRINT_F64,
1986 RTLIB::LLRINT_F80,
1987 RTLIB::LLRINT_F128,
1988 RTLIB::LLRINT_PPCF128),
1989 RVT, N->getOperand(0), CallOptions, SDLoc(N)).first;
1990 }
1991
1992 //===----------------------------------------------------------------------===//
1993 // Float Operand Promotion
1994 //===----------------------------------------------------------------------===//
1995 //
1996
1997 static ISD::NodeType GetPromotionOpcode(EVT OpVT, EVT RetVT) {
1998 if (OpVT == MVT::f16) {
1999 return ISD::FP16_TO_FP;
2000 } else if (RetVT == MVT::f16) {
2001 return ISD::FP_TO_FP16;
2002 }
2003
2004 report_fatal_error("Attempt at an invalid promotion-related conversion");
2005 }
2006
2007 bool DAGTypeLegalizer::PromoteFloatOperand(SDNode *N, unsigned OpNo) {
2008 LLVM_DEBUG(dbgs() << "Promote float operand " << OpNo << ": "; N->dump(&DAG);
2009 dbgs() << "\n");
2010 SDValue R = SDValue();
2011
2012 if (CustomLowerNode(N, N->getOperand(OpNo).getValueType(), false)) {
2013 LLVM_DEBUG(dbgs() << "Node has been custom lowered, done\n");
2014 return false;
2015 }
2016
2017 // Nodes that use a promotion-requiring floating point operand, but doesn't
2018 // produce a promotion-requiring floating point result, need to be legalized
2019 // to use the promoted float operand. Nodes that produce at least one
2020 // promotion-requiring floating point result have their operands legalized as
2021 // a part of PromoteFloatResult.
2022 switch (N->getOpcode()) {
2023 default:
2024 #ifndef NDEBUG
2025 dbgs() << "PromoteFloatOperand Op #" << OpNo << ": ";
2026 N->dump(&DAG); dbgs() << "\n";
2027 #endif
2028 llvm_unreachable("Do not know how to promote this operator's operand!");
2029
2030 case ISD::BITCAST: R = PromoteFloatOp_BITCAST(N, OpNo); break;
2031 case ISD::FCOPYSIGN: R = PromoteFloatOp_FCOPYSIGN(N, OpNo); break;
2032 case ISD::FP_TO_SINT:
2033 case ISD::FP_TO_UINT: R = PromoteFloatOp_FP_TO_XINT(N, OpNo); break;
2034 case ISD::FP_EXTEND: R = PromoteFloatOp_FP_EXTEND(N, OpNo); break;
2035 case ISD::SELECT_CC: R = PromoteFloatOp_SELECT_CC(N, OpNo); break;
2036 case ISD::SETCC: R = PromoteFloatOp_SETCC(N, OpNo); break;
2037 case ISD::STORE: R = PromoteFloatOp_STORE(N, OpNo); break;
2038 }
2039
2040 if (R.getNode())
2041 ReplaceValueWith(SDValue(N, 0), R);
2042 return false;
2043 }
2044
2045 SDValue DAGTypeLegalizer::PromoteFloatOp_BITCAST(SDNode *N, unsigned OpNo) {
2046 SDValue Op = N->getOperand(0);
2047 EVT OpVT = Op->getValueType(0);
2048
2049 SDValue Promoted = GetPromotedFloat(N->getOperand(0));
2050 EVT PromotedVT = Promoted->getValueType(0);
2051
2052 // Convert the promoted float value to the desired IVT.
2053 EVT IVT = EVT::getIntegerVT(*DAG.getContext(), OpVT.getSizeInBits());
2054 SDValue Convert = DAG.getNode(GetPromotionOpcode(PromotedVT, OpVT), SDLoc(N),
2055 IVT, Promoted);
2056 // The final result type might not be an scalar so we need a bitcast. The
2057 // bitcast will be further legalized if needed.
2058 return DAG.getBitcast(N->getValueType(0), Convert);
2059 }
2060
2061 // Promote Operand 1 of FCOPYSIGN. Operand 0 ought to be handled by
2062 // PromoteFloatRes_FCOPYSIGN.
2063 SDValue DAGTypeLegalizer::PromoteFloatOp_FCOPYSIGN(SDNode *N, unsigned OpNo) {
2064 assert (OpNo == 1 && "Only Operand 1 must need promotion here");
2065 SDValue Op1 = GetPromotedFloat(N->getOperand(1));
2066
2067 return DAG.getNode(N->getOpcode(), SDLoc(N), N->getValueType(0),
2068 N->getOperand(0), Op1);
2069 }
2070
2071 // Convert the promoted float value to the desired integer type
2072 SDValue DAGTypeLegalizer::PromoteFloatOp_FP_TO_XINT(SDNode *N, unsigned OpNo) {
2073 SDValue Op = GetPromotedFloat(N->getOperand(0));
2074 return DAG.getNode(N->getOpcode(), SDLoc(N), N->getValueType(0), Op);
2075 }
2076
2077 SDValue DAGTypeLegalizer::PromoteFloatOp_FP_EXTEND(SDNode *N, unsigned OpNo) {
2078 SDValue Op = GetPromotedFloat(N->getOperand(0));
2079 EVT VT = N->getValueType(0);
2080
2081 // Desired VT is same as promoted type. Use promoted float directly.
2082 if (VT == Op->getValueType(0))
2083 return Op;
2084
2085 // Else, extend the promoted float value to the desired VT.
2086 return DAG.getNode(ISD::FP_EXTEND, SDLoc(N), VT, Op);
2087 }
2088
2089 // Promote the float operands used for comparison. The true- and false-
2090 // operands have the same type as the result and are promoted, if needed, by
2091 // PromoteFloatRes_SELECT_CC
2092 SDValue DAGTypeLegalizer::PromoteFloatOp_SELECT_CC(SDNode *N, unsigned OpNo) {
2093 SDValue LHS = GetPromotedFloat(N->getOperand(0));
2094 SDValue RHS = GetPromotedFloat(N->getOperand(1));
2095
2096 return DAG.getNode(ISD::SELECT_CC, SDLoc(N), N->getValueType(0),
2097 LHS, RHS, N->getOperand(2), N->getOperand(3),
2098 N->getOperand(4));
2099 }
2100
2101 // Construct a SETCC that compares the promoted values and sets the conditional
2102 // code.
2103 SDValue DAGTypeLegalizer::PromoteFloatOp_SETCC(SDNode *N, unsigned OpNo) {
2104 EVT VT = N->getValueType(0);
2105 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
2106 SDValue Op0 = GetPromotedFloat(N->getOperand(0));
2107 SDValue Op1 = GetPromotedFloat(N->getOperand(1));
2108 ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(2))->get();
2109
2110 return DAG.getSetCC(SDLoc(N), NVT, Op0, Op1, CCCode);
2111
2112 }
2113
2114 // Lower the promoted Float down to the integer value of same size and construct
2115 // a STORE of the integer value.
2116 SDValue DAGTypeLegalizer::PromoteFloatOp_STORE(SDNode *N, unsigned OpNo) {
2117 StoreSDNode *ST = cast<StoreSDNode>(N);
2118 SDValue Val = ST->getValue();
2119 SDLoc DL(N);
2120
2121 SDValue Promoted = GetPromotedFloat(Val);
2122 EVT VT = ST->getOperand(1).getValueType();
2123 EVT IVT = EVT::getIntegerVT(*DAG.getContext(), VT.getSizeInBits());
2124
2125 SDValue NewVal;
2126 NewVal = DAG.getNode(GetPromotionOpcode(Promoted.getValueType(), VT), DL,
2127 IVT, Promoted);
2128
2129 return DAG.getStore(ST->getChain(), DL, NewVal, ST->getBasePtr(),
2130 ST->getMemOperand());
2131 }
2132
2133 //===----------------------------------------------------------------------===//
2134 // Float Result Promotion
2135 //===----------------------------------------------------------------------===//
2136
2137 void DAGTypeLegalizer::PromoteFloatResult(SDNode *N, unsigned ResNo) {
2138 LLVM_DEBUG(dbgs() << "Promote float result " << ResNo << ": "; N->dump(&DAG);
2139 dbgs() << "\n");
2140 SDValue R = SDValue();
2141
2142 // See if the target wants to custom expand this node.
2143 if (CustomLowerNode(N, N->getValueType(ResNo), true)) {
2144 LLVM_DEBUG(dbgs() << "Node has been custom expanded, done\n");
2145 return;
2146 }
2147
2148 switch (N->getOpcode()) {
2149 // These opcodes cannot appear if promotion of FP16 is done in the backend
2150 // instead of Clang
2151 case ISD::FP16_TO_FP:
2152 case ISD::FP_TO_FP16:
2153 default:
2154 #ifndef NDEBUG
2155 dbgs() << "PromoteFloatResult #" << ResNo << ": ";
2156 N->dump(&DAG); dbgs() << "\n";
2157 #endif
2158 llvm_unreachable("Do not know how to promote this operator's result!");
2159
2160 case ISD::BITCAST: R = PromoteFloatRes_BITCAST(N); break;
2161 case ISD::ConstantFP: R = PromoteFloatRes_ConstantFP(N); break;
2162 case ISD::EXTRACT_VECTOR_ELT:
2163 R = PromoteFloatRes_EXTRACT_VECTOR_ELT(N); break;
2164 case ISD::FCOPYSIGN: R = PromoteFloatRes_FCOPYSIGN(N); break;
2165
2166 // Unary FP Operations
2167 case ISD::FABS:
2168 case ISD::FCEIL:
2169 case ISD::FCOS:
2170 case ISD::FEXP:
2171 case ISD::FEXP2:
2172 case ISD::FFLOOR:
2173 case ISD::FLOG:
2174 case ISD::FLOG2:
2175 case ISD::FLOG10:
2176 case ISD::FNEARBYINT:
2177 case ISD::FNEG:
2178 case ISD::FRINT:
2179 case ISD::FROUND:
2180 case ISD::FSIN:
2181 case ISD::FSQRT:
2182 case ISD::FTRUNC:
2183 case ISD::FCANONICALIZE: R = PromoteFloatRes_UnaryOp(N); break;
2184
2185 // Binary FP Operations
2186 case ISD::FADD:
2187 case ISD::FDIV:
2188 case ISD::FMAXIMUM:
2189 case ISD::FMINIMUM:
2190 case ISD::FMAXNUM:
2191 case ISD::FMINNUM:
2192 case ISD::FMUL:
2193 case ISD::FPOW:
2194 case ISD::FREM:
2195 case ISD::FSUB: R = PromoteFloatRes_BinOp(N); break;
2196
2197 case ISD::FMA: // FMA is same as FMAD
2198 case ISD::FMAD: R = PromoteFloatRes_FMAD(N); break;
2199
2200 case ISD::FPOWI: R = PromoteFloatRes_FPOWI(N); break;
2201
2202 case ISD::FP_ROUND: R = PromoteFloatRes_FP_ROUND(N); break;
2203 case ISD::LOAD: R = PromoteFloatRes_LOAD(N); break;
2204 case ISD::SELECT: R = PromoteFloatRes_SELECT(N); break;
2205 case ISD::SELECT_CC: R = PromoteFloatRes_SELECT_CC(N); break;
2206
2207 case ISD::SINT_TO_FP:
2208 case ISD::UINT_TO_FP: R = PromoteFloatRes_XINT_TO_FP(N); break;
2209 case ISD::UNDEF: R = PromoteFloatRes_UNDEF(N); break;
2210 case ISD::ATOMIC_SWAP: R = BitcastToInt_ATOMIC_SWAP(N); break;
2211 }
2212
2213 if (R.getNode())
2214 SetPromotedFloat(SDValue(N, ResNo), R);
2215 }
2216
2217 // Bitcast from i16 to f16: convert the i16 to a f32 value instead.
2218 // At this point, it is not possible to determine if the bitcast value is
2219 // eventually stored to memory or promoted to f32 or promoted to a floating
2220 // point at a higher precision. Some of these cases are handled by FP_EXTEND,
2221 // STORE promotion handlers.
2222 SDValue DAGTypeLegalizer::PromoteFloatRes_BITCAST(SDNode *N) {
2223 EVT VT = N->getValueType(0);
2224 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
2225 // Input type isn't guaranteed to be a scalar int so bitcast if not. The
2226 // bitcast will be legalized further if necessary.
2227 EVT IVT = EVT::getIntegerVT(*DAG.getContext(),
2228 N->getOperand(0).getValueType().getSizeInBits());
2229 SDValue Cast = DAG.getBitcast(IVT, N->getOperand(0));
2230 return DAG.getNode(GetPromotionOpcode(VT, NVT), SDLoc(N), NVT, Cast);
2231 }
2232
2233 SDValue DAGTypeLegalizer::PromoteFloatRes_ConstantFP(SDNode *N) {
2234 ConstantFPSDNode *CFPNode = cast<ConstantFPSDNode>(N);
2235 EVT VT = N->getValueType(0);
2236 SDLoc DL(N);
2237
2238 // Get the (bit-cast) APInt of the APFloat and build an integer constant
2239 EVT IVT = EVT::getIntegerVT(*DAG.getContext(), VT.getSizeInBits());
2240 SDValue C = DAG.getConstant(CFPNode->getValueAPF().bitcastToAPInt(), DL,
2241 IVT);
2242
2243 // Convert the Constant to the desired FP type
2244 // FIXME We might be able to do the conversion during compilation and get rid
2245 // of it from the object code
2246 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
2247 return DAG.getNode(GetPromotionOpcode(VT, NVT), DL, NVT, C);
2248 }
2249
2250 // If the Index operand is a constant, try to redirect the extract operation to
2251 // the correct legalized vector. If not, bit-convert the input vector to
2252 // equivalent integer vector. Extract the element as an (bit-cast) integer
2253 // value and convert it to the promoted type.
2254 SDValue DAGTypeLegalizer::PromoteFloatRes_EXTRACT_VECTOR_ELT(SDNode *N) {
2255 SDLoc DL(N);
2256
2257 // If the index is constant, try to extract the value from the legalized
2258 // vector type.
2259 if (isa<ConstantSDNode>(N->getOperand(1))) {
2260 SDValue Vec = N->getOperand(0);
2261 SDValue Idx = N->getOperand(1);
2262 EVT VecVT = Vec->getValueType(0);
2263 EVT EltVT = VecVT.getVectorElementType();
2264
2265 uint64_t IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue();
2266
2267 switch (getTypeAction(VecVT)) {
2268 default: break;
2269 case TargetLowering::TypeScalarizeVector: {
2270 SDValue Res = GetScalarizedVector(N->getOperand(0));
2271 ReplaceValueWith(SDValue(N, 0), Res);
2272 return SDValue();
2273 }
2274 case TargetLowering::TypeWidenVector: {
2275 Vec = GetWidenedVector(Vec);
2276 SDValue Res = DAG.getNode(N->getOpcode(), DL, EltVT, Vec, Idx);
2277 ReplaceValueWith(SDValue(N, 0), Res);
2278 return SDValue();
2279 }
2280 case TargetLowering::TypeSplitVector: {
2281 SDValue Lo, Hi;
2282 GetSplitVector(Vec, Lo, Hi);
2283
2284 uint64_t LoElts = Lo.getValueType().getVectorNumElements();
2285 SDValue Res;
2286 if (IdxVal < LoElts)
2287 Res = DAG.getNode(N->getOpcode(), DL, EltVT, Lo, Idx);
2288 else
2289 Res = DAG.getNode(N->getOpcode(), DL, EltVT, Hi,
2290 DAG.getConstant(IdxVal - LoElts, DL,
2291 Idx.getValueType()));
2292 ReplaceValueWith(SDValue(N, 0), Res);
2293 return SDValue();
2294 }
2295
2296 }
2297 }
2298
2299 // Bit-convert the input vector to the equivalent integer vector
2300 SDValue NewOp = BitConvertVectorToIntegerVector(N->getOperand(0));
2301 EVT IVT = NewOp.getValueType().getVectorElementType();
2302
2303 // Extract the element as an (bit-cast) integer value
2304 SDValue NewVal = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, IVT,
2305 NewOp, N->getOperand(1));
2306
2307 // Convert the element to the desired FP type
2308 EVT VT = N->getValueType(0);
2309 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
2310 return DAG.getNode(GetPromotionOpcode(VT, NVT), SDLoc(N), NVT, NewVal);
2311 }
2312
2313 // FCOPYSIGN(X, Y) returns the value of X with the sign of Y. If the result
2314 // needs promotion, so does the argument X. Note that Y, if needed, will be
2315 // handled during operand promotion.
2316 SDValue DAGTypeLegalizer::PromoteFloatRes_FCOPYSIGN(SDNode *N) {
2317 EVT VT = N->getValueType(0);
2318 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
2319 SDValue Op0 = GetPromotedFloat(N->getOperand(0));
2320
2321 SDValue Op1 = N->getOperand(1);
2322
2323 return DAG.getNode(N->getOpcode(), SDLoc(N), NVT, Op0, Op1);
2324 }
2325
2326 // Unary operation where the result and the operand have PromoteFloat type
2327 // action. Construct a new SDNode with the promoted float value of the old
2328 // operand.
2329 SDValue DAGTypeLegalizer::PromoteFloatRes_UnaryOp(SDNode *N) {
2330 EVT VT = N->getValueType(0);
2331 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
2332 SDValue Op = GetPromotedFloat(N->getOperand(0));
2333
2334 return DAG.getNode(N->getOpcode(), SDLoc(N), NVT, Op);
2335 }
2336
2337 // Binary operations where the result and both operands have PromoteFloat type
2338 // action. Construct a new SDNode with the promoted float values of the old
2339 // operands.
2340 SDValue DAGTypeLegalizer::PromoteFloatRes_BinOp(SDNode *N) {
2341 EVT VT = N->getValueType(0);
2342 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
2343 SDValue Op0 = GetPromotedFloat(N->getOperand(0));
2344 SDValue Op1 = GetPromotedFloat(N->getOperand(1));
2345 return DAG.getNode(N->getOpcode(), SDLoc(N), NVT, Op0, Op1, N->getFlags());
2346 }
2347
2348 SDValue DAGTypeLegalizer::PromoteFloatRes_FMAD(SDNode *N) {
2349 EVT VT = N->getValueType(0);
2350 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
2351 SDValue Op0 = GetPromotedFloat(N->getOperand(0));
2352 SDValue Op1 = GetPromotedFloat(N->getOperand(1));
2353 SDValue Op2 = GetPromotedFloat(N->getOperand(2));
2354
2355 return DAG.getNode(N->getOpcode(), SDLoc(N), NVT, Op0, Op1, Op2);
2356 }
2357
2358 // Promote the Float (first) operand and retain the Integer (second) operand
2359 SDValue DAGTypeLegalizer::PromoteFloatRes_FPOWI(SDNode *N) {
2360 EVT VT = N->getValueType(0);
2361 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
2362 SDValue Op0 = GetPromotedFloat(N->getOperand(0));
2363 SDValue Op1 = N->getOperand(1);
2364
2365 return DAG.getNode(N->getOpcode(), SDLoc(N), NVT, Op0, Op1);
2366 }
2367
2368 // Explicit operation to reduce precision. Reduce the value to half precision
2369 // and promote it back to the legal type.
2370 SDValue DAGTypeLegalizer::PromoteFloatRes_FP_ROUND(SDNode *N) {
2371 SDLoc DL(N);
2372
2373 SDValue Op = N->getOperand(0);
2374 EVT VT = N->getValueType(0);
2375 EVT OpVT = Op->getValueType(0);
2376 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
2377 EVT IVT = EVT::getIntegerVT(*DAG.getContext(), VT.getSizeInBits());
2378
2379 // Round promoted float to desired precision
2380 SDValue Round = DAG.getNode(GetPromotionOpcode(OpVT, VT), DL, IVT, Op);
2381 // Promote it back to the legal output type
2382 return DAG.getNode(GetPromotionOpcode(VT, NVT), DL, NVT, Round);
2383 }
2384
2385 SDValue DAGTypeLegalizer::PromoteFloatRes_LOAD(SDNode *N) {
2386 LoadSDNode *L = cast<LoadSDNode>(N);
2387 EVT VT = N->getValueType(0);
2388
2389 // Load the value as an integer value with the same number of bits.
2390 EVT IVT = EVT::getIntegerVT(*DAG.getContext(), VT.getSizeInBits());
2391 SDValue newL = DAG.getLoad(L->getAddressingMode(), L->getExtensionType(), IVT,
2392 SDLoc(N), L->getChain(), L->getBasePtr(),
2393 L->getOffset(), L->getPointerInfo(), IVT,
2394 L->getAlignment(),
2395 L->getMemOperand()->getFlags(),
2396 L->getAAInfo());
2397 // Legalize the chain result by replacing uses of the old value chain with the
2398 // new one
2399 ReplaceValueWith(SDValue(N, 1), newL.getValue(1));
2400
2401 // Convert the integer value to the desired FP type
2402 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
2403 return DAG.getNode(GetPromotionOpcode(VT, NVT), SDLoc(N), NVT, newL);
2404 }
2405
2406 // Construct a new SELECT node with the promoted true- and false- values.
2407 SDValue DAGTypeLegalizer::PromoteFloatRes_SELECT(SDNode *N) {
2408 SDValue TrueVal = GetPromotedFloat(N->getOperand(1));
2409 SDValue FalseVal = GetPromotedFloat(N->getOperand(2));
2410
2411 return DAG.getNode(ISD::SELECT, SDLoc(N), TrueVal->getValueType(0),
2412 N->getOperand(0), TrueVal, FalseVal);
2413 }
2414
2415 // Construct a new SELECT_CC node with the promoted true- and false- values.
2416 // The operands used for comparison are promoted by PromoteFloatOp_SELECT_CC.
2417 SDValue DAGTypeLegalizer::PromoteFloatRes_SELECT_CC(SDNode *N) {
2418 SDValue TrueVal = GetPromotedFloat(N->getOperand(2));
2419 SDValue FalseVal = GetPromotedFloat(N->getOperand(3));
2420
2421 return DAG.getNode(ISD::SELECT_CC, SDLoc(N),
2422 TrueVal.getNode()->getValueType(0), N->getOperand(0),
2423 N->getOperand(1), TrueVal, FalseVal, N->getOperand(4));
2424 }
2425
2426 // Construct a SDNode that transforms the SINT or UINT operand to the promoted
2427 // float type.
2428 SDValue DAGTypeLegalizer::PromoteFloatRes_XINT_TO_FP(SDNode *N) {
2429 SDLoc DL(N);
2430 EVT VT = N->getValueType(0);
2431 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
2432 SDValue NV = DAG.getNode(N->getOpcode(), DL, NVT, N->getOperand(0));
2433 // Round the value to the desired precision (that of the source type).
2434 return DAG.getNode(
2435 ISD::FP_EXTEND, DL, NVT,
2436 DAG.getNode(ISD::FP_ROUND, DL, VT, NV, DAG.getIntPtrConstant(0, DL)));
2437 }
2438
2439 SDValue DAGTypeLegalizer::PromoteFloatRes_UNDEF(SDNode *N) {
2440 return DAG.getUNDEF(TLI.getTypeToTransformTo(*DAG.getContext(),
2441 N->getValueType(0)));
2442 }
2443
2444 SDValue DAGTypeLegalizer::BitcastToInt_ATOMIC_SWAP(SDNode *N) {
2445 EVT VT = N->getValueType(0);
2446 EVT NFPVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
2447
2448 AtomicSDNode *AM = cast<AtomicSDNode>(N);
2449 SDLoc SL(N);
2450
2451 SDValue CastVal = BitConvertToInteger(AM->getVal());
2452 EVT CastVT = CastVal.getValueType();
2453
2454 SDValue NewAtomic
2455 = DAG.getAtomic(ISD::ATOMIC_SWAP, SL, CastVT,
2456 DAG.getVTList(CastVT, MVT::Other),
2457 { AM->getChain(), AM->getBasePtr(), CastVal },
2458 AM->getMemOperand());
2459
2460 SDValue ResultCast = DAG.getNode(GetPromotionOpcode(VT, NFPVT), SL, NFPVT,
2461 NewAtomic);
2462 // Legalize the chain result by replacing uses of the old value chain with the
2463 // new one
2464 ReplaceValueWith(SDValue(N, 1), NewAtomic.getValue(1));
2465
2466 return ResultCast;
2467
2468 }
2469
The low level virtual machine