[ARM] Identity shuffles are legal

[llvm-complete.git] / docs / SubsystemDocumentation.rst

.. _index-subsystem-docs:\r
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Subsystem Documentation\r
=======================\r
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For API clients and LLVM developers.\r
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.. toctree::\r
   :hidden:\r
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   AliasAnalysis\r
   MemorySSA\r
   BitCodeFormat\r
   BlockFrequencyTerminology\r
   BranchWeightMetadata\r
   Bugpoint\r
   CodeGenerator\r
   ExceptionHandling\r
   AddingConstrainedIntrinsics\r
   LinkTimeOptimization\r
   SegmentedStacks\r
   TableGenFundamentals\r
   TableGen/index\r
   DebuggingJITedCode\r
   GoldPlugin\r
   MarkedUpDisassembly\r
   SystemLibrary\r
   SupportLibrary\r
   SourceLevelDebugging\r
   Vectorizers\r
   WritingAnLLVMBackend\r
   GarbageCollection\r
   WritingAnLLVMPass\r
   HowToUseAttributes\r
   StackMaps\r
   InAlloca\r
   BigEndianNEON\r
   CoverageMappingFormat\r
   Statepoints\r
   MergeFunctions\r
   TypeMetadata\r
   TransformMetadata\r
   FaultMaps\r
   Coroutines\r
   GlobalISel\r
   XRay\r
   XRayExample\r
   XRayFDRFormat\r
   PDB/index\r
   CFIVerify\r
   SpeculativeLoadHardening\r
   StackSafetyAnalysis\r
   LoopTerminology\r
   DependenceGraphs/index\r
\r
:doc:`WritingAnLLVMPass`\r
   Information on how to write LLVM transformations and analyses.\r
\r
:doc:`WritingAnLLVMBackend`\r
   Information on how to write LLVM backends for machine targets.\r
\r
:doc:`CodeGenerator`\r
   The design and implementation of the LLVM code generator.  Useful if you are\r
   working on retargetting LLVM to a new architecture, designing a new codegen\r
   pass, or enhancing existing components.\r
\r
:doc:`TableGen <TableGen/index>`\r
   Describes the TableGen tool, which is used heavily by the LLVM code\r
   generator.\r
\r
:doc:`AliasAnalysis`\r
   Information on how to write a new alias analysis implementation or how to\r
   use existing analyses.\r
\r
:doc:`MemorySSA`\r
   Information about the MemorySSA utility in LLVM, as well as how to use it.\r
\r
:doc:`Source Level Debugging with LLVM <SourceLevelDebugging>`\r
   This document describes the design and philosophy behind the LLVM\r
   source-level debugger.\r
\r
:doc:`Vectorizers`\r
   This document describes the current status of vectorization in LLVM.\r
\r
:doc:`ExceptionHandling`\r
   This document describes the design and implementation of exception handling\r
   in LLVM.\r
\r
:doc:`AddingConstrainedIntrinsics`\r
   Gives the steps necessary when adding a new constrained math intrinsic\r
   to LLVM.\r
\r
:doc:`Bugpoint`\r
   Automatic bug finder and test-case reducer description and usage\r
   information.\r
\r
:doc:`BitCodeFormat`\r
   This describes the file format and encoding used for LLVM "bc" files.\r
\r
:doc:`Support Library <SupportLibrary>`\r
   This document describes the LLVM Support Library (``lib/Support``) and\r
   how to keep LLVM source code portable\r
\r
:doc:`LinkTimeOptimization`\r
   This document describes the interface between LLVM intermodular optimizer\r
   and the linker and its design\r
\r
:doc:`GoldPlugin`\r
   How to build your programs with link-time optimization on Linux.\r
\r
:doc:`DebuggingJITedCode`\r
   How to debug JITed code with GDB.\r
\r
:doc:`MCJITDesignAndImplementation`\r
   Describes the inner workings of MCJIT execution engine.\r
\r
:doc:`ORCv2`\r
   Describes the design and implementation of the ORC APIs, including some\r
   usage examples, and a guide for users transitioning from ORCv1 to ORCv2.\r
\r
:doc:`BranchWeightMetadata`\r
   Provides information about Branch Prediction Information.\r
\r
:doc:`BlockFrequencyTerminology`\r
   Provides information about terminology used in the ``BlockFrequencyInfo``\r
   analysis pass.\r
\r
:doc:`SegmentedStacks`\r
   This document describes segmented stacks and how they are used in LLVM.\r
\r
:doc:`MarkedUpDisassembly`\r
   This document describes the optional rich disassembly output syntax.\r
\r
:doc:`HowToUseAttributes`\r
  Answers some questions about the new Attributes infrastructure.\r
\r
:doc:`StackMaps`\r
  LLVM support for mapping instruction addresses to the location of\r
  values and allowing code to be patched.\r
\r
:doc:`BigEndianNEON`\r
  LLVM's support for generating NEON instructions on big endian ARM targets is\r
  somewhat nonintuitive. This document explains the implementation and rationale.\r
\r
:doc:`CoverageMappingFormat`\r
  This describes the format and encoding used for LLVM’s code coverage mapping.\r
\r
:doc:`MergeFunctions`\r
  Describes functions merging optimization.\r
\r
:doc:`InAlloca`\r
  Description of the ``inalloca`` argument attribute.\r
\r
:doc:`FaultMaps`\r
  LLVM support for folding control flow into faulting machine instructions.\r
\r
:doc:`CompileCudaWithLLVM`\r
  LLVM support for CUDA.\r
\r
:doc:`Coroutines`\r
  LLVM support for coroutines.\r
\r
:doc:`GlobalISel`\r
  This describes the prototype instruction selection replacement, GlobalISel.\r
\r
:doc:`XRay`\r
  High-level documentation of how to use XRay in LLVM.\r
\r
:doc:`XRayExample`\r
  An example of how to debug an application with XRay.\r
\r
:doc:`The Microsoft PDB File Format <PDB/index>`\r
  A detailed description of the Microsoft PDB (Program Database) file format.\r
\r
:doc:`CFIVerify`\r
  A description of the verification tool for Control Flow Integrity.\r
\r
:doc:`SpeculativeLoadHardening`\r
  A description of the Speculative Load Hardening mitigation for Spectre v1.\r
\r
:doc:`StackSafetyAnalysis`\r
  This document describes the design of the stack safety analysis of local\r
  variables.\r
\r
:doc:`LoopTerminology`\r
  A document describing Loops and associated terms as used in LLVM.\r
\r
:doc:`Dependence Graphs <DependenceGraphs/index>`\r
  A description of the design of the various dependence graphs such as\r
  the DDG (Data Dependence Graph).\r
\r
==================\r
Garbage Collection\r
==================\r
\r
:doc:`GarbageCollection`\r
   The interfaces source-language compilers should use for compiling GC'd\r
   programs.\r
\r
:doc:`Statepoints`\r
  This describes a set of experimental extensions for garbage\r
  collection support.\r