test/tools/llvm-mca/AArch64/Cyclone/register-offset.s

   1 # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
   2 # RUN: llvm-mca -march=aarch64 -mcpu=cyclone -resource-pressure=false < %s | FileCheck %s
   3
   4   ldr   x7, [x1, #8]
   5   ldr   x6, [x1, x2]
   6   ldr   x4, [x1, x2, sxtx]
   7
   8 # CHECK:      Iterations:        100
   9 # CHECK-NEXT: Instructions:      300
  10 # CHECK-NEXT: Total Cycles:      157
  11 # CHECK-NEXT: Total uOps:        500
  12
  13 # CHECK:      Dispatch Width:    6
  14 # CHECK-NEXT: uOps Per Cycle:    3.18
  15 # CHECK-NEXT: IPC:               1.91
  16 # CHECK-NEXT: Block RThroughput: 1.5
  17
  18 # CHECK:      Instruction Info:
  19 # CHECK-NEXT: [1]: #uOps
  20 # CHECK-NEXT: [2]: Latency
  21 # CHECK-NEXT: [3]: RThroughput
  22 # CHECK-NEXT: [4]: MayLoad
  23 # CHECK-NEXT: [5]: MayStore
  24 # CHECK-NEXT: [6]: HasSideEffects (U)
  25
  26 # CHECK:      [1]    [2]    [3]    [4]    [5]    [6]    Instructions:
  27 # CHECK-NEXT:  1      4     0.50    *                   ldr     x7, [x1, #8]
  28 # CHECK-NEXT:  2      5     0.50    *                   ldr     x6, [x1, x2]
  29 # CHECK-NEXT:  2      5     0.50    *                   ldr     x4, [x1, x2, sxtx]