test/tools/llvm-mca/X86/BtVer2/register-files-3.s

   1 # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
   2 # RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=btver2 -register-file-size=5 -iterations=2 -dispatch-stats -register-file-stats -timeline < %s | FileCheck %s
   3
   4 idiv %eax
   5
   6 # CHECK:      Iterations:        2
   7 # CHECK-NEXT: Instructions:      2
   8 # CHECK-NEXT: Total Cycles:      55
   9 # CHECK-NEXT: Total uOps:        4
  10
  11 # CHECK:      Dispatch Width:    2
  12 # CHECK-NEXT: uOps Per Cycle:    0.07
  13 # CHECK-NEXT: IPC:               0.04
  14 # CHECK-NEXT: Block RThroughput: 25.0
  15
  16 # CHECK:      Instruction Info:
  17 # CHECK-NEXT: [1]: #uOps
  18 # CHECK-NEXT: [2]: Latency
  19 # CHECK-NEXT: [3]: RThroughput
  20 # CHECK-NEXT: [4]: MayLoad
  21 # CHECK-NEXT: [5]: MayStore
  22 # CHECK-NEXT: [6]: HasSideEffects (U)
  23
  24 # CHECK:      [1]    [2]    [3]    [4]    [5]    [6]    Instructions:
  25 # CHECK-NEXT:  2      25    25.00                 U     idivl   %eax
  26
  27 # CHECK:      Dynamic Dispatch Stall Cycles:
  28 # CHECK-NEXT: RAT     - Register unavailable:                      26  (47.3%)
  29 # CHECK-NEXT: RCU     - Retire tokens unavailable:                 0
  30 # CHECK-NEXT: SCHEDQ  - Scheduler full:                            0
  31 # CHECK-NEXT: LQ      - Load queue full:                           0
  32 # CHECK-NEXT: SQ      - Store queue full:                          0
  33 # CHECK-NEXT: GROUP   - Static restrictions on the dispatch group: 0
  34
  35 # CHECK:      Dispatch Logic - number of cycles where we saw N micro opcodes dispatched:
  36 # CHECK-NEXT: [# dispatched], [# cycles]
  37 # CHECK-NEXT:  0,              53  (96.4%)
  38 # CHECK-NEXT:  2,              2  (3.6%)
  39
  40 # CHECK:      Register File statistics:
  41 # CHECK-NEXT: Total number of mappings created:    6
  42 # CHECK-NEXT: Max number of mappings used:         3
  43
  44 # CHECK:      *  Register File #1 -- JFpuPRF:
  45 # CHECK-NEXT:    Number of physical registers:     72
  46 # CHECK-NEXT:    Total number of mappings created: 0
  47 # CHECK-NEXT:    Max number of mappings used:      0
  48
  49 # CHECK:      *  Register File #2 -- JIntegerPRF:
  50 # CHECK-NEXT:    Number of physical registers:     64
  51 # CHECK-NEXT:    Total number of mappings created: 6
  52 # CHECK-NEXT:    Max number of mappings used:      3
  53
  54 # CHECK:      Resources:
  55 # CHECK-NEXT: [0]   - JALU0
  56 # CHECK-NEXT: [1]   - JALU1
  57 # CHECK-NEXT: [2]   - JDiv
  58 # CHECK-NEXT: [3]   - JFPA
  59 # CHECK-NEXT: [4]   - JFPM
  60 # CHECK-NEXT: [5]   - JFPU0
  61 # CHECK-NEXT: [6]   - JFPU1
  62 # CHECK-NEXT: [7]   - JLAGU
  63 # CHECK-NEXT: [8]   - JMul
  64 # CHECK-NEXT: [9]   - JSAGU
  65 # CHECK-NEXT: [10]  - JSTC
  66 # CHECK-NEXT: [11]  - JVALU0
  67 # CHECK-NEXT: [12]  - JVALU1
  68 # CHECK-NEXT: [13]  - JVIMUL
  69
  70 # CHECK:      Resource pressure per iteration:
  71 # CHECK-NEXT: [0]    [1]    [2]    [3]    [4]    [5]    [6]    [7]    [8]    [9]    [10]   [11]   [12]   [13]
  72 # CHECK-NEXT:  -     1.00   25.00   -      -      -      -      -      -      -      -      -      -      -
  73
  74 # CHECK:      Resource pressure by instruction:
  75 # CHECK-NEXT: [0]    [1]    [2]    [3]    [4]    [5]    [6]    [7]    [8]    [9]    [10]   [11]   [12]   [13]   Instructions:
  76 # CHECK-NEXT:  -     1.00   25.00   -      -      -      -      -      -      -      -      -      -      -     idivl   %eax
  77
  78 # CHECK:      Timeline view:
  79 # CHECK-NEXT:                     0123456789          0123456789          01234
  80 # CHECK-NEXT: Index     0123456789          0123456789          0123456789
  81
  82 # CHECK:      [0,0]     DeeeeeeeeeeeeeeeeeeeeeeeeeER  .    .    .    .    .   .   idivl %eax
  83 # CHECK-NEXT: [1,0]     .    .    .    .    .    . DeeeeeeeeeeeeeeeeeeeeeeeeeER   idivl %eax
  84
  85 # CHECK:      Average Wait times (based on the timeline view):
  86 # CHECK-NEXT: [0]: Executions
  87 # CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
  88 # CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
  89 # CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
  90
  91 # CHECK:            [0]    [1]    [2]    [3]
  92 # CHECK-NEXT: 0.     2     1.0    1.0    0.0       idivl        %eax