[SimplifyCFG] FoldTwoEntryPHINode(): consider *total* speculation cost, not per-BB...
[llvm-complete.git] / include / llvm / CodeGen / GlobalISel / CombinerHelper.h
blob14834b83b9df1901624e33a9732d42e27039357c
1 //===-- llvm/CodeGen/GlobalISel/CombinerHelper.h --------------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===--------------------------------------------------------------------===//
8 //
9 /// This contains common combine transformations that may be used in a combine
10 /// pass,or by the target elsewhere.
11 /// Targets can pick individual opcode transformations from the helper or use
12 /// tryCombine which invokes all transformations. All of the transformations
13 /// return true if the MachineInstruction changed and false otherwise.
15 //===--------------------------------------------------------------------===//
17 #ifndef LLVM_CODEGEN_GLOBALISEL_COMBINER_HELPER_H
18 #define LLVM_CODEGEN_GLOBALISEL_COMBINER_HELPER_H
20 #include "llvm/CodeGen/LowLevelType.h"
21 #include "llvm/CodeGen/Register.h"
23 namespace llvm {
25 class GISelChangeObserver;
26 class MachineIRBuilder;
27 class MachineRegisterInfo;
28 class MachineInstr;
29 class MachineOperand;
30 class GISelKnownBits;
31 class MachineDominatorTree;
33 struct PreferredTuple {
34 LLT Ty; // The result type of the extend.
35 unsigned ExtendOpcode; // G_ANYEXT/G_SEXT/G_ZEXT
36 MachineInstr *MI;
39 class CombinerHelper {
40 protected:
41 MachineIRBuilder &Builder;
42 MachineRegisterInfo &MRI;
43 GISelChangeObserver &Observer;
44 GISelKnownBits *KB;
45 MachineDominatorTree *MDT;
47 public:
48 CombinerHelper(GISelChangeObserver &Observer, MachineIRBuilder &B,
49 GISelKnownBits *KB = nullptr,
50 MachineDominatorTree *MDT = nullptr);
52 /// MachineRegisterInfo::replaceRegWith() and inform the observer of the changes
53 void replaceRegWith(MachineRegisterInfo &MRI, Register FromReg, Register ToReg) const;
55 /// Replace a single register operand with a new register and inform the
56 /// observer of the changes.
57 void replaceRegOpWith(MachineRegisterInfo &MRI, MachineOperand &FromRegOp,
58 Register ToReg) const;
60 /// If \p MI is COPY, try to combine it.
61 /// Returns true if MI changed.
62 bool tryCombineCopy(MachineInstr &MI);
63 bool matchCombineCopy(MachineInstr &MI);
64 void applyCombineCopy(MachineInstr &MI);
66 /// \brief \returns true if \p DefMI precedes \p UseMI or they are the same
67 /// instruction. Both must be in the same basic block.
68 bool isPredecessor(MachineInstr &DefMI, MachineInstr &UseMI);
70 /// \brief \returns true if \p DefMI dominates \p UseMI. By definition an
71 /// instruction dominates itself.
72 ///
73 /// If we haven't been provided with a MachineDominatorTree during
74 /// construction, this function returns a conservative result that tracks just
75 /// a single basic block.
76 bool dominates(MachineInstr &DefMI, MachineInstr &UseMI);
78 /// If \p MI is extend that consumes the result of a load, try to combine it.
79 /// Returns true if MI changed.
80 bool tryCombineExtendingLoads(MachineInstr &MI);
81 bool matchCombineExtendingLoads(MachineInstr &MI, PreferredTuple &MatchInfo);
82 void applyCombineExtendingLoads(MachineInstr &MI, PreferredTuple &MatchInfo);
84 /// Combine \p MI into a pre-indexed or post-indexed load/store operation if
85 /// legal and the surrounding code makes it useful.
86 bool tryCombineIndexedLoadStore(MachineInstr &MI);
88 bool matchCombineBr(MachineInstr &MI);
89 bool tryCombineBr(MachineInstr &MI);
91 /// Optimize memcpy intrinsics et al, e.g. constant len calls.
92 /// /p MaxLen if non-zero specifies the max length of a mem libcall to inline.
93 ///
94 /// For example (pre-indexed):
95 ///
96 /// $addr = G_GEP $base, $offset
97 /// [...]
98 /// $val = G_LOAD $addr
99 /// [...]
100 /// $whatever = COPY $addr
102 /// -->
104 /// $val, $addr = G_INDEXED_LOAD $base, $offset, 1 (IsPre)
105 /// [...]
106 /// $whatever = COPY $addr
108 /// or (post-indexed):
110 /// G_STORE $val, $base
111 /// [...]
112 /// $addr = G_GEP $base, $offset
113 /// [...]
114 /// $whatever = COPY $addr
116 /// -->
118 /// $addr = G_INDEXED_STORE $val, $base, $offset
119 /// [...]
120 /// $whatever = COPY $addr
121 bool tryCombineMemCpyFamily(MachineInstr &MI, unsigned MaxLen = 0);
123 /// Try to transform \p MI by using all of the above
124 /// combine functions. Returns true if changed.
125 bool tryCombine(MachineInstr &MI);
127 private:
128 // Memcpy family optimization helpers.
129 bool optimizeMemcpy(MachineInstr &MI, Register Dst, Register Src,
130 unsigned KnownLen, unsigned DstAlign, unsigned SrcAlign,
131 bool IsVolatile);
132 bool optimizeMemmove(MachineInstr &MI, Register Dst, Register Src,
133 unsigned KnownLen, unsigned DstAlign, unsigned SrcAlign,
134 bool IsVolatile);
135 bool optimizeMemset(MachineInstr &MI, Register Dst, Register Val,
136 unsigned KnownLen, unsigned DstAlign, bool IsVolatile);
138 /// Given a non-indexed load or store instruction \p MI, find an offset that
139 /// can be usefully and legally folded into it as a post-indexing operation.
141 /// \returns true if a candidate is found.
142 bool findPostIndexCandidate(MachineInstr &MI, Register &Addr, Register &Base,
143 Register &Offset);
145 /// Given a non-indexed load or store instruction \p MI, find an offset that
146 /// can be usefully and legally folded into it as a pre-indexing operation.
148 /// \returns true if a candidate is found.
149 bool findPreIndexCandidate(MachineInstr &MI, Register &Addr, Register &Base,
150 Register &Offset);
152 } // namespace llvm
154 #endif