1 //===-- LegalizeTypes.h - DAG Type Legalizer class definition ---*- C++ -*-===//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 // This file defines the DAGTypeLegalizer class. This is a private interface
10 // shared between the code that implements the SelectionDAG::LegalizeTypes
13 //===----------------------------------------------------------------------===//
15 #ifndef LLVM_LIB_CODEGEN_SELECTIONDAG_LEGALIZETYPES_H
16 #define LLVM_LIB_CODEGEN_SELECTIONDAG_LEGALIZETYPES_H
18 #include "llvm/ADT/DenseMap.h"
19 #include "llvm/CodeGen/SelectionDAG.h"
20 #include "llvm/CodeGen/TargetLowering.h"
21 #include "llvm/Support/Compiler.h"
22 #include "llvm/Support/Debug.h"
26 //===----------------------------------------------------------------------===//
27 /// This takes an arbitrary SelectionDAG as input and hacks on it until only
28 /// value types the target machine can handle are left. This involves promoting
29 /// small sizes to large sizes or splitting up large values into small values.
31 class LLVM_LIBRARY_VISIBILITY DAGTypeLegalizer
{
32 const TargetLowering
&TLI
;
35 /// This pass uses the NodeId on the SDNodes to hold information about the
36 /// state of the node. The enum has all the values.
38 /// All operands have been processed, so this node is ready to be handled.
41 /// This is a new node, not before seen, that was created in the process of
42 /// legalizing some other node.
45 /// This node's ID needs to be set to the number of its unprocessed
49 /// This is a node that has already been processed.
52 // 1+ - This is a node which has this many unprocessed operands.
56 /// This is a bitvector that contains two bits for each simple value type,
57 /// where the two bits correspond to the LegalizeAction enum from
58 /// TargetLowering. This can be queried with "getTypeAction(VT)".
59 TargetLowering::ValueTypeActionImpl ValueTypeActions
;
61 /// Return how we should legalize values of this type.
62 TargetLowering::LegalizeTypeAction
getTypeAction(EVT VT
) const {
63 return TLI
.getTypeAction(*DAG
.getContext(), VT
);
66 /// Return true if this type is legal on this target.
67 bool isTypeLegal(EVT VT
) const {
68 return TLI
.getTypeAction(*DAG
.getContext(), VT
) == TargetLowering::TypeLegal
;
71 /// Return true if this is a simple legal type.
72 bool isSimpleLegalType(EVT VT
) const {
73 return VT
.isSimple() && TLI
.isTypeLegal(VT
);
76 EVT
getSetCCResultType(EVT VT
) const {
77 return TLI
.getSetCCResultType(DAG
.getDataLayout(), *DAG
.getContext(), VT
);
80 /// Pretend all of this node's results are legal.
81 bool IgnoreNodeResults(SDNode
*N
) const {
82 return N
->getOpcode() == ISD::TargetConstant
||
83 N
->getOpcode() == ISD::Register
;
86 // Bijection from SDValue to unique id. As each created node gets a
87 // new id we do not need to worry about reuse expunging. Should we
88 // run out of ids, we can do a one time expensive compactifcation.
89 typedef unsigned TableId
;
91 TableId NextValueId
= 1;
93 SmallDenseMap
<SDValue
, TableId
, 8> ValueToIdMap
;
94 SmallDenseMap
<TableId
, SDValue
, 8> IdToValueMap
;
96 /// For integer nodes that are below legal width, this map indicates what
97 /// promoted value to use.
98 SmallDenseMap
<TableId
, TableId
, 8> PromotedIntegers
;
100 /// For integer nodes that need to be expanded this map indicates which
101 /// operands are the expanded version of the input.
102 SmallDenseMap
<TableId
, std::pair
<TableId
, TableId
>, 8> ExpandedIntegers
;
104 /// For floating-point nodes converted to integers of the same size, this map
105 /// indicates the converted value to use.
106 SmallDenseMap
<TableId
, TableId
, 8> SoftenedFloats
;
108 /// For floating-point nodes that have a smaller precision than the smallest
109 /// supported precision, this map indicates what promoted value to use.
110 SmallDenseMap
<TableId
, TableId
, 8> PromotedFloats
;
112 /// For float nodes that need to be expanded this map indicates which operands
113 /// are the expanded version of the input.
114 SmallDenseMap
<TableId
, std::pair
<TableId
, TableId
>, 8> ExpandedFloats
;
116 /// For nodes that are <1 x ty>, this map indicates the scalar value of type
118 SmallDenseMap
<TableId
, TableId
, 8> ScalarizedVectors
;
120 /// For nodes that need to be split this map indicates which operands are the
121 /// expanded version of the input.
122 SmallDenseMap
<TableId
, std::pair
<TableId
, TableId
>, 8> SplitVectors
;
124 /// For vector nodes that need to be widened, indicates the widened value to
126 SmallDenseMap
<TableId
, TableId
, 8> WidenedVectors
;
128 /// For values that have been replaced with another, indicates the replacement
130 SmallDenseMap
<TableId
, TableId
, 8> ReplacedValues
;
132 /// This defines a worklist of nodes to process. In order to be pushed onto
133 /// this worklist, all operands of a node must have already been processed.
134 SmallVector
<SDNode
*, 128> Worklist
;
136 TableId
getTableId(SDValue V
) {
137 assert(V
.getNode() && "Getting TableId on SDValue()");
139 auto I
= ValueToIdMap
.find(V
);
140 if (I
!= ValueToIdMap
.end()) {
141 // replace if there's been a shift.
143 assert(I
->second
&& "All Ids should be nonzero");
146 // Add if it's not there.
147 ValueToIdMap
.insert(std::make_pair(V
, NextValueId
));
148 IdToValueMap
.insert(std::make_pair(NextValueId
, V
));
150 assert(NextValueId
!= 0 &&
151 "Ran out of Ids. Increase id type size or add compactification");
152 return NextValueId
- 1;
155 const SDValue
&getSDValue(TableId
&Id
) {
157 assert(Id
&& "TableId should be non-zero");
158 return IdToValueMap
[Id
];
162 explicit DAGTypeLegalizer(SelectionDAG
&dag
)
163 : TLI(dag
.getTargetLoweringInfo()), DAG(dag
),
164 ValueTypeActions(TLI
.getValueTypeActions()) {
165 static_assert(MVT::LAST_VALUETYPE
<= MVT::MAX_ALLOWED_VALUETYPE
,
166 "Too many value types for ValueTypeActions to hold!");
169 /// This is the main entry point for the type legalizer. This does a
170 /// top-down traversal of the dag, legalizing types as it goes. Returns
171 /// "true" if it made any changes.
174 void NoteDeletion(SDNode
*Old
, SDNode
*New
) {
175 for (unsigned i
= 0, e
= Old
->getNumValues(); i
!= e
; ++i
) {
176 TableId NewId
= getTableId(SDValue(New
, i
));
177 TableId OldId
= getTableId(SDValue(Old
, i
));
180 ReplacedValues
[OldId
] = NewId
;
182 // Delete Node from tables.
183 ValueToIdMap
.erase(SDValue(Old
, i
));
184 IdToValueMap
.erase(OldId
);
185 PromotedIntegers
.erase(OldId
);
186 ExpandedIntegers
.erase(OldId
);
187 SoftenedFloats
.erase(OldId
);
188 PromotedFloats
.erase(OldId
);
189 ExpandedFloats
.erase(OldId
);
190 ScalarizedVectors
.erase(OldId
);
191 SplitVectors
.erase(OldId
);
192 WidenedVectors
.erase(OldId
);
196 SelectionDAG
&getDAG() const { return DAG
; }
199 SDNode
*AnalyzeNewNode(SDNode
*N
);
200 void AnalyzeNewValue(SDValue
&Val
);
201 void PerformExpensiveChecks();
202 void RemapId(TableId
&Id
);
203 void RemapValue(SDValue
&V
);
206 SDValue
BitConvertToInteger(SDValue Op
);
207 SDValue
BitConvertVectorToIntegerVector(SDValue Op
);
208 SDValue
CreateStackStoreLoad(SDValue Op
, EVT DestVT
);
209 bool CustomLowerNode(SDNode
*N
, EVT VT
, bool LegalizeResult
);
210 bool CustomWidenLowerNode(SDNode
*N
, EVT VT
);
212 /// Replace each result of the given MERGE_VALUES node with the corresponding
213 /// input operand, except for the result 'ResNo', for which the corresponding
214 /// input operand is returned.
215 SDValue
DisintegrateMERGE_VALUES(SDNode
*N
, unsigned ResNo
);
217 SDValue
JoinIntegers(SDValue Lo
, SDValue Hi
);
218 SDValue
LibCallify(RTLIB::Libcall LC
, SDNode
*N
, bool isSigned
);
220 std::pair
<SDValue
, SDValue
> ExpandChainLibCall(RTLIB::Libcall LC
,
221 SDNode
*Node
, bool isSigned
);
222 std::pair
<SDValue
, SDValue
> ExpandAtomic(SDNode
*Node
);
224 SDValue
PromoteTargetBoolean(SDValue Bool
, EVT ValVT
);
226 void ReplaceValueWith(SDValue From
, SDValue To
);
227 void SplitInteger(SDValue Op
, SDValue
&Lo
, SDValue
&Hi
);
228 void SplitInteger(SDValue Op
, EVT LoVT
, EVT HiVT
,
229 SDValue
&Lo
, SDValue
&Hi
);
231 void AddToWorklist(SDNode
*N
) {
232 N
->setNodeId(ReadyToProcess
);
233 Worklist
.push_back(N
);
236 //===--------------------------------------------------------------------===//
237 // Integer Promotion Support: LegalizeIntegerTypes.cpp
238 //===--------------------------------------------------------------------===//
240 /// Given a processed operand Op which was promoted to a larger integer type,
241 /// this returns the promoted value. The low bits of the promoted value
242 /// corresponding to the original type are exactly equal to Op.
243 /// The extra bits contain rubbish, so the promoted value may need to be zero-
244 /// or sign-extended from the original type before it is usable (the helpers
245 /// SExtPromotedInteger and ZExtPromotedInteger can do this for you).
246 /// For example, if Op is an i16 and was promoted to an i32, then this method
247 /// returns an i32, the lower 16 bits of which coincide with Op, and the upper
248 /// 16 bits of which contain rubbish.
249 SDValue
GetPromotedInteger(SDValue Op
) {
250 TableId
&PromotedId
= PromotedIntegers
[getTableId(Op
)];
251 SDValue PromotedOp
= getSDValue(PromotedId
);
252 assert(PromotedOp
.getNode() && "Operand wasn't promoted?");
255 void SetPromotedInteger(SDValue Op
, SDValue Result
);
257 /// Get a promoted operand and sign extend it to the final size.
258 SDValue
SExtPromotedInteger(SDValue Op
) {
259 EVT OldVT
= Op
.getValueType();
261 Op
= GetPromotedInteger(Op
);
262 return DAG
.getNode(ISD::SIGN_EXTEND_INREG
, dl
, Op
.getValueType(), Op
,
263 DAG
.getValueType(OldVT
));
266 /// Get a promoted operand and zero extend it to the final size.
267 SDValue
ZExtPromotedInteger(SDValue Op
) {
268 EVT OldVT
= Op
.getValueType();
270 Op
= GetPromotedInteger(Op
);
271 return DAG
.getZeroExtendInReg(Op
, dl
, OldVT
.getScalarType());
274 // Get a promoted operand and sign or zero extend it to the final size
275 // (depending on TargetLoweringInfo::isSExtCheaperThanZExt). For a given
276 // subtarget and type, the choice of sign or zero-extension will be
278 SDValue
SExtOrZExtPromotedInteger(SDValue Op
) {
279 EVT OldVT
= Op
.getValueType();
281 Op
= GetPromotedInteger(Op
);
282 if (TLI
.isSExtCheaperThanZExt(OldVT
, Op
.getValueType()))
283 return DAG
.getNode(ISD::SIGN_EXTEND_INREG
, DL
, Op
.getValueType(), Op
,
284 DAG
.getValueType(OldVT
));
285 return DAG
.getZeroExtendInReg(Op
, DL
, OldVT
.getScalarType());
288 // Integer Result Promotion.
289 void PromoteIntegerResult(SDNode
*N
, unsigned ResNo
);
290 SDValue
PromoteIntRes_MERGE_VALUES(SDNode
*N
, unsigned ResNo
);
291 SDValue
PromoteIntRes_AssertSext(SDNode
*N
);
292 SDValue
PromoteIntRes_AssertZext(SDNode
*N
);
293 SDValue
PromoteIntRes_Atomic0(AtomicSDNode
*N
);
294 SDValue
PromoteIntRes_Atomic1(AtomicSDNode
*N
);
295 SDValue
PromoteIntRes_AtomicCmpSwap(AtomicSDNode
*N
, unsigned ResNo
);
296 SDValue
PromoteIntRes_EXTRACT_SUBVECTOR(SDNode
*N
);
297 SDValue
PromoteIntRes_VECTOR_SHUFFLE(SDNode
*N
);
298 SDValue
PromoteIntRes_BUILD_VECTOR(SDNode
*N
);
299 SDValue
PromoteIntRes_SCALAR_TO_VECTOR(SDNode
*N
);
300 SDValue
PromoteIntRes_EXTEND_VECTOR_INREG(SDNode
*N
);
301 SDValue
PromoteIntRes_INSERT_VECTOR_ELT(SDNode
*N
);
302 SDValue
PromoteIntRes_CONCAT_VECTORS(SDNode
*N
);
303 SDValue
PromoteIntRes_BITCAST(SDNode
*N
);
304 SDValue
PromoteIntRes_BSWAP(SDNode
*N
);
305 SDValue
PromoteIntRes_BITREVERSE(SDNode
*N
);
306 SDValue
PromoteIntRes_BUILD_PAIR(SDNode
*N
);
307 SDValue
PromoteIntRes_Constant(SDNode
*N
);
308 SDValue
PromoteIntRes_CTLZ(SDNode
*N
);
309 SDValue
PromoteIntRes_CTPOP(SDNode
*N
);
310 SDValue
PromoteIntRes_CTTZ(SDNode
*N
);
311 SDValue
PromoteIntRes_EXTRACT_VECTOR_ELT(SDNode
*N
);
312 SDValue
PromoteIntRes_FP_TO_XINT(SDNode
*N
);
313 SDValue
PromoteIntRes_FP_TO_FP16(SDNode
*N
);
314 SDValue
PromoteIntRes_INT_EXTEND(SDNode
*N
);
315 SDValue
PromoteIntRes_LOAD(LoadSDNode
*N
);
316 SDValue
PromoteIntRes_MLOAD(MaskedLoadSDNode
*N
);
317 SDValue
PromoteIntRes_MGATHER(MaskedGatherSDNode
*N
);
318 SDValue
PromoteIntRes_Overflow(SDNode
*N
);
319 SDValue
PromoteIntRes_SADDSUBO(SDNode
*N
, unsigned ResNo
);
320 SDValue
PromoteIntRes_SELECT(SDNode
*N
);
321 SDValue
PromoteIntRes_VSELECT(SDNode
*N
);
322 SDValue
PromoteIntRes_SELECT_CC(SDNode
*N
);
323 SDValue
PromoteIntRes_SETCC(SDNode
*N
);
324 SDValue
PromoteIntRes_SHL(SDNode
*N
);
325 SDValue
PromoteIntRes_SimpleIntBinOp(SDNode
*N
);
326 SDValue
PromoteIntRes_ZExtIntBinOp(SDNode
*N
);
327 SDValue
PromoteIntRes_SExtIntBinOp(SDNode
*N
);
328 SDValue
PromoteIntRes_SIGN_EXTEND_INREG(SDNode
*N
);
329 SDValue
PromoteIntRes_SRA(SDNode
*N
);
330 SDValue
PromoteIntRes_SRL(SDNode
*N
);
331 SDValue
PromoteIntRes_TRUNCATE(SDNode
*N
);
332 SDValue
PromoteIntRes_UADDSUBO(SDNode
*N
, unsigned ResNo
);
333 SDValue
PromoteIntRes_ADDSUBCARRY(SDNode
*N
, unsigned ResNo
);
334 SDValue
PromoteIntRes_UNDEF(SDNode
*N
);
335 SDValue
PromoteIntRes_VAARG(SDNode
*N
);
336 SDValue
PromoteIntRes_XMULO(SDNode
*N
, unsigned ResNo
);
337 SDValue
PromoteIntRes_ADDSUBSAT(SDNode
*N
);
338 SDValue
PromoteIntRes_MULFIX(SDNode
*N
);
339 SDValue
PromoteIntRes_FLT_ROUNDS(SDNode
*N
);
340 SDValue
PromoteIntRes_VECREDUCE(SDNode
*N
);
341 SDValue
PromoteIntRes_ABS(SDNode
*N
);
343 // Integer Operand Promotion.
344 bool PromoteIntegerOperand(SDNode
*N
, unsigned OpNo
);
345 SDValue
PromoteIntOp_ANY_EXTEND(SDNode
*N
);
346 SDValue
PromoteIntOp_ATOMIC_STORE(AtomicSDNode
*N
);
347 SDValue
PromoteIntOp_BITCAST(SDNode
*N
);
348 SDValue
PromoteIntOp_BUILD_PAIR(SDNode
*N
);
349 SDValue
PromoteIntOp_BR_CC(SDNode
*N
, unsigned OpNo
);
350 SDValue
PromoteIntOp_BRCOND(SDNode
*N
, unsigned OpNo
);
351 SDValue
PromoteIntOp_BUILD_VECTOR(SDNode
*N
);
352 SDValue
PromoteIntOp_INSERT_VECTOR_ELT(SDNode
*N
, unsigned OpNo
);
353 SDValue
PromoteIntOp_EXTRACT_VECTOR_ELT(SDNode
*N
);
354 SDValue
PromoteIntOp_EXTRACT_SUBVECTOR(SDNode
*N
);
355 SDValue
PromoteIntOp_CONCAT_VECTORS(SDNode
*N
);
356 SDValue
PromoteIntOp_SCALAR_TO_VECTOR(SDNode
*N
);
357 SDValue
PromoteIntOp_SELECT(SDNode
*N
, unsigned OpNo
);
358 SDValue
PromoteIntOp_SELECT_CC(SDNode
*N
, unsigned OpNo
);
359 SDValue
PromoteIntOp_SETCC(SDNode
*N
, unsigned OpNo
);
360 SDValue
PromoteIntOp_Shift(SDNode
*N
);
361 SDValue
PromoteIntOp_SIGN_EXTEND(SDNode
*N
);
362 SDValue
PromoteIntOp_SINT_TO_FP(SDNode
*N
);
363 SDValue
PromoteIntOp_STORE(StoreSDNode
*N
, unsigned OpNo
);
364 SDValue
PromoteIntOp_TRUNCATE(SDNode
*N
);
365 SDValue
PromoteIntOp_UINT_TO_FP(SDNode
*N
);
366 SDValue
PromoteIntOp_ZERO_EXTEND(SDNode
*N
);
367 SDValue
PromoteIntOp_MSTORE(MaskedStoreSDNode
*N
, unsigned OpNo
);
368 SDValue
PromoteIntOp_MLOAD(MaskedLoadSDNode
*N
, unsigned OpNo
);
369 SDValue
PromoteIntOp_MSCATTER(MaskedScatterSDNode
*N
, unsigned OpNo
);
370 SDValue
PromoteIntOp_MGATHER(MaskedGatherSDNode
*N
, unsigned OpNo
);
371 SDValue
PromoteIntOp_ADDSUBCARRY(SDNode
*N
, unsigned OpNo
);
372 SDValue
PromoteIntOp_FRAMERETURNADDR(SDNode
*N
);
373 SDValue
PromoteIntOp_PREFETCH(SDNode
*N
, unsigned OpNo
);
374 SDValue
PromoteIntOp_MULFIX(SDNode
*N
);
375 SDValue
PromoteIntOp_FPOWI(SDNode
*N
);
376 SDValue
PromoteIntOp_VECREDUCE(SDNode
*N
);
378 void PromoteSetCCOperands(SDValue
&LHS
,SDValue
&RHS
, ISD::CondCode Code
);
380 //===--------------------------------------------------------------------===//
381 // Integer Expansion Support: LegalizeIntegerTypes.cpp
382 //===--------------------------------------------------------------------===//
384 /// Given a processed operand Op which was expanded into two integers of half
385 /// the size, this returns the two halves. The low bits of Op are exactly
386 /// equal to the bits of Lo; the high bits exactly equal Hi.
387 /// For example, if Op is an i64 which was expanded into two i32's, then this
388 /// method returns the two i32's, with Lo being equal to the lower 32 bits of
389 /// Op, and Hi being equal to the upper 32 bits.
390 void GetExpandedInteger(SDValue Op
, SDValue
&Lo
, SDValue
&Hi
);
391 void SetExpandedInteger(SDValue Op
, SDValue Lo
, SDValue Hi
);
393 // Integer Result Expansion.
394 void ExpandIntegerResult(SDNode
*N
, unsigned ResNo
);
395 void ExpandIntRes_ANY_EXTEND (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
396 void ExpandIntRes_AssertSext (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
397 void ExpandIntRes_AssertZext (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
398 void ExpandIntRes_Constant (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
399 void ExpandIntRes_ABS (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
400 void ExpandIntRes_CTLZ (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
401 void ExpandIntRes_CTPOP (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
402 void ExpandIntRes_CTTZ (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
403 void ExpandIntRes_LOAD (LoadSDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
404 void ExpandIntRes_READCYCLECOUNTER (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
405 void ExpandIntRes_SIGN_EXTEND (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
406 void ExpandIntRes_SIGN_EXTEND_INREG (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
407 void ExpandIntRes_TRUNCATE (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
408 void ExpandIntRes_ZERO_EXTEND (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
409 void ExpandIntRes_FLT_ROUNDS (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
410 void ExpandIntRes_FP_TO_SINT (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
411 void ExpandIntRes_FP_TO_UINT (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
412 void ExpandIntRes_LLROUND (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
413 void ExpandIntRes_LLRINT (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
415 void ExpandIntRes_Logical (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
416 void ExpandIntRes_ADDSUB (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
417 void ExpandIntRes_ADDSUBC (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
418 void ExpandIntRes_ADDSUBE (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
419 void ExpandIntRes_ADDSUBCARRY (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
420 void ExpandIntRes_BITREVERSE (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
421 void ExpandIntRes_BSWAP (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
422 void ExpandIntRes_MUL (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
423 void ExpandIntRes_SDIV (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
424 void ExpandIntRes_SREM (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
425 void ExpandIntRes_UDIV (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
426 void ExpandIntRes_UREM (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
427 void ExpandIntRes_Shift (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
429 void ExpandIntRes_MINMAX (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
431 void ExpandIntRes_SADDSUBO (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
432 void ExpandIntRes_UADDSUBO (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
433 void ExpandIntRes_XMULO (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
434 void ExpandIntRes_ADDSUBSAT (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
435 void ExpandIntRes_MULFIX (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
437 void ExpandIntRes_ATOMIC_LOAD (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
438 void ExpandIntRes_VECREDUCE (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
440 void ExpandShiftByConstant(SDNode
*N
, const APInt
&Amt
,
441 SDValue
&Lo
, SDValue
&Hi
);
442 bool ExpandShiftWithKnownAmountBit(SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
443 bool ExpandShiftWithUnknownAmountBit(SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
445 // Integer Operand Expansion.
446 bool ExpandIntegerOperand(SDNode
*N
, unsigned OpNo
);
447 SDValue
ExpandIntOp_BR_CC(SDNode
*N
);
448 SDValue
ExpandIntOp_SELECT_CC(SDNode
*N
);
449 SDValue
ExpandIntOp_SETCC(SDNode
*N
);
450 SDValue
ExpandIntOp_SETCCCARRY(SDNode
*N
);
451 SDValue
ExpandIntOp_Shift(SDNode
*N
);
452 SDValue
ExpandIntOp_SINT_TO_FP(SDNode
*N
);
453 SDValue
ExpandIntOp_STORE(StoreSDNode
*N
, unsigned OpNo
);
454 SDValue
ExpandIntOp_TRUNCATE(SDNode
*N
);
455 SDValue
ExpandIntOp_UINT_TO_FP(SDNode
*N
);
456 SDValue
ExpandIntOp_RETURNADDR(SDNode
*N
);
457 SDValue
ExpandIntOp_ATOMIC_STORE(SDNode
*N
);
459 void IntegerExpandSetCCOperands(SDValue
&NewLHS
, SDValue
&NewRHS
,
460 ISD::CondCode
&CCCode
, const SDLoc
&dl
);
462 //===--------------------------------------------------------------------===//
463 // Float to Integer Conversion Support: LegalizeFloatTypes.cpp
464 //===--------------------------------------------------------------------===//
466 /// GetSoftenedFloat - Given a processed operand Op which was converted to an
467 /// integer of the same size, this returns the integer. The integer contains
468 /// exactly the same bits as Op - only the type changed. For example, if Op
469 /// is an f32 which was softened to an i32, then this method returns an i32,
470 /// the bits of which coincide with those of Op
471 SDValue
GetSoftenedFloat(SDValue Op
) {
472 TableId Id
= getTableId(Op
);
473 auto Iter
= SoftenedFloats
.find(Id
);
474 if (Iter
== SoftenedFloats
.end()) {
475 assert(isSimpleLegalType(Op
.getValueType()) &&
476 "Operand wasn't converted to integer?");
479 SDValue SoftenedOp
= getSDValue(Iter
->second
);
480 assert(SoftenedOp
.getNode() && "Unconverted op in SoftenedFloats?");
483 void SetSoftenedFloat(SDValue Op
, SDValue Result
);
485 // Convert Float Results to Integer.
486 void SoftenFloatResult(SDNode
*N
, unsigned ResNo
);
487 SDValue
SoftenFloatRes_MERGE_VALUES(SDNode
*N
, unsigned ResNo
);
488 SDValue
SoftenFloatRes_BITCAST(SDNode
*N
);
489 SDValue
SoftenFloatRes_BUILD_PAIR(SDNode
*N
);
490 SDValue
SoftenFloatRes_ConstantFP(SDNode
*N
);
491 SDValue
SoftenFloatRes_EXTRACT_VECTOR_ELT(SDNode
*N
, unsigned ResNo
);
492 SDValue
SoftenFloatRes_FABS(SDNode
*N
);
493 SDValue
SoftenFloatRes_FMINNUM(SDNode
*N
);
494 SDValue
SoftenFloatRes_FMAXNUM(SDNode
*N
);
495 SDValue
SoftenFloatRes_FADD(SDNode
*N
);
496 SDValue
SoftenFloatRes_FCEIL(SDNode
*N
);
497 SDValue
SoftenFloatRes_FCOPYSIGN(SDNode
*N
);
498 SDValue
SoftenFloatRes_FCOS(SDNode
*N
);
499 SDValue
SoftenFloatRes_FDIV(SDNode
*N
);
500 SDValue
SoftenFloatRes_FEXP(SDNode
*N
);
501 SDValue
SoftenFloatRes_FEXP2(SDNode
*N
);
502 SDValue
SoftenFloatRes_FFLOOR(SDNode
*N
);
503 SDValue
SoftenFloatRes_FLOG(SDNode
*N
);
504 SDValue
SoftenFloatRes_FLOG2(SDNode
*N
);
505 SDValue
SoftenFloatRes_FLOG10(SDNode
*N
);
506 SDValue
SoftenFloatRes_FMA(SDNode
*N
);
507 SDValue
SoftenFloatRes_FMUL(SDNode
*N
);
508 SDValue
SoftenFloatRes_FNEARBYINT(SDNode
*N
);
509 SDValue
SoftenFloatRes_FNEG(SDNode
*N
);
510 SDValue
SoftenFloatRes_FP_EXTEND(SDNode
*N
);
511 SDValue
SoftenFloatRes_FP16_TO_FP(SDNode
*N
);
512 SDValue
SoftenFloatRes_FP_ROUND(SDNode
*N
);
513 SDValue
SoftenFloatRes_FPOW(SDNode
*N
);
514 SDValue
SoftenFloatRes_FPOWI(SDNode
*N
);
515 SDValue
SoftenFloatRes_FREM(SDNode
*N
);
516 SDValue
SoftenFloatRes_FRINT(SDNode
*N
);
517 SDValue
SoftenFloatRes_FROUND(SDNode
*N
);
518 SDValue
SoftenFloatRes_FSIN(SDNode
*N
);
519 SDValue
SoftenFloatRes_FSQRT(SDNode
*N
);
520 SDValue
SoftenFloatRes_FSUB(SDNode
*N
);
521 SDValue
SoftenFloatRes_FTRUNC(SDNode
*N
);
522 SDValue
SoftenFloatRes_LOAD(SDNode
*N
);
523 SDValue
SoftenFloatRes_SELECT(SDNode
*N
);
524 SDValue
SoftenFloatRes_SELECT_CC(SDNode
*N
);
525 SDValue
SoftenFloatRes_UNDEF(SDNode
*N
);
526 SDValue
SoftenFloatRes_VAARG(SDNode
*N
);
527 SDValue
SoftenFloatRes_XINT_TO_FP(SDNode
*N
);
529 // Convert Float Operand to Integer.
530 bool SoftenFloatOperand(SDNode
*N
, unsigned OpNo
);
531 SDValue
SoftenFloatOp_BITCAST(SDNode
*N
);
532 SDValue
SoftenFloatOp_BR_CC(SDNode
*N
);
533 SDValue
SoftenFloatOp_FP_EXTEND(SDNode
*N
);
534 SDValue
SoftenFloatOp_FP_ROUND(SDNode
*N
);
535 SDValue
SoftenFloatOp_FP_TO_XINT(SDNode
*N
);
536 SDValue
SoftenFloatOp_LROUND(SDNode
*N
);
537 SDValue
SoftenFloatOp_LLROUND(SDNode
*N
);
538 SDValue
SoftenFloatOp_LRINT(SDNode
*N
);
539 SDValue
SoftenFloatOp_LLRINT(SDNode
*N
);
540 SDValue
SoftenFloatOp_SELECT_CC(SDNode
*N
);
541 SDValue
SoftenFloatOp_SETCC(SDNode
*N
);
542 SDValue
SoftenFloatOp_STORE(SDNode
*N
, unsigned OpNo
);
544 //===--------------------------------------------------------------------===//
545 // Float Expansion Support: LegalizeFloatTypes.cpp
546 //===--------------------------------------------------------------------===//
548 /// Given a processed operand Op which was expanded into two floating-point
549 /// values of half the size, this returns the two halves.
550 /// The low bits of Op are exactly equal to the bits of Lo; the high bits
551 /// exactly equal Hi. For example, if Op is a ppcf128 which was expanded
552 /// into two f64's, then this method returns the two f64's, with Lo being
553 /// equal to the lower 64 bits of Op, and Hi to the upper 64 bits.
554 void GetExpandedFloat(SDValue Op
, SDValue
&Lo
, SDValue
&Hi
);
555 void SetExpandedFloat(SDValue Op
, SDValue Lo
, SDValue Hi
);
557 // Float Result Expansion.
558 void ExpandFloatResult(SDNode
*N
, unsigned ResNo
);
559 void ExpandFloatRes_ConstantFP(SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
560 void ExpandFloatRes_FABS (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
561 void ExpandFloatRes_FMINNUM (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
562 void ExpandFloatRes_FMAXNUM (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
563 void ExpandFloatRes_FADD (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
564 void ExpandFloatRes_FCEIL (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
565 void ExpandFloatRes_FCOPYSIGN (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
566 void ExpandFloatRes_FCOS (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
567 void ExpandFloatRes_FDIV (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
568 void ExpandFloatRes_FEXP (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
569 void ExpandFloatRes_FEXP2 (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
570 void ExpandFloatRes_FFLOOR (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
571 void ExpandFloatRes_FLOG (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
572 void ExpandFloatRes_FLOG2 (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
573 void ExpandFloatRes_FLOG10 (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
574 void ExpandFloatRes_FMA (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
575 void ExpandFloatRes_FMUL (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
576 void ExpandFloatRes_FNEARBYINT(SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
577 void ExpandFloatRes_FNEG (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
578 void ExpandFloatRes_FP_EXTEND (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
579 void ExpandFloatRes_FPOW (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
580 void ExpandFloatRes_FPOWI (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
581 void ExpandFloatRes_FREM (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
582 void ExpandFloatRes_FRINT (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
583 void ExpandFloatRes_FROUND (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
584 void ExpandFloatRes_FSIN (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
585 void ExpandFloatRes_FSQRT (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
586 void ExpandFloatRes_FSUB (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
587 void ExpandFloatRes_FTRUNC (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
588 void ExpandFloatRes_LOAD (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
589 void ExpandFloatRes_XINT_TO_FP(SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
591 // Float Operand Expansion.
592 bool ExpandFloatOperand(SDNode
*N
, unsigned OpNo
);
593 SDValue
ExpandFloatOp_BR_CC(SDNode
*N
);
594 SDValue
ExpandFloatOp_FCOPYSIGN(SDNode
*N
);
595 SDValue
ExpandFloatOp_FP_ROUND(SDNode
*N
);
596 SDValue
ExpandFloatOp_FP_TO_SINT(SDNode
*N
);
597 SDValue
ExpandFloatOp_FP_TO_UINT(SDNode
*N
);
598 SDValue
ExpandFloatOp_LROUND(SDNode
*N
);
599 SDValue
ExpandFloatOp_LLROUND(SDNode
*N
);
600 SDValue
ExpandFloatOp_LRINT(SDNode
*N
);
601 SDValue
ExpandFloatOp_LLRINT(SDNode
*N
);
602 SDValue
ExpandFloatOp_SELECT_CC(SDNode
*N
);
603 SDValue
ExpandFloatOp_SETCC(SDNode
*N
);
604 SDValue
ExpandFloatOp_STORE(SDNode
*N
, unsigned OpNo
);
606 void FloatExpandSetCCOperands(SDValue
&NewLHS
, SDValue
&NewRHS
,
607 ISD::CondCode
&CCCode
, const SDLoc
&dl
);
609 //===--------------------------------------------------------------------===//
610 // Float promotion support: LegalizeFloatTypes.cpp
611 //===--------------------------------------------------------------------===//
613 SDValue
GetPromotedFloat(SDValue Op
) {
614 TableId
&PromotedId
= PromotedFloats
[getTableId(Op
)];
615 SDValue PromotedOp
= getSDValue(PromotedId
);
616 assert(PromotedOp
.getNode() && "Operand wasn't promoted?");
619 void SetPromotedFloat(SDValue Op
, SDValue Result
);
621 void PromoteFloatResult(SDNode
*N
, unsigned ResNo
);
622 SDValue
PromoteFloatRes_BITCAST(SDNode
*N
);
623 SDValue
PromoteFloatRes_BinOp(SDNode
*N
);
624 SDValue
PromoteFloatRes_ConstantFP(SDNode
*N
);
625 SDValue
PromoteFloatRes_EXTRACT_VECTOR_ELT(SDNode
*N
);
626 SDValue
PromoteFloatRes_FCOPYSIGN(SDNode
*N
);
627 SDValue
PromoteFloatRes_FMAD(SDNode
*N
);
628 SDValue
PromoteFloatRes_FPOWI(SDNode
*N
);
629 SDValue
PromoteFloatRes_FP_ROUND(SDNode
*N
);
630 SDValue
PromoteFloatRes_LOAD(SDNode
*N
);
631 SDValue
PromoteFloatRes_SELECT(SDNode
*N
);
632 SDValue
PromoteFloatRes_SELECT_CC(SDNode
*N
);
633 SDValue
PromoteFloatRes_UnaryOp(SDNode
*N
);
634 SDValue
PromoteFloatRes_UNDEF(SDNode
*N
);
635 SDValue
BitcastToInt_ATOMIC_SWAP(SDNode
*N
);
636 SDValue
PromoteFloatRes_XINT_TO_FP(SDNode
*N
);
638 bool PromoteFloatOperand(SDNode
*N
, unsigned OpNo
);
639 SDValue
PromoteFloatOp_BITCAST(SDNode
*N
, unsigned OpNo
);
640 SDValue
PromoteFloatOp_FCOPYSIGN(SDNode
*N
, unsigned OpNo
);
641 SDValue
PromoteFloatOp_FP_EXTEND(SDNode
*N
, unsigned OpNo
);
642 SDValue
PromoteFloatOp_FP_TO_XINT(SDNode
*N
, unsigned OpNo
);
643 SDValue
PromoteFloatOp_STORE(SDNode
*N
, unsigned OpNo
);
644 SDValue
PromoteFloatOp_SELECT_CC(SDNode
*N
, unsigned OpNo
);
645 SDValue
PromoteFloatOp_SETCC(SDNode
*N
, unsigned OpNo
);
647 //===--------------------------------------------------------------------===//
648 // Scalarization Support: LegalizeVectorTypes.cpp
649 //===--------------------------------------------------------------------===//
651 /// Given a processed one-element vector Op which was scalarized to its
652 /// element type, this returns the element. For example, if Op is a v1i32,
653 /// Op = < i32 val >, this method returns val, an i32.
654 SDValue
GetScalarizedVector(SDValue Op
) {
655 TableId
&ScalarizedId
= ScalarizedVectors
[getTableId(Op
)];
656 SDValue ScalarizedOp
= getSDValue(ScalarizedId
);
657 assert(ScalarizedOp
.getNode() && "Operand wasn't scalarized?");
660 void SetScalarizedVector(SDValue Op
, SDValue Result
);
662 // Vector Result Scalarization: <1 x ty> -> ty.
663 void ScalarizeVectorResult(SDNode
*N
, unsigned ResNo
);
664 SDValue
ScalarizeVecRes_MERGE_VALUES(SDNode
*N
, unsigned ResNo
);
665 SDValue
ScalarizeVecRes_BinOp(SDNode
*N
);
666 SDValue
ScalarizeVecRes_TernaryOp(SDNode
*N
);
667 SDValue
ScalarizeVecRes_UnaryOp(SDNode
*N
);
668 SDValue
ScalarizeVecRes_StrictFPOp(SDNode
*N
);
669 SDValue
ScalarizeVecRes_OverflowOp(SDNode
*N
, unsigned ResNo
);
670 SDValue
ScalarizeVecRes_InregOp(SDNode
*N
);
671 SDValue
ScalarizeVecRes_VecInregOp(SDNode
*N
);
673 SDValue
ScalarizeVecRes_BITCAST(SDNode
*N
);
674 SDValue
ScalarizeVecRes_BUILD_VECTOR(SDNode
*N
);
675 SDValue
ScalarizeVecRes_EXTRACT_SUBVECTOR(SDNode
*N
);
676 SDValue
ScalarizeVecRes_FP_ROUND(SDNode
*N
);
677 SDValue
ScalarizeVecRes_STRICT_FP_ROUND(SDNode
*N
);
678 SDValue
ScalarizeVecRes_FPOWI(SDNode
*N
);
679 SDValue
ScalarizeVecRes_INSERT_VECTOR_ELT(SDNode
*N
);
680 SDValue
ScalarizeVecRes_LOAD(LoadSDNode
*N
);
681 SDValue
ScalarizeVecRes_SCALAR_TO_VECTOR(SDNode
*N
);
682 SDValue
ScalarizeVecRes_VSELECT(SDNode
*N
);
683 SDValue
ScalarizeVecRes_SELECT(SDNode
*N
);
684 SDValue
ScalarizeVecRes_SELECT_CC(SDNode
*N
);
685 SDValue
ScalarizeVecRes_SETCC(SDNode
*N
);
686 SDValue
ScalarizeVecRes_UNDEF(SDNode
*N
);
687 SDValue
ScalarizeVecRes_VECTOR_SHUFFLE(SDNode
*N
);
689 SDValue
ScalarizeVecRes_MULFIX(SDNode
*N
);
691 // Vector Operand Scalarization: <1 x ty> -> ty.
692 bool ScalarizeVectorOperand(SDNode
*N
, unsigned OpNo
);
693 SDValue
ScalarizeVecOp_BITCAST(SDNode
*N
);
694 SDValue
ScalarizeVecOp_UnaryOp(SDNode
*N
);
695 SDValue
ScalarizeVecOp_UnaryOp_StrictFP(SDNode
*N
);
696 SDValue
ScalarizeVecOp_CONCAT_VECTORS(SDNode
*N
);
697 SDValue
ScalarizeVecOp_EXTRACT_VECTOR_ELT(SDNode
*N
);
698 SDValue
ScalarizeVecOp_VSELECT(SDNode
*N
);
699 SDValue
ScalarizeVecOp_VSETCC(SDNode
*N
);
700 SDValue
ScalarizeVecOp_STORE(StoreSDNode
*N
, unsigned OpNo
);
701 SDValue
ScalarizeVecOp_FP_ROUND(SDNode
*N
, unsigned OpNo
);
702 SDValue
ScalarizeVecOp_STRICT_FP_ROUND(SDNode
*N
, unsigned OpNo
);
703 SDValue
ScalarizeVecOp_VECREDUCE(SDNode
*N
);
705 //===--------------------------------------------------------------------===//
706 // Vector Splitting Support: LegalizeVectorTypes.cpp
707 //===--------------------------------------------------------------------===//
709 /// Given a processed vector Op which was split into vectors of half the size,
710 /// this method returns the halves. The first elements of Op coincide with the
711 /// elements of Lo; the remaining elements of Op coincide with the elements of
712 /// Hi: Op is what you would get by concatenating Lo and Hi.
713 /// For example, if Op is a v8i32 that was split into two v4i32's, then this
714 /// method returns the two v4i32's, with Lo corresponding to the first 4
715 /// elements of Op, and Hi to the last 4 elements.
716 void GetSplitVector(SDValue Op
, SDValue
&Lo
, SDValue
&Hi
);
717 void SetSplitVector(SDValue Op
, SDValue Lo
, SDValue Hi
);
719 // Vector Result Splitting: <128 x ty> -> 2 x <64 x ty>.
720 void SplitVectorResult(SDNode
*N
, unsigned ResNo
);
721 void SplitVecRes_BinOp(SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
722 void SplitVecRes_TernaryOp(SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
723 void SplitVecRes_UnaryOp(SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
724 void SplitVecRes_ExtendOp(SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
725 void SplitVecRes_InregOp(SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
726 void SplitVecRes_ExtVecInRegOp(SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
727 void SplitVecRes_StrictFPOp(SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
728 void SplitVecRes_OverflowOp(SDNode
*N
, unsigned ResNo
,
729 SDValue
&Lo
, SDValue
&Hi
);
731 void SplitVecRes_MULFIX(SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
733 void SplitVecRes_BITCAST(SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
734 void SplitVecRes_BUILD_VECTOR(SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
735 void SplitVecRes_CONCAT_VECTORS(SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
736 void SplitVecRes_EXTRACT_SUBVECTOR(SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
737 void SplitVecRes_INSERT_SUBVECTOR(SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
738 void SplitVecRes_FPOWI(SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
739 void SplitVecRes_FCOPYSIGN(SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
740 void SplitVecRes_INSERT_VECTOR_ELT(SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
741 void SplitVecRes_LOAD(LoadSDNode
*LD
, SDValue
&Lo
, SDValue
&Hi
);
742 void SplitVecRes_MLOAD(MaskedLoadSDNode
*MLD
, SDValue
&Lo
, SDValue
&Hi
);
743 void SplitVecRes_MGATHER(MaskedGatherSDNode
*MGT
, SDValue
&Lo
, SDValue
&Hi
);
744 void SplitVecRes_SCALAR_TO_VECTOR(SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
745 void SplitVecRes_SETCC(SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
746 void SplitVecRes_VECTOR_SHUFFLE(ShuffleVectorSDNode
*N
, SDValue
&Lo
,
748 void SplitVecRes_VAARG(SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
750 // Vector Operand Splitting: <128 x ty> -> 2 x <64 x ty>.
751 bool SplitVectorOperand(SDNode
*N
, unsigned OpNo
);
752 SDValue
SplitVecOp_VSELECT(SDNode
*N
, unsigned OpNo
);
753 SDValue
SplitVecOp_VECREDUCE(SDNode
*N
, unsigned OpNo
);
754 SDValue
SplitVecOp_UnaryOp(SDNode
*N
);
755 SDValue
SplitVecOp_TruncateHelper(SDNode
*N
);
757 SDValue
SplitVecOp_BITCAST(SDNode
*N
);
758 SDValue
SplitVecOp_EXTRACT_SUBVECTOR(SDNode
*N
);
759 SDValue
SplitVecOp_EXTRACT_VECTOR_ELT(SDNode
*N
);
760 SDValue
SplitVecOp_ExtVecInRegOp(SDNode
*N
);
761 SDValue
SplitVecOp_STORE(StoreSDNode
*N
, unsigned OpNo
);
762 SDValue
SplitVecOp_MSTORE(MaskedStoreSDNode
*N
, unsigned OpNo
);
763 SDValue
SplitVecOp_MSCATTER(MaskedScatterSDNode
*N
, unsigned OpNo
);
764 SDValue
SplitVecOp_MGATHER(MaskedGatherSDNode
*MGT
, unsigned OpNo
);
765 SDValue
SplitVecOp_CONCAT_VECTORS(SDNode
*N
);
766 SDValue
SplitVecOp_VSETCC(SDNode
*N
);
767 SDValue
SplitVecOp_FP_ROUND(SDNode
*N
);
768 SDValue
SplitVecOp_FCOPYSIGN(SDNode
*N
);
770 //===--------------------------------------------------------------------===//
771 // Vector Widening Support: LegalizeVectorTypes.cpp
772 //===--------------------------------------------------------------------===//
774 /// Given a processed vector Op which was widened into a larger vector, this
775 /// method returns the larger vector. The elements of the returned vector
776 /// consist of the elements of Op followed by elements containing rubbish.
777 /// For example, if Op is a v2i32 that was widened to a v4i32, then this
778 /// method returns a v4i32 for which the first two elements are the same as
779 /// those of Op, while the last two elements contain rubbish.
780 SDValue
GetWidenedVector(SDValue Op
) {
781 TableId
&WidenedId
= WidenedVectors
[getTableId(Op
)];
782 SDValue WidenedOp
= getSDValue(WidenedId
);
783 assert(WidenedOp
.getNode() && "Operand wasn't widened?");
786 void SetWidenedVector(SDValue Op
, SDValue Result
);
788 // Widen Vector Result Promotion.
789 void WidenVectorResult(SDNode
*N
, unsigned ResNo
);
790 SDValue
WidenVecRes_MERGE_VALUES(SDNode
* N
, unsigned ResNo
);
791 SDValue
WidenVecRes_BITCAST(SDNode
* N
);
792 SDValue
WidenVecRes_BUILD_VECTOR(SDNode
* N
);
793 SDValue
WidenVecRes_CONCAT_VECTORS(SDNode
* N
);
794 SDValue
WidenVecRes_EXTEND_VECTOR_INREG(SDNode
* N
);
795 SDValue
WidenVecRes_EXTRACT_SUBVECTOR(SDNode
* N
);
796 SDValue
WidenVecRes_INSERT_VECTOR_ELT(SDNode
* N
);
797 SDValue
WidenVecRes_LOAD(SDNode
* N
);
798 SDValue
WidenVecRes_MLOAD(MaskedLoadSDNode
* N
);
799 SDValue
WidenVecRes_MGATHER(MaskedGatherSDNode
* N
);
800 SDValue
WidenVecRes_SCALAR_TO_VECTOR(SDNode
* N
);
801 SDValue
WidenVecRes_SELECT(SDNode
* N
);
802 SDValue
WidenVSELECTAndMask(SDNode
*N
);
803 SDValue
WidenVecRes_SELECT_CC(SDNode
* N
);
804 SDValue
WidenVecRes_SETCC(SDNode
* N
);
805 SDValue
WidenVecRes_UNDEF(SDNode
*N
);
806 SDValue
WidenVecRes_VECTOR_SHUFFLE(ShuffleVectorSDNode
*N
);
808 SDValue
WidenVecRes_Ternary(SDNode
*N
);
809 SDValue
WidenVecRes_Binary(SDNode
*N
);
810 SDValue
WidenVecRes_BinaryCanTrap(SDNode
*N
);
811 SDValue
WidenVecRes_BinaryWithExtraScalarOp(SDNode
*N
);
812 SDValue
WidenVecRes_StrictFP(SDNode
*N
);
813 SDValue
WidenVecRes_OverflowOp(SDNode
*N
, unsigned ResNo
);
814 SDValue
WidenVecRes_Convert(SDNode
*N
);
815 SDValue
WidenVecRes_Convert_StrictFP(SDNode
*N
);
816 SDValue
WidenVecRes_FCOPYSIGN(SDNode
*N
);
817 SDValue
WidenVecRes_POWI(SDNode
*N
);
818 SDValue
WidenVecRes_Shift(SDNode
*N
);
819 SDValue
WidenVecRes_Unary(SDNode
*N
);
820 SDValue
WidenVecRes_InregOp(SDNode
*N
);
822 // Widen Vector Operand.
823 bool WidenVectorOperand(SDNode
*N
, unsigned OpNo
);
824 SDValue
WidenVecOp_BITCAST(SDNode
*N
);
825 SDValue
WidenVecOp_CONCAT_VECTORS(SDNode
*N
);
826 SDValue
WidenVecOp_EXTEND(SDNode
*N
);
827 SDValue
WidenVecOp_EXTRACT_VECTOR_ELT(SDNode
*N
);
828 SDValue
WidenVecOp_EXTRACT_SUBVECTOR(SDNode
*N
);
829 SDValue
WidenVecOp_STORE(SDNode
* N
);
830 SDValue
WidenVecOp_MSTORE(SDNode
* N
, unsigned OpNo
);
831 SDValue
WidenVecOp_MGATHER(SDNode
* N
, unsigned OpNo
);
832 SDValue
WidenVecOp_MSCATTER(SDNode
* N
, unsigned OpNo
);
833 SDValue
WidenVecOp_SETCC(SDNode
* N
);
834 SDValue
WidenVecOp_VSELECT(SDNode
*N
);
836 SDValue
WidenVecOp_Convert(SDNode
*N
);
837 SDValue
WidenVecOp_FCOPYSIGN(SDNode
*N
);
838 SDValue
WidenVecOp_VECREDUCE(SDNode
*N
);
840 /// Helper function to generate a set of operations to perform
841 /// a vector operation for a wider type.
843 SDValue
UnrollVectorOp_StrictFP(SDNode
*N
, unsigned ResNE
);
845 //===--------------------------------------------------------------------===//
846 // Vector Widening Utilities Support: LegalizeVectorTypes.cpp
847 //===--------------------------------------------------------------------===//
849 /// Helper function to generate a set of loads to load a vector with a
850 /// resulting wider type. It takes:
851 /// LdChain: list of chains for the load to be generated.
852 /// Ld: load to widen
853 SDValue
GenWidenVectorLoads(SmallVectorImpl
<SDValue
> &LdChain
,
856 /// Helper function to generate a set of extension loads to load a vector with
857 /// a resulting wider type. It takes:
858 /// LdChain: list of chains for the load to be generated.
859 /// Ld: load to widen
860 /// ExtType: extension element type
861 SDValue
GenWidenVectorExtLoads(SmallVectorImpl
<SDValue
> &LdChain
,
862 LoadSDNode
*LD
, ISD::LoadExtType ExtType
);
864 /// Helper function to generate a set of stores to store a widen vector into
865 /// non-widen memory.
866 /// StChain: list of chains for the stores we have generated
867 /// ST: store of a widen value
868 void GenWidenVectorStores(SmallVectorImpl
<SDValue
> &StChain
, StoreSDNode
*ST
);
870 /// Helper function to generate a set of stores to store a truncate widen
871 /// vector into non-widen memory.
872 /// StChain: list of chains for the stores we have generated
873 /// ST: store of a widen value
874 void GenWidenVectorTruncStores(SmallVectorImpl
<SDValue
> &StChain
,
877 /// Modifies a vector input (widen or narrows) to a vector of NVT. The
878 /// input vector must have the same element type as NVT.
879 /// When FillWithZeroes is "on" the vector will be widened with zeroes.
880 /// By default, the vector will be widened with undefined values.
881 SDValue
ModifyToType(SDValue InOp
, EVT NVT
, bool FillWithZeroes
= false);
883 /// Return a mask of vector type MaskVT to replace InMask. Also adjust
884 /// MaskVT to ToMaskVT if needed with vector extension or truncation.
885 SDValue
convertMask(SDValue InMask
, EVT MaskVT
, EVT ToMaskVT
);
887 //===--------------------------------------------------------------------===//
888 // Generic Splitting: LegalizeTypesGeneric.cpp
889 //===--------------------------------------------------------------------===//
891 // Legalization methods which only use that the illegal type is split into two
892 // not necessarily identical types. As such they can be used for splitting
893 // vectors and expanding integers and floats.
895 void GetSplitOp(SDValue Op
, SDValue
&Lo
, SDValue
&Hi
) {
896 if (Op
.getValueType().isVector())
897 GetSplitVector(Op
, Lo
, Hi
);
898 else if (Op
.getValueType().isInteger())
899 GetExpandedInteger(Op
, Lo
, Hi
);
901 GetExpandedFloat(Op
, Lo
, Hi
);
904 /// Use ISD::EXTRACT_ELEMENT nodes to extract the low and high parts of the
906 void GetPairElements(SDValue Pair
, SDValue
&Lo
, SDValue
&Hi
);
908 // Generic Result Splitting.
909 void SplitRes_MERGE_VALUES(SDNode
*N
, unsigned ResNo
,
910 SDValue
&Lo
, SDValue
&Hi
);
911 void SplitRes_SELECT (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
912 void SplitRes_SELECT_CC (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
913 void SplitRes_UNDEF (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
915 void SplitVSETCC(const SDNode
*N
);
917 //===--------------------------------------------------------------------===//
918 // Generic Expansion: LegalizeTypesGeneric.cpp
919 //===--------------------------------------------------------------------===//
921 // Legalization methods which only use that the illegal type is split into two
922 // identical types of half the size, and that the Lo/Hi part is stored first
923 // in memory on little/big-endian machines, followed by the Hi/Lo part. As
924 // such they can be used for expanding integers and floats.
926 void GetExpandedOp(SDValue Op
, SDValue
&Lo
, SDValue
&Hi
) {
927 if (Op
.getValueType().isInteger())
928 GetExpandedInteger(Op
, Lo
, Hi
);
930 GetExpandedFloat(Op
, Lo
, Hi
);
934 /// This function will split the integer \p Op into \p NumElements
935 /// operations of type \p EltVT and store them in \p Ops.
936 void IntegerToVector(SDValue Op
, unsigned NumElements
,
937 SmallVectorImpl
<SDValue
> &Ops
, EVT EltVT
);
939 // Generic Result Expansion.
940 void ExpandRes_MERGE_VALUES (SDNode
*N
, unsigned ResNo
,
941 SDValue
&Lo
, SDValue
&Hi
);
942 void ExpandRes_BITCAST (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
943 void ExpandRes_BUILD_PAIR (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
944 void ExpandRes_EXTRACT_ELEMENT (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
945 void ExpandRes_EXTRACT_VECTOR_ELT(SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
946 void ExpandRes_NormalLoad (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
947 void ExpandRes_VAARG (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
949 // Generic Operand Expansion.
950 SDValue
ExpandOp_BITCAST (SDNode
*N
);
951 SDValue
ExpandOp_BUILD_VECTOR (SDNode
*N
);
952 SDValue
ExpandOp_EXTRACT_ELEMENT (SDNode
*N
);
953 SDValue
ExpandOp_INSERT_VECTOR_ELT(SDNode
*N
);
954 SDValue
ExpandOp_SCALAR_TO_VECTOR (SDNode
*N
);
955 SDValue
ExpandOp_NormalStore (SDNode
*N
, unsigned OpNo
);
958 } // end namespace llvm.