[ThinLTO] Add code comment. NFC
[llvm-complete.git] / test / MC / ARM / ldr-pseudo-unpredictable.s
blob104d0e3642dd163b6cc434af180a3a6baee5b5a7
1 @RUN: llvm-mc -triple armv5-unknown-linux-gnueabi %s | FileCheck --check-prefix=CHECK-ARM %s
2 @RUN: llvm-mc -triple thumbv7-unknown-linux-gnueabi %s 2>&1 | FileCheck --check-prefix=CHECK-T2 %s
3 @RUN: not llvm-mc -triple thumbv5-unknown-linux-gnueabi %s 2>&1 | FileCheck --check-prefix=CHECK-NONE %s
4 @RUN: llvm-mc -triple armv5-base-apple-darwin %s | FileCheck --check-prefix=CHECK-DARWIN-ARM %s
5 @RUN: llvm-mc -triple thumbv7-base-apple-darwin %s 2>&1 | FileCheck --check-prefix=CHECK-DARWIN-T2 %s
6 @RUN: not llvm-mc -triple thumbv5-base.apple.darwin %s 2>&1 | FileCheck --check-prefix=CHECK-NONE %s
8 @ We dont't do the transformation for rt = sp or pc
9 @ as it is unpredictable for many of the MOV encondings
10 ldr pc, = 0x4
11 @ CHECK-ARM: ldr pc, .Ltmp[[TMP0:[0-9]+]]
12 @ CHECK-DARWIN-ARM: ldr pc, Ltmp0
13 @ CHECK-T2: ldr.w pc, .Ltmp[[TMP0:[0-9]+]]
14 @ CHECK-DARWIN-T2: ldr.w pc, Ltmp0
15 @ CHECK-NONE: instruction requires: thumb2
16 ldr sp, = 0x8
17 @ CHECK-ARM: ldr sp, .Ltmp[[TMP1:[0-9]+]]
18 @ CHECK-DARWIN-ARM: ldr sp, Ltmp1
19 @ CHECK-T2: ldr.w sp, .Ltmp[[TMP1:[0-9]+]]
20 @ CHECK-DARWIN-T2: ldr.w sp, Ltmp1
21 @ CHECK-NONE: instruction requires: thumb2