[ThinLTO] Add code comment. NFC
[llvm-complete.git] / test / MC / ARM / thumb_rewrites.s
blob06c77e89862fd7009f3f7649664e37f8df214e8d
1 @ RUN: llvm-mc -triple thumbv6m -show-encoding < %s | FileCheck %s
2 @ RUN: llvm-mc -triple thumbv7m -show-encoding < %s | FileCheck %s
4 adds r1, r1, #3
5 @ CHECK: adds r1, r1, #3 @ encoding: [0xc9,0x1c]
7 adds r1, #3
8 @ CHECK: adds r1, #3 @ encoding: [0x03,0x31]
10 adds r0, r0, #8
11 @ CHECK: adds r0, #8 @ encoding: [0x08,0x30]
13 adds r0, r0, r0
14 @ CHECK: adds r0, r0, r0 @ encoding: [0x00,0x18]
16 add r0, r0, r8
17 @ CHECK: add r0, r8 @ encoding: [0x40,0x44]
19 add r1, r8, r1
20 @ CHECK: add r1, r8 @ encoding: [0x41,0x44]
22 add sp, sp, r0
23 @ CHECK: add sp, r0 @ encoding: [0x85,0x44]
25 add r4, sp, r4
26 @ CHECK: add r4, sp, r4 @ encoding: [0x6c,0x44]
28 add r4, r4, sp
29 @ CHECK: add r4, sp @ encoding: [0x6c,0x44]
31 add sp, sp, #32
32 @ FIXME: ARMARM says 'add sp, sp, #32'
33 @ CHECK: add sp, #32 @ encoding: [0x08,0xb0]
35 add r5, sp, #1016
36 @ CHECK: add r5, sp, #1016 @ encoding: [0xfe,0xad]
38 add r0, r0, r1
39 @ CHECK: add r0, r1 @ encoding: [0x08,0x44]
41 add r2, r2, r3
42 @ CHECK: add r2, r3 @ encoding: [0x1a,0x44]
44 subs r0, r0, r0
45 @ CHECK: subs r0, r0, r0 @ encoding: [0x00,0x1a]
47 subs r3, r3, #5
48 @ CHECK: subs r3, r3, #5 @ encoding: [0x5b,0x1f]
50 subs r3, #5
51 @ CHECK: subs r3, #5 @ encoding: [0x05,0x3b]
53 subs r2, r2, #8
54 @ CHECK: subs r2, #8 @ encoding: [0x08,0x3a]
56 sub sp, sp, #16
57 @ CHECK: sub sp, #16 @ encoding: [0x84,0xb0]
59 ands r0, r1, r0
60 @ CHECK: ands r0, r1 @ encoding: [0x08,0x40]
62 ands r0, r0, r1
63 @ CHECK: ands r0, r1 @ encoding: [0x08,0x40]
65 eors r0, r0, r1
66 @ CHECK: eors r0, r1 @ encoding: [0x48,0x40]
68 eors r0, r1, r0
69 @ CHECK: eors r0, r1 @ encoding: [0x48,0x40]
71 lsls r0, r0, r1
72 @ CHECK: lsls r0, r1 @ encoding: [0x88,0x40]
74 lsrs r0, r0, r1
75 @ CHECK: lsrs r0, r1 @ encoding: [0xc8,0x40]
77 asrs r0, r0, r1
78 @ CHECK: asrs r0, r1 @ encoding: [0x08,0x41]
80 adcs r0, r0, r1
81 @ CHECK: adcs r0, r1 @ encoding: [0x48,0x41]
83 adcs r0, r1, r0
84 @ CHECK: adcs r0, r1 @ encoding: [0x48,0x41]
86 sbcs r0, r0, r1
87 @ CHECK: sbcs r0, r1 @ encoding: [0x88,0x41]
89 rors r0, r0, r1
90 @ CHECK: rors r0, r1 @ encoding: [0xc8,0x41]
92 orrs r0, r0, r1
93 @ CHECK: orrs r0, r1 @ encoding: [0x08,0x43]
95 orrs r0, r1, r0
96 @ CHECK: orrs r0, r1 @ encoding: [0x08,0x43]
98 bics r0, r0, r1
99 @ CHECK: bics r0, r1 @ encoding: [0x88,0x43]