include/llvm/CodeGen/LiveStacks.h

   1 //===- LiveStacks.h - Live Stack Slot Analysis ------------------*- C++ -*-===//
   2 //
   3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
   4 // See https://llvm.org/LICENSE.txt for license information.
   5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
   6 //
   7 //===----------------------------------------------------------------------===//
   8 //
   9 // This file implements the live stack slot analysis pass. It is analogous to
  10 // live interval analysis except it's analyzing liveness of stack slots rather
  11 // than registers.
  12 //
  13 //===----------------------------------------------------------------------===//
  14
  15 #ifndef LLVM_CODEGEN_LIVESTACKS_H
  16 #define LLVM_CODEGEN_LIVESTACKS_H
  17
  18 #include "llvm/CodeGen/LiveInterval.h"
  19 #include "llvm/CodeGen/MachineFunctionPass.h"
  20 #include "llvm/Pass.h"
  21 #include <cassert>
  22 #include <map>
  23 #include <unordered_map>
  24
  25 namespace llvm {
  26
  27 class TargetRegisterClass;
  28 class TargetRegisterInfo;
  29
  30 class LiveStacks : public MachineFunctionPass {
  31   const TargetRegisterInfo *TRI;
  32
  33   /// Special pool allocator for VNInfo's (LiveInterval val#).
  34   ///
  35   VNInfo::Allocator VNInfoAllocator;
  36
  37   /// S2IMap - Stack slot indices to live interval mapping.
  38   using SS2IntervalMap = std::unordered_map<int, LiveInterval>;
  39   SS2IntervalMap S2IMap;
  40
  41   /// S2RCMap - Stack slot indices to register class mapping.
  42   std::map<int, const TargetRegisterClass *> S2RCMap;
  43
  44 public:
  45   static char ID; // Pass identification, replacement for typeid
  46
  47   LiveStacks() : MachineFunctionPass(ID) {
  48     initializeLiveStacksPass(*PassRegistry::getPassRegistry());
  49   }
  50
  51   using iterator = SS2IntervalMap::iterator;
  52   using const_iterator = SS2IntervalMap::const_iterator;
  53
  54   const_iterator begin() const { return S2IMap.begin(); }
  55   const_iterator end() const { return S2IMap.end(); }
  56   iterator begin() { return S2IMap.begin(); }
  57   iterator end() { return S2IMap.end(); }
  58
  59   unsigned getNumIntervals() const { return (unsigned)S2IMap.size(); }
  60
  61   LiveInterval &getOrCreateInterval(int Slot, const TargetRegisterClass *RC);
  62
  63   LiveInterval &getInterval(int Slot) {
  64     assert(Slot >= 0 && "Spill slot indice must be >= 0");
  65     SS2IntervalMap::iterator I = S2IMap.find(Slot);
  66     assert(I != S2IMap.end() && "Interval does not exist for stack slot");
  67     return I->second;
  68   }
  69
  70   const LiveInterval &getInterval(int Slot) const {
  71     assert(Slot >= 0 && "Spill slot indice must be >= 0");
  72     SS2IntervalMap::const_iterator I = S2IMap.find(Slot);
  73     assert(I != S2IMap.end() && "Interval does not exist for stack slot");
  74     return I->second;
  75   }
  76
  77   bool hasInterval(int Slot) const { return S2IMap.count(Slot); }
  78
  79   const TargetRegisterClass *getIntervalRegClass(int Slot) const {
  80     assert(Slot >= 0 && "Spill slot indice must be >= 0");
  81     std::map<int, const TargetRegisterClass *>::const_iterator I =
  82         S2RCMap.find(Slot);
  83     assert(I != S2RCMap.end() &&
  84            "Register class info does not exist for stack slot");
  85     return I->second;
  86   }
  87
  88   VNInfo::Allocator &getVNInfoAllocator() { return VNInfoAllocator; }
  89
  90   void getAnalysisUsage(AnalysisUsage &AU) const override;
  91   void releaseMemory() override;
  92
  93   /// runOnMachineFunction - pass entry point
  94   bool runOnMachineFunction(MachineFunction &) override;
  95
  96   /// print - Implement the dump method.
  97   void print(raw_ostream &O, const Module * = nullptr) const override;
  98 };
  99
 100 } // end namespace llvm
 101
 102 #endif