include/llvm/MCA/Stages/RetireStage.h

   1 //===---------------------- RetireStage.h -----------------------*- C++ -*-===//
   2 //
   3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
   4 // See https://llvm.org/LICENSE.txt for license information.
   5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
   6 //
   7 //===----------------------------------------------------------------------===//
   8 /// \file
   9 ///
  10 /// This file defines the retire stage of a default instruction pipeline.
  11 /// The RetireStage represents the process logic that interacts with the
  12 /// simulated RetireControlUnit hardware.
  13 //
  14 //===----------------------------------------------------------------------===//
  15
  16 #ifndef LLVM_MCA_RETIRE_STAGE_H
  17 #define LLVM_MCA_RETIRE_STAGE_H
  18
  19 #include "llvm/MCA/HardwareUnits/LSUnit.h"
  20 #include "llvm/MCA/HardwareUnits/RegisterFile.h"
  21 #include "llvm/MCA/HardwareUnits/RetireControlUnit.h"
  22 #include "llvm/MCA/Stages/Stage.h"
  23
  24 namespace llvm {
  25 namespace mca {
  26
  27 class RetireStage final : public Stage {
  28   // Owner will go away when we move listeners/eventing to the stages.
  29   RetireControlUnit &RCU;
  30   RegisterFile &PRF;
  31   LSUnitBase &LSU;
  32
  33   RetireStage(const RetireStage &Other) = delete;
  34   RetireStage &operator=(const RetireStage &Other) = delete;
  35
  36 public:
  37   RetireStage(RetireControlUnit &R, RegisterFile &F, LSUnitBase &LS)
  38       : Stage(), RCU(R), PRF(F), LSU(LS) {}
  39
  40   bool hasWorkToComplete() const override { return !RCU.isEmpty(); }
  41   Error cycleStart() override;
  42   Error execute(InstRef &IR) override;
  43   void notifyInstructionRetired(const InstRef &IR) const;
  44 };
  45
  46 } // namespace mca
  47 } // namespace llvm
  48
  49 #endif // LLVM_MCA_RETIRE_STAGE_H