1 //===- llvm/CodeGen/DwarfExpression.h - Dwarf Compile Unit ------*- C++ -*-===//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 // This file contains support for writing dwarf compile unit.
11 //===----------------------------------------------------------------------===//
13 #ifndef LLVM_LIB_CODEGEN_ASMPRINTER_DWARFEXPRESSION_H
14 #define LLVM_LIB_CODEGEN_ASMPRINTER_DWARFEXPRESSION_H
16 #include "ByteStreamer.h"
17 #include "llvm/ADT/ArrayRef.h"
18 #include "llvm/ADT/None.h"
19 #include "llvm/ADT/Optional.h"
20 #include "llvm/ADT/SmallVector.h"
21 #include "llvm/IR/DebugInfoMetadata.h"
30 class DwarfCompileUnit
;
32 class TargetRegisterInfo
;
34 /// Holds a DIExpression and keeps track of how many operands have been consumed
36 class DIExpressionCursor
{
37 DIExpression::expr_op_iterator Start
, End
;
40 DIExpressionCursor(const DIExpression
*Expr
) {
45 Start
= Expr
->expr_op_begin();
46 End
= Expr
->expr_op_end();
49 DIExpressionCursor(ArrayRef
<uint64_t> Expr
)
50 : Start(Expr
.begin()), End(Expr
.end()) {}
52 DIExpressionCursor(const DIExpressionCursor
&) = default;
54 /// Consume one operation.
55 Optional
<DIExpression::ExprOperand
> take() {
61 /// Consume N operations.
62 void consume(unsigned N
) { std::advance(Start
, N
); }
64 /// Return the current operation.
65 Optional
<DIExpression::ExprOperand
> peek() const {
71 /// Return the next operation.
72 Optional
<DIExpression::ExprOperand
> peekNext() const {
76 auto Next
= Start
.getNext();
83 /// Determine whether there are any operations left in this expression.
84 operator bool() const { return Start
!= End
; }
86 DIExpression::expr_op_iterator
begin() const { return Start
; }
87 DIExpression::expr_op_iterator
end() const { return End
; }
89 /// Retrieve the fragment information, if any.
90 Optional
<DIExpression::FragmentInfo
> getFragmentInfo() const {
91 return DIExpression::getFragmentInfo(Start
, End
);
95 /// Base class containing the logic for constructing DWARF expressions
96 /// independently of whether they are emitted into a DIE or into a .debug_loc
99 /// Some DWARF operations, e.g. DW_OP_entry_value, need to calculate the size
100 /// of a succeeding DWARF block before the latter is emitted to the output.
101 /// To handle such cases, data can conditionally be emitted to a temporary
102 /// buffer, which can later on be committed to the main output. The size of the
103 /// temporary buffer is queryable, allowing for the size of the data to be
104 /// emitted before the data is committed.
105 class DwarfExpression
{
107 /// Holds information about all subregisters comprising a register location.
114 /// Whether we are currently emitting an entry value operation.
115 bool IsEmittingEntryValue
= false;
117 DwarfCompileUnit
&CU
;
119 /// The register location, if any.
120 SmallVector
<Register
, 2> DwarfRegs
;
122 /// Current Fragment Offset in Bits.
123 uint64_t OffsetInBits
= 0;
125 /// Sometimes we need to add a DW_OP_bit_piece to describe a subregister.
126 unsigned SubRegisterSizeInBits
: 16;
127 unsigned SubRegisterOffsetInBits
: 16;
129 /// The kind of location description being produced.
130 enum { Unknown
= 0, Register
, Memory
, Implicit
};
132 /// The flags of location description being produced.
133 enum { EntryValue
= 1, CallSiteParamValue
};
135 unsigned LocationKind
: 3;
136 unsigned LocationFlags
: 2;
137 unsigned DwarfVersion
: 4;
140 bool isUnknownLocation() const {
141 return LocationKind
== Unknown
;
144 bool isMemoryLocation() const {
145 return LocationKind
== Memory
;
148 bool isRegisterLocation() const {
149 return LocationKind
== Register
;
152 bool isImplicitLocation() const {
153 return LocationKind
== Implicit
;
156 bool isEntryValue() const {
157 return LocationFlags
& EntryValue
;
160 bool isParameterValue() {
161 return LocationFlags
& CallSiteParamValue
;
164 Optional
<uint8_t> TagOffset
;
167 /// Push a DW_OP_piece / DW_OP_bit_piece for emitting later, if one is needed
168 /// to represent a subregister.
169 void setSubRegisterPiece(unsigned SizeInBits
, unsigned OffsetInBits
) {
170 assert(SizeInBits
< 65536 && OffsetInBits
< 65536);
171 SubRegisterSizeInBits
= SizeInBits
;
172 SubRegisterOffsetInBits
= OffsetInBits
;
175 /// Add masking operations to stencil out a subregister.
176 void maskSubRegister();
178 /// Output a dwarf operand and an optional assembler comment.
179 virtual void emitOp(uint8_t Op
, const char *Comment
= nullptr) = 0;
181 /// Emit a raw signed value.
182 virtual void emitSigned(int64_t Value
) = 0;
184 /// Emit a raw unsigned value.
185 virtual void emitUnsigned(uint64_t Value
) = 0;
187 virtual void emitData1(uint8_t Value
) = 0;
189 virtual void emitBaseTypeRef(uint64_t Idx
) = 0;
191 /// Start emitting data to the temporary buffer. The data stored in the
192 /// temporary buffer can be committed to the main output using
193 /// commitTemporaryBuffer().
194 virtual void enableTemporaryBuffer() = 0;
196 /// Disable emission to the temporary buffer. This does not commit data
197 /// in the temporary buffer to the main output.
198 virtual void disableTemporaryBuffer() = 0;
200 /// Return the emitted size, in number of bytes, for the data stored in the
201 /// temporary buffer.
202 virtual unsigned getTemporaryBufferSize() = 0;
204 /// Commit the data stored in the temporary buffer to the main output.
205 virtual void commitTemporaryBuffer() = 0;
207 /// Emit a normalized unsigned constant.
208 void emitConstu(uint64_t Value
);
210 /// Return whether the given machine register is the frame register in the
211 /// current function.
212 virtual bool isFrameRegister(const TargetRegisterInfo
&TRI
, unsigned MachineReg
) = 0;
214 /// Emit a DW_OP_reg operation. Note that this is only legal inside a DWARF
215 /// register location description.
216 void addReg(int DwarfReg
, const char *Comment
= nullptr);
218 /// Emit a DW_OP_breg operation.
219 void addBReg(int DwarfReg
, int Offset
);
221 /// Emit DW_OP_fbreg <Offset>.
222 void addFBReg(int Offset
);
224 /// Emit a partial DWARF register operation.
226 /// \param MachineReg The register number.
227 /// \param MaxSize If the register must be composed from
228 /// sub-registers this is an upper bound
229 /// for how many bits the emitted DW_OP_piece
232 /// If size and offset is zero an operation for the entire register is
233 /// emitted: Some targets do not provide a DWARF register number for every
234 /// register. If this is the case, this function will attempt to emit a DWARF
235 /// register by emitting a fragment of a super-register or by piecing together
236 /// multiple subregisters that alias the register.
238 /// \return false if no DWARF register exists for MachineReg.
239 bool addMachineReg(const TargetRegisterInfo
&TRI
, unsigned MachineReg
,
240 unsigned MaxSize
= ~1U);
242 /// Emit a DW_OP_piece or DW_OP_bit_piece operation for a variable fragment.
243 /// \param OffsetInBits This is an optional offset into the location that
244 /// is at the top of the DWARF stack.
245 void addOpPiece(unsigned SizeInBits
, unsigned OffsetInBits
= 0);
247 /// Emit a shift-right dwarf operation.
248 void addShr(unsigned ShiftBy
);
250 /// Emit a bitwise and dwarf operation.
251 void addAnd(unsigned Mask
);
253 /// Emit a DW_OP_stack_value, if supported.
255 /// The proper way to describe a constant value is DW_OP_constu <const>,
256 /// DW_OP_stack_value. Unfortunately, DW_OP_stack_value was not available
257 /// until DWARF 4, so we will continue to generate DW_OP_constu <const> for
258 /// DWARF 2 and DWARF 3. Technically, this is incorrect since DW_OP_const
259 /// <const> actually describes a value at a constant address, not a constant
260 /// value. However, in the past there was no better way to describe a
261 /// constant value, so the producers and consumers started to rely on
262 /// heuristics to disambiguate the value vs. location status of the
263 /// expression. See PR21176 for more details.
264 void addStackValue();
266 /// Finalize an entry value by emitting its size operand, and committing the
267 /// DWARF block which has been emitted to the temporary buffer.
268 void finalizeEntryValue();
270 ~DwarfExpression() = default;
273 DwarfExpression(unsigned DwarfVersion
, DwarfCompileUnit
&CU
)
274 : CU(CU
), SubRegisterSizeInBits(0), SubRegisterOffsetInBits(0),
275 LocationKind(Unknown
), LocationFlags(Unknown
),
276 DwarfVersion(DwarfVersion
) {}
278 /// This needs to be called last to commit any pending changes.
281 /// Emit a signed constant.
282 void addSignedConstant(int64_t Value
);
284 /// Emit an unsigned constant.
285 void addUnsignedConstant(uint64_t Value
);
287 /// Emit an unsigned constant.
288 void addUnsignedConstant(const APInt
&Value
);
290 /// Lock this down to become a memory location description.
291 void setMemoryLocationKind() {
292 assert(isUnknownLocation());
293 LocationKind
= Memory
;
296 /// Lock this down to become an entry value location.
297 void setEntryValueFlag() {
298 LocationFlags
|= EntryValue
;
301 /// Lock this down to become a call site parameter location.
302 void setCallSiteParamValueFlag() {
303 LocationFlags
|= CallSiteParamValue
;
306 /// Emit a machine register location. As an optimization this may also consume
307 /// the prefix of a DwarfExpression if a more efficient representation for
308 /// combining the register location and the first operation exists.
310 /// \param FragmentOffsetInBits If this is one fragment out of a
312 /// location, this is the offset of the
313 /// fragment inside the entire variable.
314 /// \return false if no DWARF register exists
316 bool addMachineRegExpression(const TargetRegisterInfo
&TRI
,
317 DIExpressionCursor
&Expr
, unsigned MachineReg
,
318 unsigned FragmentOffsetInBits
= 0);
320 /// Begin emission of an entry value dwarf operation. The entry value's
321 /// first operand is the size of the DWARF block (its second operand),
322 /// which needs to be calculated at time of emission, so we don't emit
323 /// any operands here.
324 void beginEntryValueExpression(DIExpressionCursor
&ExprCursor
);
326 /// Emit all remaining operations in the DIExpressionCursor.
328 /// \param FragmentOffsetInBits If this is one fragment out of multiple
329 /// locations, this is the offset of the
330 /// fragment inside the entire variable.
331 void addExpression(DIExpressionCursor
&&Expr
,
332 unsigned FragmentOffsetInBits
= 0);
334 /// If applicable, emit an empty DW_OP_piece / DW_OP_bit_piece to advance to
335 /// the fragment described by \c Expr.
336 void addFragmentOffset(const DIExpression
*Expr
);
338 void emitLegacySExt(unsigned FromBits
);
339 void emitLegacyZExt(unsigned FromBits
);
342 /// DwarfExpression implementation for .debug_loc entries.
343 class DebugLocDwarfExpression final
: public DwarfExpression
{
346 SmallString
<32> Bytes
;
347 std::vector
<std::string
> Comments
;
348 BufferByteStreamer BS
;
350 TempBuffer(bool GenerateComments
) : BS(Bytes
, Comments
, GenerateComments
) {}
353 std::unique_ptr
<TempBuffer
> TmpBuf
;
354 BufferByteStreamer
&OutBS
;
355 bool IsBuffering
= false;
357 /// Return the byte streamer that currently is being emitted to.
358 ByteStreamer
&getActiveStreamer() { return IsBuffering
? TmpBuf
->BS
: OutBS
; }
360 void emitOp(uint8_t Op
, const char *Comment
= nullptr) override
;
361 void emitSigned(int64_t Value
) override
;
362 void emitUnsigned(uint64_t Value
) override
;
363 void emitData1(uint8_t Value
) override
;
364 void emitBaseTypeRef(uint64_t Idx
) override
;
366 void enableTemporaryBuffer() override
;
367 void disableTemporaryBuffer() override
;
368 unsigned getTemporaryBufferSize() override
;
369 void commitTemporaryBuffer() override
;
371 bool isFrameRegister(const TargetRegisterInfo
&TRI
,
372 unsigned MachineReg
) override
;
374 DebugLocDwarfExpression(unsigned DwarfVersion
, BufferByteStreamer
&BS
,
375 DwarfCompileUnit
&CU
)
376 : DwarfExpression(DwarfVersion
, CU
), OutBS(BS
) {}
379 /// DwarfExpression implementation for singular DW_AT_location.
380 class DIEDwarfExpression final
: public DwarfExpression
{
381 const AsmPrinter
&AP
;
384 bool IsBuffering
= false;
386 /// Return the DIE that currently is being emitted to.
387 DIELoc
&getActiveDIE() { return IsBuffering
? TmpDIE
: OutDIE
; }
389 void emitOp(uint8_t Op
, const char *Comment
= nullptr) override
;
390 void emitSigned(int64_t Value
) override
;
391 void emitUnsigned(uint64_t Value
) override
;
392 void emitData1(uint8_t Value
) override
;
393 void emitBaseTypeRef(uint64_t Idx
) override
;
395 void enableTemporaryBuffer() override
;
396 void disableTemporaryBuffer() override
;
397 unsigned getTemporaryBufferSize() override
;
398 void commitTemporaryBuffer() override
;
400 bool isFrameRegister(const TargetRegisterInfo
&TRI
,
401 unsigned MachineReg
) override
;
403 DIEDwarfExpression(const AsmPrinter
&AP
, DwarfCompileUnit
&CU
, DIELoc
&DIE
);
406 DwarfExpression::finalize();
411 } // end namespace llvm
413 #endif // LLVM_LIB_CODEGEN_ASMPRINTER_DWARFEXPRESSION_H