1 //===-- RISCVSubtarget.h - Define Subtarget for the RISCV -------*- C++ -*-===//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 // This file declares the RISCV specific subclass of TargetSubtargetInfo.
11 //===----------------------------------------------------------------------===//
13 #ifndef LLVM_LIB_TARGET_RISCV_RISCVSUBTARGET_H
14 #define LLVM_LIB_TARGET_RISCV_RISCVSUBTARGET_H
16 #include "RISCVFrameLowering.h"
17 #include "RISCVISelLowering.h"
18 #include "RISCVInstrInfo.h"
19 #include "Utils/RISCVBaseInfo.h"
20 #include "llvm/CodeGen/GlobalISel/CallLowering.h"
21 #include "llvm/CodeGen/GlobalISel/InstructionSelector.h"
22 #include "llvm/CodeGen/GlobalISel/LegalizerInfo.h"
23 #include "llvm/CodeGen/GlobalISel/RegisterBankInfo.h"
24 #include "llvm/CodeGen/SelectionDAGTargetInfo.h"
25 #include "llvm/CodeGen/TargetSubtargetInfo.h"
26 #include "llvm/IR/DataLayout.h"
27 #include "llvm/Target/TargetMachine.h"
29 #define GET_SUBTARGETINFO_HEADER
30 #include "RISCVGenSubtargetInfo.inc"
35 class RISCVSubtarget
: public RISCVGenSubtargetInfo
{
36 virtual void anchor();
37 bool HasStdExtM
= false;
38 bool HasStdExtA
= false;
39 bool HasStdExtF
= false;
40 bool HasStdExtD
= false;
41 bool HasStdExtC
= false;
44 bool EnableLinkerRelax
= false;
45 bool EnableRVCHintInstrs
= false;
47 MVT XLenVT
= MVT::i32
;
48 RISCVABI::ABI TargetABI
= RISCVABI::ABI_Unknown
;
49 RISCVFrameLowering FrameLowering
;
50 RISCVInstrInfo InstrInfo
;
51 RISCVRegisterInfo RegInfo
;
52 RISCVTargetLowering TLInfo
;
53 SelectionDAGTargetInfo TSInfo
;
55 /// Initializes using the passed in CPU and feature strings so that we can
56 /// use initializer lists for subtarget initialization.
57 RISCVSubtarget
&initializeSubtargetDependencies(const Triple
&TT
,
58 StringRef CPU
, StringRef FS
,
62 // Initializes the data members to match that of the specified triple.
63 RISCVSubtarget(const Triple
&TT
, StringRef CPU
, StringRef FS
,
64 StringRef ABIName
, const TargetMachine
&TM
);
66 // Parses features string setting specified subtarget options. The
67 // definition of this function is auto-generated by tblgen.
68 void ParseSubtargetFeatures(StringRef CPU
, StringRef FS
);
70 const RISCVFrameLowering
*getFrameLowering() const override
{
71 return &FrameLowering
;
73 const RISCVInstrInfo
*getInstrInfo() const override
{ return &InstrInfo
; }
74 const RISCVRegisterInfo
*getRegisterInfo() const override
{
77 const RISCVTargetLowering
*getTargetLowering() const override
{
80 const SelectionDAGTargetInfo
*getSelectionDAGInfo() const override
{
83 bool enableMachineScheduler() const override
{ return true; }
84 bool hasStdExtM() const { return HasStdExtM
; }
85 bool hasStdExtA() const { return HasStdExtA
; }
86 bool hasStdExtF() const { return HasStdExtF
; }
87 bool hasStdExtD() const { return HasStdExtD
; }
88 bool hasStdExtC() const { return HasStdExtC
; }
89 bool is64Bit() const { return HasRV64
; }
90 bool isRV32E() const { return IsRV32E
; }
91 bool enableLinkerRelax() const { return EnableLinkerRelax
; }
92 bool enableRVCHintInstrs() const { return EnableRVCHintInstrs
; }
93 MVT
getXLenVT() const { return XLenVT
; }
94 unsigned getXLen() const { return XLen
; }
95 RISCVABI::ABI
getTargetABI() const { return TargetABI
; }
98 // GlobalISel related APIs.
99 std::unique_ptr
<CallLowering
> CallLoweringInfo
;
100 std::unique_ptr
<InstructionSelector
> InstSelector
;
101 std::unique_ptr
<LegalizerInfo
> Legalizer
;
102 std::unique_ptr
<RegisterBankInfo
> RegBankInfo
;
105 const CallLowering
*getCallLowering() const override
;
106 InstructionSelector
*getInstructionSelector() const override
;
107 const LegalizerInfo
*getLegalizerInfo() const override
;
108 const RegisterBankInfo
*getRegBankInfo() const override
;
110 } // End llvm namespace