1 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2 # RUN: llc -mtriple=aarch64-- -mattr=+lse -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
5 target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
7 define void @cmpxchg_i32(i64* %addr) { ret void }
8 define void @cmpxchg_i64(i64* %addr) { ret void }
20 ; CHECK-LABEL: name: cmpxchg_i32
21 ; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
22 ; CHECK: [[COPY1:%[0-9]+]]:gpr32 = COPY $wzr
23 ; CHECK: [[MOVi32imm:%[0-9]+]]:gpr32 = MOVi32imm 1
24 ; CHECK: [[CASW:%[0-9]+]]:gpr32 = CASW [[COPY1]], [[MOVi32imm]], [[COPY]] :: (load store monotonic 4 on %ir.addr)
25 ; CHECK: $w0 = COPY [[CASW]]
27 %1:gpr(s32) = G_CONSTANT i32 0
28 %2:gpr(s32) = G_CONSTANT i32 1
29 %3:gpr(s32) = G_ATOMIC_CMPXCHG %0, %1, %2 :: (load store monotonic 4 on %ir.addr)
42 ; CHECK-LABEL: name: cmpxchg_i64
43 ; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
44 ; CHECK: [[COPY1:%[0-9]+]]:gpr64 = COPY $xzr
45 ; CHECK: [[MOVi32imm:%[0-9]+]]:gpr32 = MOVi32imm 1
46 ; CHECK: [[SUBREG_TO_REG:%[0-9]+]]:gpr64 = SUBREG_TO_REG 0, [[MOVi32imm]], %subreg.sub_32
47 ; CHECK: [[CASX:%[0-9]+]]:gpr64 = CASX [[COPY1]], [[SUBREG_TO_REG]], [[COPY]] :: (load store monotonic 8 on %ir.addr)
48 ; CHECK: $x0 = COPY [[CASX]]
50 %1:gpr(s64) = G_CONSTANT i64 0
51 %2:gpr(s64) = G_CONSTANT i64 1
52 %3:gpr(s64) = G_ATOMIC_CMPXCHG %0, %1, %2 :: (load store monotonic 8 on %ir.addr)