1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc < %s -mtriple=aarch64-- | FileCheck %s
4 declare i4 @llvm.usub.sat.i4(i4, i4)
5 declare i8 @llvm.usub.sat.i8(i8, i8)
6 declare i16 @llvm.usub.sat.i16(i16, i16)
7 declare i32 @llvm.usub.sat.i32(i32, i32)
8 declare i64 @llvm.usub.sat.i64(i64, i64)
10 define i32 @func32(i32 %x, i32 %y, i32 %z) nounwind {
11 ; CHECK-LABEL: func32:
13 ; CHECK-NEXT: mul w8, w1, w2
14 ; CHECK-NEXT: subs w8, w0, w8
15 ; CHECK-NEXT: csel w0, wzr, w8, lo
18 %tmp = call i32 @llvm.usub.sat.i32(i32 %x, i32 %a)
22 define i64 @func64(i64 %x, i64 %y, i64 %z) nounwind {
23 ; CHECK-LABEL: func64:
25 ; CHECK-NEXT: subs x8, x0, x2
26 ; CHECK-NEXT: csel x0, xzr, x8, lo
29 %tmp = call i64 @llvm.usub.sat.i64(i64 %x, i64 %z)
33 define i16 @func16(i16 %x, i16 %y, i16 %z) nounwind {
34 ; CHECK-LABEL: func16:
36 ; CHECK-NEXT: mul w9, w1, w2
37 ; CHECK-NEXT: and w8, w0, #0xffff
38 ; CHECK-NEXT: and w9, w9, #0xffff
39 ; CHECK-NEXT: cmp w8, w9
40 ; CHECK-NEXT: csel w8, w8, w9, hi
41 ; CHECK-NEXT: sub w0, w8, w9
44 %tmp = call i16 @llvm.usub.sat.i16(i16 %x, i16 %a)
48 define i8 @func8(i8 %x, i8 %y, i8 %z) nounwind {
51 ; CHECK-NEXT: mul w9, w1, w2
52 ; CHECK-NEXT: and w8, w0, #0xff
53 ; CHECK-NEXT: and w9, w9, #0xff
54 ; CHECK-NEXT: cmp w8, w9
55 ; CHECK-NEXT: csel w8, w8, w9, hi
56 ; CHECK-NEXT: sub w0, w8, w9
59 %tmp = call i8 @llvm.usub.sat.i8(i8 %x, i8 %a)
63 define i4 @func4(i4 %x, i4 %y, i4 %z) nounwind {
66 ; CHECK-NEXT: mul w9, w1, w2
67 ; CHECK-NEXT: and w8, w0, #0xf
68 ; CHECK-NEXT: and w9, w9, #0xf
69 ; CHECK-NEXT: cmp w8, w9
70 ; CHECK-NEXT: csel w8, w8, w9, hi
71 ; CHECK-NEXT: sub w0, w8, w9
74 %tmp = call i4 @llvm.usub.sat.i4(i4 %x, i4 %a)