test/CodeGen/AMDGPU/GlobalISel/inst-select-lshr.mir

   1 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
   2 # RUN: llc -march=amdgcn -mcpu=tahiti -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck -check-prefix=GFX6 %s
   3 # RUN: llc -march=amdgcn -mcpu=hawaii -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck -check-prefix=GFX7 %s
   4 # RUN: llc -march=amdgcn -mcpu=fiji -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck -check-prefix=GFX8 %s
   5 # RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck -check-prefix=GFX9 %s
   6 # RUN: llc -march=amdgcn -mcpu=gfx1010 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck -check-prefix=GFX10 %s
   7
   8 ---
   9 name: lshr_s32_ss
  10 legalized: true
  11 regBankSelected: true
  12
  13 body: |
  14   bb.0:
  15     liveins: $sgpr0, $sgpr1
  16     ; GFX6-LABEL: name: lshr_s32_ss
  17     ; GFX6: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
  18     ; GFX6: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
  19     ; GFX6: [[S_LSHR_B32_:%[0-9]+]]:sreg_32 = S_LSHR_B32 [[COPY]], [[COPY1]], implicit-def $scc
  20     ; GFX6: S_ENDPGM 0, implicit [[S_LSHR_B32_]]
  21     ; GFX7-LABEL: name: lshr_s32_ss
  22     ; GFX7: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
  23     ; GFX7: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
  24     ; GFX7: [[S_LSHR_B32_:%[0-9]+]]:sreg_32 = S_LSHR_B32 [[COPY]], [[COPY1]], implicit-def $scc
  25     ; GFX7: S_ENDPGM 0, implicit [[S_LSHR_B32_]]
  26     ; GFX8-LABEL: name: lshr_s32_ss
  27     ; GFX8: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
  28     ; GFX8: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
  29     ; GFX8: [[S_LSHR_B32_:%[0-9]+]]:sreg_32 = S_LSHR_B32 [[COPY]], [[COPY1]], implicit-def $scc
  30     ; GFX8: S_ENDPGM 0, implicit [[S_LSHR_B32_]]
  31     ; GFX9-LABEL: name: lshr_s32_ss
  32     ; GFX9: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
  33     ; GFX9: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
  34     ; GFX9: [[S_LSHR_B32_:%[0-9]+]]:sreg_32 = S_LSHR_B32 [[COPY]], [[COPY1]], implicit-def $scc
  35     ; GFX9: S_ENDPGM 0, implicit [[S_LSHR_B32_]]
  36     ; GFX10-LABEL: name: lshr_s32_ss
  37     ; GFX10: $vcc_hi = IMPLICIT_DEF
  38     ; GFX10: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
  39     ; GFX10: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
  40     ; GFX10: [[S_LSHR_B32_:%[0-9]+]]:sreg_32 = S_LSHR_B32 [[COPY]], [[COPY1]], implicit-def $scc
  41     ; GFX10: S_ENDPGM 0, implicit [[S_LSHR_B32_]]
  42     %0:sgpr(s32) = COPY $sgpr0
  43     %1:sgpr(s32) = COPY $sgpr1
  44     %2:sgpr(s32) = G_LSHR %0, %1
  45     S_ENDPGM 0, implicit %2
  46 ...
  47
  48 ---
  49 name: lshr_s32_sv
  50 legalized: true
  51 regBankSelected: true
  52
  53 body: |
  54   bb.0:
  55     liveins: $sgpr0, $vgpr0
  56     ; GFX6-LABEL: name: lshr_s32_sv
  57     ; GFX6: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
  58     ; GFX6: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
  59     ; GFX6: [[V_LSHRREV_B32_e64_:%[0-9]+]]:vgpr_32 = V_LSHRREV_B32_e64 [[COPY1]], [[COPY]], implicit $exec
  60     ; GFX6: S_ENDPGM 0, implicit [[V_LSHRREV_B32_e64_]]
  61     ; GFX7-LABEL: name: lshr_s32_sv
  62     ; GFX7: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
  63     ; GFX7: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
  64     ; GFX7: [[V_LSHRREV_B32_e64_:%[0-9]+]]:vgpr_32 = V_LSHRREV_B32_e64 [[COPY1]], [[COPY]], implicit $exec
  65     ; GFX7: S_ENDPGM 0, implicit [[V_LSHRREV_B32_e64_]]
  66     ; GFX8-LABEL: name: lshr_s32_sv
  67     ; GFX8: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
  68     ; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
  69     ; GFX8: [[V_LSHRREV_B32_e64_:%[0-9]+]]:vgpr_32 = V_LSHRREV_B32_e64 [[COPY1]], [[COPY]], implicit $exec
  70     ; GFX8: S_ENDPGM 0, implicit [[V_LSHRREV_B32_e64_]]
  71     ; GFX9-LABEL: name: lshr_s32_sv
  72     ; GFX9: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
  73     ; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
  74     ; GFX9: [[V_LSHRREV_B32_e64_:%[0-9]+]]:vgpr_32 = V_LSHRREV_B32_e64 [[COPY1]], [[COPY]], implicit $exec
  75     ; GFX9: S_ENDPGM 0, implicit [[V_LSHRREV_B32_e64_]]
  76     ; GFX10-LABEL: name: lshr_s32_sv
  77     ; GFX10: $vcc_hi = IMPLICIT_DEF
  78     ; GFX10: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
  79     ; GFX10: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
  80     ; GFX10: [[V_LSHRREV_B32_e64_:%[0-9]+]]:vgpr_32 = V_LSHRREV_B32_e64 [[COPY1]], [[COPY]], implicit $exec
  81     ; GFX10: S_ENDPGM 0, implicit [[V_LSHRREV_B32_e64_]]
  82     %0:sgpr(s32) = COPY $sgpr0
  83     %1:vgpr(s32) = COPY $vgpr0
  84     %2:vgpr(s32) = G_LSHR %0, %1
  85     S_ENDPGM 0, implicit %2
  86 ...
  87
  88 ---
  89 name: lshr_s32_vs
  90 legalized: true
  91 regBankSelected: true
  92
  93 body: |
  94   bb.0:
  95     liveins: $sgpr0, $vgpr0
  96     ; GFX6-LABEL: name: lshr_s32_vs
  97     ; GFX6: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
  98     ; GFX6: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0
  99     ; GFX6: [[V_LSHRREV_B32_e64_:%[0-9]+]]:vgpr_32 = V_LSHRREV_B32_e64 [[COPY1]], [[COPY]], implicit $exec
 100     ; GFX6: S_ENDPGM 0, implicit [[V_LSHRREV_B32_e64_]]
 101     ; GFX7-LABEL: name: lshr_s32_vs
 102     ; GFX7: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
 103     ; GFX7: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0
 104     ; GFX7: [[V_LSHRREV_B32_e64_:%[0-9]+]]:vgpr_32 = V_LSHRREV_B32_e64 [[COPY1]], [[COPY]], implicit $exec
 105     ; GFX7: S_ENDPGM 0, implicit [[V_LSHRREV_B32_e64_]]
 106     ; GFX8-LABEL: name: lshr_s32_vs
 107     ; GFX8: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
 108     ; GFX8: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0
 109     ; GFX8: [[V_LSHRREV_B32_e64_:%[0-9]+]]:vgpr_32 = V_LSHRREV_B32_e64 [[COPY1]], [[COPY]], implicit $exec
 110     ; GFX8: S_ENDPGM 0, implicit [[V_LSHRREV_B32_e64_]]
 111     ; GFX9-LABEL: name: lshr_s32_vs
 112     ; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
 113     ; GFX9: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0
 114     ; GFX9: [[V_LSHRREV_B32_e64_:%[0-9]+]]:vgpr_32 = V_LSHRREV_B32_e64 [[COPY1]], [[COPY]], implicit $exec
 115     ; GFX9: S_ENDPGM 0, implicit [[V_LSHRREV_B32_e64_]]
 116     ; GFX10-LABEL: name: lshr_s32_vs
 117     ; GFX10: $vcc_hi = IMPLICIT_DEF
 118     ; GFX10: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
 119     ; GFX10: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0
 120     ; GFX10: [[V_LSHRREV_B32_e64_:%[0-9]+]]:vgpr_32 = V_LSHRREV_B32_e64 [[COPY1]], [[COPY]], implicit $exec
 121     ; GFX10: S_ENDPGM 0, implicit [[V_LSHRREV_B32_e64_]]
 122     %0:vgpr(s32) = COPY $vgpr0
 123     %1:sgpr(s32) = COPY $sgpr0
 124     %2:vgpr(s32) = G_LSHR %0, %1
 125     S_ENDPGM 0, implicit %2
 126 ...
 127
 128 ---
 129 name: lshr_s32_vv
 130 legalized: true
 131 regBankSelected: true
 132
 133 body: |
 134   bb.0:
 135     liveins: $vgpr0, $vgpr1
 136     ; GFX6-LABEL: name: lshr_s32_vv
 137     ; GFX6: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
 138     ; GFX6: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
 139     ; GFX6: [[V_LSHRREV_B32_e64_:%[0-9]+]]:vgpr_32 = V_LSHRREV_B32_e64 [[COPY1]], [[COPY]], implicit $exec
 140     ; GFX6: S_ENDPGM 0, implicit [[V_LSHRREV_B32_e64_]]
 141     ; GFX7-LABEL: name: lshr_s32_vv
 142     ; GFX7: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
 143     ; GFX7: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
 144     ; GFX7: [[V_LSHRREV_B32_e64_:%[0-9]+]]:vgpr_32 = V_LSHRREV_B32_e64 [[COPY1]], [[COPY]], implicit $exec
 145     ; GFX7: S_ENDPGM 0, implicit [[V_LSHRREV_B32_e64_]]
 146     ; GFX8-LABEL: name: lshr_s32_vv
 147     ; GFX8: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
 148     ; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
 149     ; GFX8: [[V_LSHRREV_B32_e64_:%[0-9]+]]:vgpr_32 = V_LSHRREV_B32_e64 [[COPY1]], [[COPY]], implicit $exec
 150     ; GFX8: S_ENDPGM 0, implicit [[V_LSHRREV_B32_e64_]]
 151     ; GFX9-LABEL: name: lshr_s32_vv
 152     ; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
 153     ; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
 154     ; GFX9: [[V_LSHRREV_B32_e64_:%[0-9]+]]:vgpr_32 = V_LSHRREV_B32_e64 [[COPY1]], [[COPY]], implicit $exec
 155     ; GFX9: S_ENDPGM 0, implicit [[V_LSHRREV_B32_e64_]]
 156     ; GFX10-LABEL: name: lshr_s32_vv
 157     ; GFX10: $vcc_hi = IMPLICIT_DEF
 158     ; GFX10: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
 159     ; GFX10: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
 160     ; GFX10: [[V_LSHRREV_B32_e64_:%[0-9]+]]:vgpr_32 = V_LSHRREV_B32_e64 [[COPY1]], [[COPY]], implicit $exec
 161     ; GFX10: S_ENDPGM 0, implicit [[V_LSHRREV_B32_e64_]]
 162     %0:vgpr(s32) = COPY $vgpr0
 163     %1:vgpr(s32) = COPY $vgpr1
 164     %2:vgpr(s32) = G_LSHR %0, %1
 165     S_ENDPGM 0, implicit %2
 166 ...
 167
 168 ---
 169 name: lshr_s64_ss
 170 legalized: true
 171 regBankSelected: true
 172
 173 body: |
 174   bb.0:
 175     liveins: $sgpr0_sgpr1, $sgpr2
 176     ; GFX6-LABEL: name: lshr_s64_ss
 177     ; GFX6: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
 178     ; GFX6: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr2
 179     ; GFX6: [[S_LSHR_B64_:%[0-9]+]]:sreg_64 = S_LSHR_B64 [[COPY]], [[COPY1]], implicit-def $scc
 180     ; GFX6: S_ENDPGM 0, implicit [[S_LSHR_B64_]]
 181     ; GFX7-LABEL: name: lshr_s64_ss
 182     ; GFX7: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
 183     ; GFX7: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr2
 184     ; GFX7: [[S_LSHR_B64_:%[0-9]+]]:sreg_64 = S_LSHR_B64 [[COPY]], [[COPY1]], implicit-def $scc
 185     ; GFX7: S_ENDPGM 0, implicit [[S_LSHR_B64_]]
 186     ; GFX8-LABEL: name: lshr_s64_ss
 187     ; GFX8: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
 188     ; GFX8: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr2
 189     ; GFX8: [[S_LSHR_B64_:%[0-9]+]]:sreg_64 = S_LSHR_B64 [[COPY]], [[COPY1]], implicit-def $scc
 190     ; GFX8: S_ENDPGM 0, implicit [[S_LSHR_B64_]]
 191     ; GFX9-LABEL: name: lshr_s64_ss
 192     ; GFX9: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
 193     ; GFX9: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr2
 194     ; GFX9: [[S_LSHR_B64_:%[0-9]+]]:sreg_64 = S_LSHR_B64 [[COPY]], [[COPY1]], implicit-def $scc
 195     ; GFX9: S_ENDPGM 0, implicit [[S_LSHR_B64_]]
 196     ; GFX10-LABEL: name: lshr_s64_ss
 197     ; GFX10: $vcc_hi = IMPLICIT_DEF
 198     ; GFX10: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
 199     ; GFX10: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr2
 200     ; GFX10: [[S_LSHR_B64_:%[0-9]+]]:sreg_64 = S_LSHR_B64 [[COPY]], [[COPY1]], implicit-def $scc
 201     ; GFX10: S_ENDPGM 0, implicit [[S_LSHR_B64_]]
 202     %0:sgpr(s64) = COPY $sgpr0_sgpr1
 203     %1:sgpr(s32) = COPY $sgpr2
 204     %2:sgpr(s64) = G_LSHR %0, %1
 205     S_ENDPGM 0, implicit %2
 206 ...
 207
 208 ---
 209 name: lshr_s64_sv
 210 legalized: true
 211 regBankSelected: true
 212
 213 body: |
 214   bb.0:
 215     liveins: $sgpr0_sgpr1, $vgpr0
 216     ; GFX6-LABEL: name: lshr_s64_sv
 217     ; GFX6: [[COPY:%[0-9]+]]:sreg_64_xexec = COPY $sgpr0_sgpr1
 218     ; GFX6: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
 219     ; GFX6: [[V_LSHR_B64_:%[0-9]+]]:vreg_64 = V_LSHR_B64 [[COPY]], [[COPY1]], implicit $exec
 220     ; GFX6: S_ENDPGM 0, implicit [[V_LSHR_B64_]]
 221     ; GFX7-LABEL: name: lshr_s64_sv
 222     ; GFX7: [[COPY:%[0-9]+]]:sreg_64_xexec = COPY $sgpr0_sgpr1
 223     ; GFX7: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
 224     ; GFX7: [[V_LSHR_B64_:%[0-9]+]]:vreg_64 = V_LSHR_B64 [[COPY]], [[COPY1]], implicit $exec
 225     ; GFX7: S_ENDPGM 0, implicit [[V_LSHR_B64_]]
 226     ; GFX8-LABEL: name: lshr_s64_sv
 227     ; GFX8: [[COPY:%[0-9]+]]:sreg_64_xexec = COPY $sgpr0_sgpr1
 228     ; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
 229     ; GFX8: [[V_LSHRREV_B64_:%[0-9]+]]:vreg_64 = V_LSHRREV_B64 [[COPY1]], [[COPY]], implicit $exec
 230     ; GFX8: S_ENDPGM 0, implicit [[V_LSHRREV_B64_]]
 231     ; GFX9-LABEL: name: lshr_s64_sv
 232     ; GFX9: [[COPY:%[0-9]+]]:sreg_64_xexec = COPY $sgpr0_sgpr1
 233     ; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
 234     ; GFX9: [[V_LSHRREV_B64_:%[0-9]+]]:vreg_64 = V_LSHRREV_B64 [[COPY1]], [[COPY]], implicit $exec
 235     ; GFX9: S_ENDPGM 0, implicit [[V_LSHRREV_B64_]]
 236     ; GFX10-LABEL: name: lshr_s64_sv
 237     ; GFX10: $vcc_hi = IMPLICIT_DEF
 238     ; GFX10: [[COPY:%[0-9]+]]:sreg_64_xexec = COPY $sgpr0_sgpr1
 239     ; GFX10: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
 240     ; GFX10: [[V_LSHR_B64_:%[0-9]+]]:vreg_64 = V_LSHR_B64 [[COPY]], [[COPY1]], implicit $exec
 241     ; GFX10: S_ENDPGM 0, implicit [[V_LSHR_B64_]]
 242     %0:sgpr(s64) = COPY $sgpr0_sgpr1
 243     %1:vgpr(s32) = COPY $vgpr0
 244     %2:vgpr(s64) = G_LSHR %0, %1
 245     S_ENDPGM 0, implicit %2
 246 ...
 247
 248 ---
 249 name: lshr_s64_vs
 250 legalized: true
 251 regBankSelected: true
 252
 253 body: |
 254   bb.0:
 255     liveins: $sgpr0, $vgpr0_vgpr1
 256     ; GFX6-LABEL: name: lshr_s64_vs
 257     ; GFX6: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
 258     ; GFX6: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0
 259     ; GFX6: [[V_LSHR_B64_:%[0-9]+]]:vreg_64 = V_LSHR_B64 [[COPY]], [[COPY1]], implicit $exec
 260     ; GFX6: S_ENDPGM 0, implicit [[V_LSHR_B64_]]
 261     ; GFX7-LABEL: name: lshr_s64_vs
 262     ; GFX7: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
 263     ; GFX7: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0
 264     ; GFX7: [[V_LSHR_B64_:%[0-9]+]]:vreg_64 = V_LSHR_B64 [[COPY]], [[COPY1]], implicit $exec
 265     ; GFX7: S_ENDPGM 0, implicit [[V_LSHR_B64_]]
 266     ; GFX8-LABEL: name: lshr_s64_vs
 267     ; GFX8: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
 268     ; GFX8: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0
 269     ; GFX8: [[V_LSHRREV_B64_:%[0-9]+]]:vreg_64 = V_LSHRREV_B64 [[COPY1]], [[COPY]], implicit $exec
 270     ; GFX8: S_ENDPGM 0, implicit [[V_LSHRREV_B64_]]
 271     ; GFX9-LABEL: name: lshr_s64_vs
 272     ; GFX9: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
 273     ; GFX9: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0
 274     ; GFX9: [[V_LSHRREV_B64_:%[0-9]+]]:vreg_64 = V_LSHRREV_B64 [[COPY1]], [[COPY]], implicit $exec
 275     ; GFX9: S_ENDPGM 0, implicit [[V_LSHRREV_B64_]]
 276     ; GFX10-LABEL: name: lshr_s64_vs
 277     ; GFX10: $vcc_hi = IMPLICIT_DEF
 278     ; GFX10: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
 279     ; GFX10: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0
 280     ; GFX10: [[V_LSHR_B64_:%[0-9]+]]:vreg_64 = V_LSHR_B64 [[COPY]], [[COPY1]], implicit $exec
 281     ; GFX10: S_ENDPGM 0, implicit [[V_LSHR_B64_]]
 282     %0:vgpr(s64) = COPY $vgpr0_vgpr1
 283     %1:sgpr(s32) = COPY $sgpr0
 284     %2:vgpr(s64) = G_LSHR %0, %1
 285     S_ENDPGM 0, implicit %2
 286 ...
 287
 288 ---
 289 name: lshr_s64_vv
 290 legalized: true
 291 regBankSelected: true
 292
 293 body: |
 294   bb.0:
 295     liveins: $vgpr0_vgpr1, $vgpr2
 296     ; GFX6-LABEL: name: lshr_s64_vv
 297     ; GFX6: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
 298     ; GFX6: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr2
 299     ; GFX6: [[V_LSHR_B64_:%[0-9]+]]:vreg_64 = V_LSHR_B64 [[COPY]], [[COPY1]], implicit $exec
 300     ; GFX6: S_ENDPGM 0, implicit [[V_LSHR_B64_]]
 301     ; GFX7-LABEL: name: lshr_s64_vv
 302     ; GFX7: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
 303     ; GFX7: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr2
 304     ; GFX7: [[V_LSHR_B64_:%[0-9]+]]:vreg_64 = V_LSHR_B64 [[COPY]], [[COPY1]], implicit $exec
 305     ; GFX7: S_ENDPGM 0, implicit [[V_LSHR_B64_]]
 306     ; GFX8-LABEL: name: lshr_s64_vv
 307     ; GFX8: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
 308     ; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr2
 309     ; GFX8: [[V_LSHRREV_B64_:%[0-9]+]]:vreg_64 = V_LSHRREV_B64 [[COPY1]], [[COPY]], implicit $exec
 310     ; GFX8: S_ENDPGM 0, implicit [[V_LSHRREV_B64_]]
 311     ; GFX9-LABEL: name: lshr_s64_vv
 312     ; GFX9: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
 313     ; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr2
 314     ; GFX9: [[V_LSHRREV_B64_:%[0-9]+]]:vreg_64 = V_LSHRREV_B64 [[COPY1]], [[COPY]], implicit $exec
 315     ; GFX9: S_ENDPGM 0, implicit [[V_LSHRREV_B64_]]
 316     ; GFX10-LABEL: name: lshr_s64_vv
 317     ; GFX10: $vcc_hi = IMPLICIT_DEF
 318     ; GFX10: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
 319     ; GFX10: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr2
 320     ; GFX10: [[V_LSHR_B64_:%[0-9]+]]:vreg_64 = V_LSHR_B64 [[COPY]], [[COPY1]], implicit $exec
 321     ; GFX10: S_ENDPGM 0, implicit [[V_LSHR_B64_]]
 322     %0:vgpr(s64) = COPY $vgpr0_vgpr1
 323     %1:vgpr(s32) = COPY $vgpr2
 324     %2:vgpr(s64) = G_LSHR %0, %1
 325     S_ENDPGM 0, implicit %2
 326 ...
 327